115 lines
3.1 KiB
C
115 lines
3.1 KiB
C
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// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
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/* Copyright(c) 2018-2021 Realtek Corporation
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*/
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#include "sar.h"
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#include "phy.h"
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#include "debug.h"
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s8 rtw_query_sar(struct rtw_dev *rtwdev, const struct rtw_sar_arg *arg)
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{
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const struct rtw_hal *hal = &rtwdev->hal;
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const struct rtw_sar *sar = &hal->sar;
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switch (sar->src) {
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default:
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rtw_warn(rtwdev, "unknown SAR source: %d\n", sar->src);
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fallthrough;
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case RTW_SAR_SOURCE_NONE:
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return (s8)rtwdev->chip->max_power_index;
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case RTW_SAR_SOURCE_COMMON:
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return sar->cfg[arg->path][arg->rs].common[arg->sar_band];
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}
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}
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static int rtw_apply_sar(struct rtw_dev *rtwdev, const struct rtw_sar *new)
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{
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struct rtw_hal *hal = &rtwdev->hal;
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struct rtw_sar *sar = &hal->sar;
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if (sar->src != RTW_SAR_SOURCE_NONE && new->src != sar->src) {
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rtw_warn(rtwdev, "SAR source: %d is in use\n", sar->src);
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return -EBUSY;
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}
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*sar = *new;
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rtw_phy_set_tx_power_level(rtwdev, hal->current_channel);
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return 0;
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}
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static s8 rtw_sar_to_phy(struct rtw_dev *rtwdev, u8 fct, s32 sar,
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const struct rtw_sar_arg *arg)
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{
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struct rtw_hal *hal = &rtwdev->hal;
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u8 txgi = rtwdev->chip->txgi_factor;
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u8 max = rtwdev->chip->max_power_index;
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s32 tmp;
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s8 base;
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tmp = fct > txgi ? sar >> (fct - txgi) : sar << (txgi - fct);
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base = arg->sar_band == RTW_SAR_BAND_0 ?
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hal->tx_pwr_by_rate_base_2g[arg->path][arg->rs] :
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hal->tx_pwr_by_rate_base_5g[arg->path][arg->rs];
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return (s8)clamp_t(s32, tmp, -max - 1, max) - base;
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}
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static const struct cfg80211_sar_freq_ranges rtw_common_sar_freq_ranges[] = {
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[RTW_SAR_BAND_0] = { .start_freq = 2412, .end_freq = 2484, },
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[RTW_SAR_BAND_1] = { .start_freq = 5180, .end_freq = 5320, },
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[RTW_SAR_BAND_3] = { .start_freq = 5500, .end_freq = 5720, },
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[RTW_SAR_BAND_4] = { .start_freq = 5745, .end_freq = 5825, },
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};
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static_assert(ARRAY_SIZE(rtw_common_sar_freq_ranges) == RTW_SAR_BAND_NR);
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const struct cfg80211_sar_capa rtw_sar_capa = {
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.type = NL80211_SAR_TYPE_POWER,
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.num_freq_ranges = RTW_SAR_BAND_NR,
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.freq_ranges = rtw_common_sar_freq_ranges,
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};
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int rtw_set_sar_specs(struct rtw_dev *rtwdev,
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const struct cfg80211_sar_specs *sar)
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{
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struct rtw_sar_arg arg = {0};
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struct rtw_sar new = {0};
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u32 idx, i, j, k;
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s32 power;
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s8 val;
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if (sar->type != NL80211_SAR_TYPE_POWER)
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return -EINVAL;
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memset(&new, rtwdev->chip->max_power_index, sizeof(new));
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new.src = RTW_SAR_SOURCE_COMMON;
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for (i = 0; i < sar->num_sub_specs; i++) {
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idx = sar->sub_specs[i].freq_range_index;
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if (idx >= RTW_SAR_BAND_NR)
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return -EINVAL;
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power = sar->sub_specs[i].power;
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rtw_dbg(rtwdev, RTW_DBG_REGD, "On freq %u to %u, set SAR %d in 1/%lu dBm\n",
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rtw_common_sar_freq_ranges[idx].start_freq,
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rtw_common_sar_freq_ranges[idx].end_freq,
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power, BIT(RTW_COMMON_SAR_FCT));
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for (j = 0; j < RTW_RF_PATH_MAX; j++) {
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for (k = 0; k < RTW_RATE_SECTION_MAX; k++) {
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arg = (struct rtw_sar_arg){
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.sar_band = idx,
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.path = j,
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.rs = k,
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};
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val = rtw_sar_to_phy(rtwdev, RTW_COMMON_SAR_FCT,
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power, &arg);
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new.cfg[j][k].common[idx] = val;
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}
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}
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}
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return rtw_apply_sar(rtwdev, &new);
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}
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