295 lines
8.6 KiB
C
295 lines
8.6 KiB
C
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// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
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/* Copyright(c) 2019-2020 Realtek Corporation
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*/
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#include "debug.h"
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#include "sar.h"
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static enum rtw89_sar_subband rtw89_sar_get_subband(struct rtw89_dev *rtwdev,
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u32 center_freq)
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{
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switch (center_freq) {
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default:
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rtw89_debug(rtwdev, RTW89_DBG_SAR,
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"center freq: %u to SAR subband is unhandled\n",
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center_freq);
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fallthrough;
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case 2412 ... 2484:
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return RTW89_SAR_2GHZ_SUBBAND;
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case 5180 ... 5320:
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return RTW89_SAR_5GHZ_SUBBAND_1_2;
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case 5500 ... 5720:
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return RTW89_SAR_5GHZ_SUBBAND_2_E;
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case 5745 ... 5825:
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return RTW89_SAR_5GHZ_SUBBAND_3;
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case 5955 ... 6155:
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return RTW89_SAR_6GHZ_SUBBAND_5_L;
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case 6175 ... 6415:
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return RTW89_SAR_6GHZ_SUBBAND_5_H;
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case 6435 ... 6515:
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return RTW89_SAR_6GHZ_SUBBAND_6;
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case 6535 ... 6695:
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return RTW89_SAR_6GHZ_SUBBAND_7_L;
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case 6715 ... 6855:
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return RTW89_SAR_6GHZ_SUBBAND_7_H;
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/* freq 6875 (ch 185, 20MHz) spans RTW89_SAR_6GHZ_SUBBAND_7_H
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* and RTW89_SAR_6GHZ_SUBBAND_8, so directly describe it with
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* struct rtw89_sar_span in the following.
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*/
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case 6895 ... 7115:
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return RTW89_SAR_6GHZ_SUBBAND_8;
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}
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}
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struct rtw89_sar_span {
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enum rtw89_sar_subband subband_low;
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enum rtw89_sar_subband subband_high;
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};
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#define RTW89_SAR_SPAN_VALID(span) ((span)->subband_high)
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#define RTW89_SAR_6GHZ_SPAN_HEAD 6145
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#define RTW89_SAR_6GHZ_SPAN_IDX(center_freq) \
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((((int)(center_freq) - RTW89_SAR_6GHZ_SPAN_HEAD) / 5) / 2)
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#define RTW89_DECL_SAR_6GHZ_SPAN(center_freq, subband_l, subband_h) \
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[RTW89_SAR_6GHZ_SPAN_IDX(center_freq)] = { \
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.subband_low = RTW89_SAR_6GHZ_ ## subband_l, \
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.subband_high = RTW89_SAR_6GHZ_ ## subband_h, \
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}
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/* Since 6GHz SAR subbands are not edge aligned, some cases span two SAR
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* subbands. In the following, we describe each of them with rtw89_sar_span.
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*/
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static const struct rtw89_sar_span rtw89_sar_overlapping_6ghz[] = {
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RTW89_DECL_SAR_6GHZ_SPAN(6145, SUBBAND_5_L, SUBBAND_5_H),
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RTW89_DECL_SAR_6GHZ_SPAN(6165, SUBBAND_5_L, SUBBAND_5_H),
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RTW89_DECL_SAR_6GHZ_SPAN(6185, SUBBAND_5_L, SUBBAND_5_H),
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RTW89_DECL_SAR_6GHZ_SPAN(6505, SUBBAND_6, SUBBAND_7_L),
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RTW89_DECL_SAR_6GHZ_SPAN(6525, SUBBAND_6, SUBBAND_7_L),
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RTW89_DECL_SAR_6GHZ_SPAN(6545, SUBBAND_6, SUBBAND_7_L),
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RTW89_DECL_SAR_6GHZ_SPAN(6665, SUBBAND_7_L, SUBBAND_7_H),
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RTW89_DECL_SAR_6GHZ_SPAN(6705, SUBBAND_7_L, SUBBAND_7_H),
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RTW89_DECL_SAR_6GHZ_SPAN(6825, SUBBAND_7_H, SUBBAND_8),
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RTW89_DECL_SAR_6GHZ_SPAN(6865, SUBBAND_7_H, SUBBAND_8),
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RTW89_DECL_SAR_6GHZ_SPAN(6875, SUBBAND_7_H, SUBBAND_8),
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RTW89_DECL_SAR_6GHZ_SPAN(6885, SUBBAND_7_H, SUBBAND_8),
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};
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static int rtw89_query_sar_config_common(struct rtw89_dev *rtwdev, s32 *cfg)
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{
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struct rtw89_sar_cfg_common *rtwsar = &rtwdev->sar.cfg_common;
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const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
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enum rtw89_band band = chan->band_type;
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u32 center_freq = chan->freq;
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const struct rtw89_sar_span *span = NULL;
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enum rtw89_sar_subband subband_l, subband_h;
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int idx;
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if (band == RTW89_BAND_6G) {
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idx = RTW89_SAR_6GHZ_SPAN_IDX(center_freq);
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/* To decrease size of rtw89_sar_overlapping_6ghz[],
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* RTW89_SAR_6GHZ_SPAN_IDX() truncates the leading NULLs
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* to make first span as index 0 of the table. So, if center
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* frequency is less than the first one, it will get netative.
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*/
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if (idx >= 0 && idx < ARRAY_SIZE(rtw89_sar_overlapping_6ghz))
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span = &rtw89_sar_overlapping_6ghz[idx];
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}
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if (span && RTW89_SAR_SPAN_VALID(span)) {
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subband_l = span->subband_low;
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subband_h = span->subband_high;
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} else {
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subband_l = rtw89_sar_get_subband(rtwdev, center_freq);
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subband_h = subband_l;
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}
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rtw89_debug(rtwdev, RTW89_DBG_SAR,
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"for {band %u, center_freq %u}, SAR subband: {%u, %u}\n",
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band, center_freq, subband_l, subband_h);
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if (!rtwsar->set[subband_l] && !rtwsar->set[subband_h])
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return -ENODATA;
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if (!rtwsar->set[subband_l])
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*cfg = rtwsar->cfg[subband_h];
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else if (!rtwsar->set[subband_h])
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*cfg = rtwsar->cfg[subband_l];
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else
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*cfg = min(rtwsar->cfg[subband_l], rtwsar->cfg[subband_h]);
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return 0;
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}
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static const
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struct rtw89_sar_handler rtw89_sar_handlers[RTW89_SAR_SOURCE_NR] = {
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[RTW89_SAR_SOURCE_COMMON] = {
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.descr_sar_source = "RTW89_SAR_SOURCE_COMMON",
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.txpwr_factor_sar = 2,
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.query_sar_config = rtw89_query_sar_config_common,
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},
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};
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#define rtw89_sar_set_src(_dev, _src, _cfg_name, _cfg_data) \
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do { \
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typeof(_src) _s = (_src); \
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typeof(_dev) _d = (_dev); \
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BUILD_BUG_ON(!rtw89_sar_handlers[_s].descr_sar_source); \
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BUILD_BUG_ON(!rtw89_sar_handlers[_s].query_sar_config); \
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lockdep_assert_held(&_d->mutex); \
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_d->sar._cfg_name = *(_cfg_data); \
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_d->sar.src = _s; \
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} while (0)
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static s8 rtw89_txpwr_sar_to_mac(struct rtw89_dev *rtwdev, u8 fct, s32 cfg)
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{
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const u8 fct_mac = rtwdev->chip->txpwr_factor_mac;
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s32 cfg_mac;
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cfg_mac = fct > fct_mac ?
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cfg >> (fct - fct_mac) : cfg << (fct_mac - fct);
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return (s8)clamp_t(s32, cfg_mac,
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RTW89_SAR_TXPWR_MAC_MIN,
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RTW89_SAR_TXPWR_MAC_MAX);
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}
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s8 rtw89_query_sar(struct rtw89_dev *rtwdev)
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{
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const enum rtw89_sar_sources src = rtwdev->sar.src;
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/* its members are protected by rtw89_sar_set_src() */
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const struct rtw89_sar_handler *sar_hdl = &rtw89_sar_handlers[src];
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int ret;
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s32 cfg;
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u8 fct;
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lockdep_assert_held(&rtwdev->mutex);
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if (src == RTW89_SAR_SOURCE_NONE)
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return RTW89_SAR_TXPWR_MAC_MAX;
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ret = sar_hdl->query_sar_config(rtwdev, &cfg);
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if (ret)
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return RTW89_SAR_TXPWR_MAC_MAX;
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fct = sar_hdl->txpwr_factor_sar;
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return rtw89_txpwr_sar_to_mac(rtwdev, fct, cfg);
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}
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void rtw89_print_sar(struct seq_file *m, struct rtw89_dev *rtwdev)
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{
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const enum rtw89_sar_sources src = rtwdev->sar.src;
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/* its members are protected by rtw89_sar_set_src() */
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const struct rtw89_sar_handler *sar_hdl = &rtw89_sar_handlers[src];
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const u8 fct_mac = rtwdev->chip->txpwr_factor_mac;
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int ret;
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s32 cfg;
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u8 fct;
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lockdep_assert_held(&rtwdev->mutex);
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if (src == RTW89_SAR_SOURCE_NONE) {
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seq_puts(m, "no SAR is applied\n");
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return;
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}
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seq_printf(m, "source: %d (%s)\n", src, sar_hdl->descr_sar_source);
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ret = sar_hdl->query_sar_config(rtwdev, &cfg);
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if (ret) {
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seq_printf(m, "config: return code: %d\n", ret);
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seq_printf(m, "assign: max setting: %d (unit: 1/%lu dBm)\n",
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RTW89_SAR_TXPWR_MAC_MAX, BIT(fct_mac));
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return;
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}
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fct = sar_hdl->txpwr_factor_sar;
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seq_printf(m, "config: %d (unit: 1/%lu dBm)\n", cfg, BIT(fct));
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}
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static int rtw89_apply_sar_common(struct rtw89_dev *rtwdev,
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const struct rtw89_sar_cfg_common *sar)
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{
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enum rtw89_sar_sources src;
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int ret = 0;
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mutex_lock(&rtwdev->mutex);
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src = rtwdev->sar.src;
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if (src != RTW89_SAR_SOURCE_NONE && src != RTW89_SAR_SOURCE_COMMON) {
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rtw89_warn(rtwdev, "SAR source: %d is in use", src);
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ret = -EBUSY;
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goto exit;
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}
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rtw89_sar_set_src(rtwdev, RTW89_SAR_SOURCE_COMMON, cfg_common, sar);
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rtw89_core_set_chip_txpwr(rtwdev);
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exit:
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mutex_unlock(&rtwdev->mutex);
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return ret;
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}
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static const struct cfg80211_sar_freq_ranges rtw89_common_sar_freq_ranges[] = {
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{ .start_freq = 2412, .end_freq = 2484, },
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{ .start_freq = 5180, .end_freq = 5320, },
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{ .start_freq = 5500, .end_freq = 5720, },
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{ .start_freq = 5745, .end_freq = 5825, },
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{ .start_freq = 5955, .end_freq = 6155, },
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{ .start_freq = 6175, .end_freq = 6415, },
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{ .start_freq = 6435, .end_freq = 6515, },
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{ .start_freq = 6535, .end_freq = 6695, },
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{ .start_freq = 6715, .end_freq = 6875, },
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{ .start_freq = 6875, .end_freq = 7115, },
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};
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static_assert(RTW89_SAR_SUBBAND_NR ==
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ARRAY_SIZE(rtw89_common_sar_freq_ranges));
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const struct cfg80211_sar_capa rtw89_sar_capa = {
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.type = NL80211_SAR_TYPE_POWER,
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.num_freq_ranges = ARRAY_SIZE(rtw89_common_sar_freq_ranges),
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.freq_ranges = rtw89_common_sar_freq_ranges,
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};
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int rtw89_ops_set_sar_specs(struct ieee80211_hw *hw,
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const struct cfg80211_sar_specs *sar)
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{
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struct rtw89_dev *rtwdev = hw->priv;
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struct rtw89_sar_cfg_common sar_common = {0};
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u8 fct;
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u32 freq_start;
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u32 freq_end;
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s32 power;
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u32 i, idx;
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if (sar->type != NL80211_SAR_TYPE_POWER)
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return -EINVAL;
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fct = rtw89_sar_handlers[RTW89_SAR_SOURCE_COMMON].txpwr_factor_sar;
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for (i = 0; i < sar->num_sub_specs; i++) {
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idx = sar->sub_specs[i].freq_range_index;
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if (idx >= ARRAY_SIZE(rtw89_common_sar_freq_ranges))
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return -EINVAL;
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freq_start = rtw89_common_sar_freq_ranges[idx].start_freq;
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freq_end = rtw89_common_sar_freq_ranges[idx].end_freq;
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power = sar->sub_specs[i].power;
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rtw89_debug(rtwdev, RTW89_DBG_SAR,
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"On freq %u to %u, set SAR limit %d (unit: 1/%lu dBm)\n",
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freq_start, freq_end, power, BIT(fct));
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sar_common.set[idx] = true;
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sar_common.cfg[idx] = power;
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}
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return rtw89_apply_sar_common(rtwdev, &sar_common);
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}
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