329 lines
8.7 KiB
C
329 lines
8.7 KiB
C
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2020 TOSHIBA CORPORATION
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* Copyright (c) 2020 Toshiba Electronic Devices & Storage Corporation
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* Copyright (c) 2020 Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
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*/
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#include <linux/init.h>
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#include <linux/of.h>
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/pinctrl/pinmux.h>
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#include <linux/pinctrl/pinconf.h>
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#include <linux/pinctrl/pinconf-generic.h>
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#include "pinctrl-common.h"
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#include "../core.h"
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#include "../pinconf.h"
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#include "../pinctrl-utils.h"
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#define DSEL_MASK GENMASK(3, 0)
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/* private data */
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struct visconti_pinctrl {
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void __iomem *base;
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struct device *dev;
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struct pinctrl_dev *pctl;
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struct pinctrl_desc pctl_desc;
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const struct visconti_pinctrl_devdata *devdata;
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spinlock_t lock; /* protect pinctrl register */
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};
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/* pinconf */
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static int visconti_pin_config_set(struct pinctrl_dev *pctldev,
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unsigned int _pin,
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unsigned long *configs,
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unsigned int num_configs)
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{
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struct visconti_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev);
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const struct visconti_desc_pin *pin = &priv->devdata->pins[_pin];
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enum pin_config_param param;
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unsigned int arg;
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int i, ret = 0;
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unsigned int val, set_val, pude_val;
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unsigned long flags;
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dev_dbg(priv->dev, "%s: pin = %d (%s)\n", __func__, _pin, pin->pin.name);
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spin_lock_irqsave(&priv->lock, flags);
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for (i = 0; i < num_configs; i++) {
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set_val = 0;
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pude_val = 0;
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param = pinconf_to_config_param(configs[i]);
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switch (param) {
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case PIN_CONFIG_BIAS_PULL_UP:
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set_val = 1;
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fallthrough;
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case PIN_CONFIG_BIAS_PULL_DOWN:
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/* update pudsel setting */
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val = readl(priv->base + pin->pudsel_offset);
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val &= ~BIT(pin->pud_shift);
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val |= set_val << pin->pud_shift;
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writel(val, priv->base + pin->pudsel_offset);
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pude_val = 1;
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fallthrough;
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case PIN_CONFIG_BIAS_DISABLE:
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/* update pude setting */
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val = readl(priv->base + pin->pude_offset);
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val &= ~BIT(pin->pud_shift);
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val |= pude_val << pin->pud_shift;
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writel(val, priv->base + pin->pude_offset);
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dev_dbg(priv->dev, "BIAS(%d): off = 0x%x val = 0x%x\n",
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param, pin->pude_offset, val);
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break;
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case PIN_CONFIG_DRIVE_STRENGTH:
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arg = pinconf_to_config_argument(configs[i]);
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dev_dbg(priv->dev, "DRV_STR arg = %d\n", arg);
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switch (arg) {
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case 2:
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case 4:
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case 8:
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case 16:
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case 24:
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case 32:
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/*
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* I/O drive capacity setting:
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* 2mA: 0
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* 4mA: 1
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* 8mA: 3
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* 16mA: 7
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* 24mA: 11
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* 32mA: 15
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*/
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set_val = DIV_ROUND_CLOSEST(arg, 2) - 1;
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break;
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default:
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ret = -EINVAL;
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goto err;
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}
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/* update drive setting */
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val = readl(priv->base + pin->dsel_offset);
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val &= ~(DSEL_MASK << pin->dsel_shift);
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val |= set_val << pin->dsel_shift;
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writel(val, priv->base + pin->dsel_offset);
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break;
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default:
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ret = -EOPNOTSUPP;
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goto err;
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}
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}
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err:
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spin_unlock_irqrestore(&priv->lock, flags);
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return ret;
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}
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static int visconti_pin_config_group_set(struct pinctrl_dev *pctldev,
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unsigned int selector,
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unsigned long *configs,
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unsigned int num_configs)
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{
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struct visconti_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev);
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const unsigned int *pins;
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unsigned int num_pins;
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int i, ret;
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pins = priv->devdata->groups[selector].pins;
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num_pins = priv->devdata->groups[selector].nr_pins;
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dev_dbg(priv->dev, "%s: select = %d, n_pin = %d, n_config = %d\n",
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__func__, selector, num_pins, num_configs);
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for (i = 0; i < num_pins; i++) {
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ret = visconti_pin_config_set(pctldev, pins[i],
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configs, num_configs);
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if (ret)
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return ret;
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}
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return 0;
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}
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static const struct pinconf_ops visconti_pinconf_ops = {
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.is_generic = true,
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.pin_config_set = visconti_pin_config_set,
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.pin_config_group_set = visconti_pin_config_group_set,
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.pin_config_config_dbg_show = pinconf_generic_dump_config,
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};
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/* pinctrl */
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static int visconti_get_groups_count(struct pinctrl_dev *pctldev)
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{
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struct visconti_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev);
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return priv->devdata->nr_groups;
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}
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static const char *visconti_get_group_name(struct pinctrl_dev *pctldev,
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unsigned int selector)
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{
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struct visconti_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev);
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return priv->devdata->groups[selector].name;
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}
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static int visconti_get_group_pins(struct pinctrl_dev *pctldev,
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unsigned int selector,
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const unsigned int **pins,
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unsigned int *num_pins)
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{
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struct visconti_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev);
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*pins = priv->devdata->groups[selector].pins;
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*num_pins = priv->devdata->groups[selector].nr_pins;
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return 0;
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}
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static const struct pinctrl_ops visconti_pinctrl_ops = {
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.get_groups_count = visconti_get_groups_count,
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.get_group_name = visconti_get_group_name,
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.get_group_pins = visconti_get_group_pins,
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.dt_node_to_map = pinconf_generic_dt_node_to_map_group,
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.dt_free_map = pinctrl_utils_free_map,
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};
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/* pinmux */
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static int visconti_get_functions_count(struct pinctrl_dev *pctldev)
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{
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struct visconti_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev);
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return priv->devdata->nr_functions;
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}
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static const char *visconti_get_function_name(struct pinctrl_dev *pctldev,
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unsigned int selector)
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{
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struct visconti_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev);
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return priv->devdata->functions[selector].name;
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}
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static int visconti_get_function_groups(struct pinctrl_dev *pctldev,
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unsigned int selector,
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const char * const **groups,
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unsigned * const num_groups)
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{
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struct visconti_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev);
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*groups = priv->devdata->functions[selector].groups;
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*num_groups = priv->devdata->functions[selector].nr_groups;
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return 0;
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}
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static int visconti_set_mux(struct pinctrl_dev *pctldev,
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unsigned int function, unsigned int group)
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{
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struct visconti_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev);
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const struct visconti_pin_function *func = &priv->devdata->functions[function];
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const struct visconti_pin_group *grp = &priv->devdata->groups[group];
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const struct visconti_mux *mux = &grp->mux;
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unsigned int val;
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unsigned long flags;
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dev_dbg(priv->dev, "%s: function = %d(%s) group = %d(%s)\n", __func__,
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function, func->name, group, grp->name);
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spin_lock_irqsave(&priv->lock, flags);
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/* update mux */
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val = readl(priv->base + mux->offset);
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val &= ~mux->mask;
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val |= mux->val;
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writel(val, priv->base + mux->offset);
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spin_unlock_irqrestore(&priv->lock, flags);
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dev_dbg(priv->dev, "[%x]: 0x%x\n", mux->offset, val);
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return 0;
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}
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static int visconti_gpio_request_enable(struct pinctrl_dev *pctldev,
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struct pinctrl_gpio_range *range,
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unsigned int pin)
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{
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struct visconti_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev);
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const struct visconti_mux *gpio_mux = &priv->devdata->gpio_mux[pin];
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unsigned long flags;
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unsigned int val;
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dev_dbg(priv->dev, "%s: pin = %d\n", __func__, pin);
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/* update mux */
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spin_lock_irqsave(&priv->lock, flags);
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val = readl(priv->base + gpio_mux->offset);
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val &= ~gpio_mux->mask;
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val |= gpio_mux->val;
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writel(val, priv->base + gpio_mux->offset);
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spin_unlock_irqrestore(&priv->lock, flags);
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return 0;
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}
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static const struct pinmux_ops visconti_pinmux_ops = {
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.get_functions_count = visconti_get_functions_count,
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.get_function_name = visconti_get_function_name,
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.get_function_groups = visconti_get_function_groups,
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.set_mux = visconti_set_mux,
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.gpio_request_enable = visconti_gpio_request_enable,
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.strict = true,
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};
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int visconti_pinctrl_probe(struct platform_device *pdev,
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const struct visconti_pinctrl_devdata *devdata)
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{
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struct device *dev = &pdev->dev;
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struct visconti_pinctrl *priv;
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struct pinctrl_pin_desc *pins;
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int i, ret;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->dev = dev;
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priv->devdata = devdata;
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spin_lock_init(&priv->lock);
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priv->base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(priv->base)) {
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dev_err(dev, "unable to map I/O space\n");
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return PTR_ERR(priv->base);
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}
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pins = devm_kcalloc(dev, devdata->nr_pins,
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sizeof(*pins), GFP_KERNEL);
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if (!pins)
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return -ENOMEM;
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for (i = 0; i < devdata->nr_pins; i++)
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pins[i] = devdata->pins[i].pin;
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priv->pctl_desc.name = dev_name(dev);
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priv->pctl_desc.owner = THIS_MODULE;
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priv->pctl_desc.pins = pins;
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priv->pctl_desc.npins = devdata->nr_pins;
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priv->pctl_desc.confops = &visconti_pinconf_ops;
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priv->pctl_desc.pctlops = &visconti_pinctrl_ops;
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priv->pctl_desc.pmxops = &visconti_pinmux_ops;
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ret = devm_pinctrl_register_and_init(dev, &priv->pctl_desc,
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priv, &priv->pctl);
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if (ret) {
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dev_err(dev, "couldn't register pinctrl: %d\n", ret);
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return ret;
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}
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if (devdata->unlock)
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devdata->unlock(priv->base);
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return pinctrl_enable(priv->pctl);
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}
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