452 lines
11 KiB
C
452 lines
11 KiB
C
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* VFIO PCI Intel Graphics support
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*
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* Copyright (C) 2016 Red Hat, Inc. All rights reserved.
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* Author: Alex Williamson <alex.williamson@redhat.com>
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*
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* Register a device specific region through which to provide read-only
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* access to the Intel IGD opregion. The register defining the opregion
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* address is also virtualized to prevent user modification.
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*/
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#include <linux/io.h>
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#include <linux/pci.h>
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#include <linux/uaccess.h>
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#include <linux/vfio.h>
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#include "vfio_pci_priv.h"
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#define OPREGION_SIGNATURE "IntelGraphicsMem"
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#define OPREGION_SIZE (8 * 1024)
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#define OPREGION_PCI_ADDR 0xfc
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#define OPREGION_RVDA 0x3ba
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#define OPREGION_RVDS 0x3c2
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#define OPREGION_VERSION 0x16
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struct igd_opregion_vbt {
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void *opregion;
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void *vbt_ex;
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};
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/**
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* igd_opregion_shift_copy() - Copy OpRegion to user buffer and shift position.
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* @dst: User buffer ptr to copy to.
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* @off: Offset to user buffer ptr. Increased by bytes on return.
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* @src: Source buffer to copy from.
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* @pos: Increased by bytes on return.
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* @remaining: Decreased by bytes on return.
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* @bytes: Bytes to copy and adjust off, pos and remaining.
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*
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* Copy OpRegion to offset from specific source ptr and shift the offset.
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*
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* Return: 0 on success, -EFAULT otherwise.
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*
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*/
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static inline unsigned long igd_opregion_shift_copy(char __user *dst,
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loff_t *off,
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void *src,
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loff_t *pos,
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size_t *remaining,
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size_t bytes)
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{
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if (copy_to_user(dst + (*off), src, bytes))
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return -EFAULT;
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*off += bytes;
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*pos += bytes;
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*remaining -= bytes;
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return 0;
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}
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static ssize_t vfio_pci_igd_rw(struct vfio_pci_core_device *vdev,
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char __user *buf, size_t count, loff_t *ppos,
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bool iswrite)
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{
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unsigned int i = VFIO_PCI_OFFSET_TO_INDEX(*ppos) - VFIO_PCI_NUM_REGIONS;
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struct igd_opregion_vbt *opregionvbt = vdev->region[i].data;
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loff_t pos = *ppos & VFIO_PCI_OFFSET_MASK, off = 0;
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size_t remaining;
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if (pos >= vdev->region[i].size || iswrite)
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return -EINVAL;
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count = min_t(size_t, count, vdev->region[i].size - pos);
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remaining = count;
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/* Copy until OpRegion version */
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if (remaining && pos < OPREGION_VERSION) {
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size_t bytes = min_t(size_t, remaining, OPREGION_VERSION - pos);
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if (igd_opregion_shift_copy(buf, &off,
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opregionvbt->opregion + pos, &pos,
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&remaining, bytes))
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return -EFAULT;
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}
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/* Copy patched (if necessary) OpRegion version */
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if (remaining && pos < OPREGION_VERSION + sizeof(__le16)) {
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size_t bytes = min_t(size_t, remaining,
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OPREGION_VERSION + sizeof(__le16) - pos);
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__le16 version = *(__le16 *)(opregionvbt->opregion +
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OPREGION_VERSION);
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/* Patch to 2.1 if OpRegion 2.0 has extended VBT */
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if (le16_to_cpu(version) == 0x0200 && opregionvbt->vbt_ex)
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version = cpu_to_le16(0x0201);
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if (igd_opregion_shift_copy(buf, &off,
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(u8 *)&version +
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(pos - OPREGION_VERSION),
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&pos, &remaining, bytes))
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return -EFAULT;
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}
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/* Copy until RVDA */
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if (remaining && pos < OPREGION_RVDA) {
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size_t bytes = min_t(size_t, remaining, OPREGION_RVDA - pos);
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if (igd_opregion_shift_copy(buf, &off,
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opregionvbt->opregion + pos, &pos,
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&remaining, bytes))
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return -EFAULT;
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}
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/* Copy modified (if necessary) RVDA */
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if (remaining && pos < OPREGION_RVDA + sizeof(__le64)) {
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size_t bytes = min_t(size_t, remaining,
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OPREGION_RVDA + sizeof(__le64) - pos);
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__le64 rvda = cpu_to_le64(opregionvbt->vbt_ex ?
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OPREGION_SIZE : 0);
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if (igd_opregion_shift_copy(buf, &off,
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(u8 *)&rvda + (pos - OPREGION_RVDA),
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&pos, &remaining, bytes))
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return -EFAULT;
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}
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/* Copy the rest of OpRegion */
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if (remaining && pos < OPREGION_SIZE) {
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size_t bytes = min_t(size_t, remaining, OPREGION_SIZE - pos);
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if (igd_opregion_shift_copy(buf, &off,
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opregionvbt->opregion + pos, &pos,
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&remaining, bytes))
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return -EFAULT;
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}
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/* Copy extended VBT if exists */
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if (remaining &&
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copy_to_user(buf + off, opregionvbt->vbt_ex + (pos - OPREGION_SIZE),
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remaining))
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return -EFAULT;
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*ppos += count;
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return count;
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}
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static void vfio_pci_igd_release(struct vfio_pci_core_device *vdev,
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struct vfio_pci_region *region)
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{
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struct igd_opregion_vbt *opregionvbt = region->data;
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if (opregionvbt->vbt_ex)
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memunmap(opregionvbt->vbt_ex);
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memunmap(opregionvbt->opregion);
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kfree(opregionvbt);
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}
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static const struct vfio_pci_regops vfio_pci_igd_regops = {
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.rw = vfio_pci_igd_rw,
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.release = vfio_pci_igd_release,
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};
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static int vfio_pci_igd_opregion_init(struct vfio_pci_core_device *vdev)
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{
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__le32 *dwordp = (__le32 *)(vdev->vconfig + OPREGION_PCI_ADDR);
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u32 addr, size;
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struct igd_opregion_vbt *opregionvbt;
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int ret;
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u16 version;
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ret = pci_read_config_dword(vdev->pdev, OPREGION_PCI_ADDR, &addr);
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if (ret)
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return ret;
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if (!addr || !(~addr))
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return -ENODEV;
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opregionvbt = kzalloc(sizeof(*opregionvbt), GFP_KERNEL_ACCOUNT);
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if (!opregionvbt)
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return -ENOMEM;
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opregionvbt->opregion = memremap(addr, OPREGION_SIZE, MEMREMAP_WB);
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if (!opregionvbt->opregion) {
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kfree(opregionvbt);
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return -ENOMEM;
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}
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if (memcmp(opregionvbt->opregion, OPREGION_SIGNATURE, 16)) {
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memunmap(opregionvbt->opregion);
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kfree(opregionvbt);
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return -EINVAL;
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}
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size = le32_to_cpu(*(__le32 *)(opregionvbt->opregion + 16));
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if (!size) {
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memunmap(opregionvbt->opregion);
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kfree(opregionvbt);
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return -EINVAL;
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}
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size *= 1024; /* In KB */
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/*
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* OpRegion and VBT:
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* When VBT data doesn't exceed 6KB, it's stored in Mailbox #4.
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* When VBT data exceeds 6KB size, Mailbox #4 is no longer large enough
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* to hold the VBT data, the Extended VBT region is introduced since
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* OpRegion 2.0 to hold the VBT data. Since OpRegion 2.0, RVDA/RVDS are
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* introduced to define the extended VBT data location and size.
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* OpRegion 2.0: RVDA defines the absolute physical address of the
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* extended VBT data, RVDS defines the VBT data size.
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* OpRegion 2.1 and above: RVDA defines the relative address of the
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* extended VBT data to OpRegion base, RVDS defines the VBT data size.
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*
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* Due to the RVDA definition diff in OpRegion VBT (also the only diff
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* between 2.0 and 2.1), exposing OpRegion and VBT as a contiguous range
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* for OpRegion 2.0 and above makes it possible to support the
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* non-contiguous VBT through a single vfio region. From r/w ops view,
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* only contiguous VBT after OpRegion with version 2.1+ is exposed,
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* regardless the host OpRegion is 2.0 or non-contiguous 2.1+. The r/w
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* ops will on-the-fly shift the actural offset into VBT so that data at
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* correct position can be returned to the requester.
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*/
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version = le16_to_cpu(*(__le16 *)(opregionvbt->opregion +
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OPREGION_VERSION));
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if (version >= 0x0200) {
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u64 rvda = le64_to_cpu(*(__le64 *)(opregionvbt->opregion +
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OPREGION_RVDA));
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u32 rvds = le32_to_cpu(*(__le32 *)(opregionvbt->opregion +
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OPREGION_RVDS));
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/* The extended VBT is valid only when RVDA/RVDS are non-zero */
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if (rvda && rvds) {
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size += rvds;
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/*
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* Extended VBT location by RVDA:
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* Absolute physical addr for 2.0.
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* Relative addr to OpRegion header for 2.1+.
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*/
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if (version == 0x0200)
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addr = rvda;
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else
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addr += rvda;
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opregionvbt->vbt_ex = memremap(addr, rvds, MEMREMAP_WB);
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if (!opregionvbt->vbt_ex) {
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memunmap(opregionvbt->opregion);
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kfree(opregionvbt);
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return -ENOMEM;
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}
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}
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}
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ret = vfio_pci_core_register_dev_region(vdev,
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PCI_VENDOR_ID_INTEL | VFIO_REGION_TYPE_PCI_VENDOR_TYPE,
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VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION, &vfio_pci_igd_regops,
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size, VFIO_REGION_INFO_FLAG_READ, opregionvbt);
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if (ret) {
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if (opregionvbt->vbt_ex)
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memunmap(opregionvbt->vbt_ex);
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memunmap(opregionvbt->opregion);
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kfree(opregionvbt);
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return ret;
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}
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/* Fill vconfig with the hw value and virtualize register */
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*dwordp = cpu_to_le32(addr);
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memset(vdev->pci_config_map + OPREGION_PCI_ADDR,
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PCI_CAP_ID_INVALID_VIRT, 4);
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return ret;
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}
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static ssize_t vfio_pci_igd_cfg_rw(struct vfio_pci_core_device *vdev,
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char __user *buf, size_t count, loff_t *ppos,
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bool iswrite)
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{
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unsigned int i = VFIO_PCI_OFFSET_TO_INDEX(*ppos) - VFIO_PCI_NUM_REGIONS;
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struct pci_dev *pdev = vdev->region[i].data;
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loff_t pos = *ppos & VFIO_PCI_OFFSET_MASK;
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size_t size;
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int ret;
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if (pos >= vdev->region[i].size || iswrite)
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return -EINVAL;
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size = count = min(count, (size_t)(vdev->region[i].size - pos));
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if ((pos & 1) && size) {
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u8 val;
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ret = pci_user_read_config_byte(pdev, pos, &val);
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if (ret)
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return ret;
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if (copy_to_user(buf + count - size, &val, 1))
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return -EFAULT;
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pos++;
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size--;
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}
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if ((pos & 3) && size > 2) {
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u16 val;
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__le16 lval;
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ret = pci_user_read_config_word(pdev, pos, &val);
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if (ret)
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return ret;
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lval = cpu_to_le16(val);
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if (copy_to_user(buf + count - size, &lval, 2))
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return -EFAULT;
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pos += 2;
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size -= 2;
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}
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while (size > 3) {
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u32 val;
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__le32 lval;
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ret = pci_user_read_config_dword(pdev, pos, &val);
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if (ret)
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return ret;
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lval = cpu_to_le32(val);
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if (copy_to_user(buf + count - size, &lval, 4))
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return -EFAULT;
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pos += 4;
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size -= 4;
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}
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while (size >= 2) {
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u16 val;
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__le16 lval;
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ret = pci_user_read_config_word(pdev, pos, &val);
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if (ret)
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return ret;
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lval = cpu_to_le16(val);
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if (copy_to_user(buf + count - size, &lval, 2))
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return -EFAULT;
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pos += 2;
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size -= 2;
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}
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while (size) {
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u8 val;
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ret = pci_user_read_config_byte(pdev, pos, &val);
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if (ret)
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return ret;
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if (copy_to_user(buf + count - size, &val, 1))
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return -EFAULT;
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||
|
|
pos++;
|
||
|
|
size--;
|
||
|
|
}
|
||
|
|
|
||
|
|
*ppos += count;
|
||
|
|
|
||
|
|
return count;
|
||
|
|
}
|
||
|
|
|
||
|
|
static void vfio_pci_igd_cfg_release(struct vfio_pci_core_device *vdev,
|
||
|
|
struct vfio_pci_region *region)
|
||
|
|
{
|
||
|
|
struct pci_dev *pdev = region->data;
|
||
|
|
|
||
|
|
pci_dev_put(pdev);
|
||
|
|
}
|
||
|
|
|
||
|
|
static const struct vfio_pci_regops vfio_pci_igd_cfg_regops = {
|
||
|
|
.rw = vfio_pci_igd_cfg_rw,
|
||
|
|
.release = vfio_pci_igd_cfg_release,
|
||
|
|
};
|
||
|
|
|
||
|
|
static int vfio_pci_igd_cfg_init(struct vfio_pci_core_device *vdev)
|
||
|
|
{
|
||
|
|
struct pci_dev *host_bridge, *lpc_bridge;
|
||
|
|
int ret;
|
||
|
|
|
||
|
|
host_bridge = pci_get_domain_bus_and_slot(0, 0, PCI_DEVFN(0, 0));
|
||
|
|
if (!host_bridge)
|
||
|
|
return -ENODEV;
|
||
|
|
|
||
|
|
if (host_bridge->vendor != PCI_VENDOR_ID_INTEL ||
|
||
|
|
host_bridge->class != (PCI_CLASS_BRIDGE_HOST << 8)) {
|
||
|
|
pci_dev_put(host_bridge);
|
||
|
|
return -EINVAL;
|
||
|
|
}
|
||
|
|
|
||
|
|
ret = vfio_pci_core_register_dev_region(vdev,
|
||
|
|
PCI_VENDOR_ID_INTEL | VFIO_REGION_TYPE_PCI_VENDOR_TYPE,
|
||
|
|
VFIO_REGION_SUBTYPE_INTEL_IGD_HOST_CFG,
|
||
|
|
&vfio_pci_igd_cfg_regops, host_bridge->cfg_size,
|
||
|
|
VFIO_REGION_INFO_FLAG_READ, host_bridge);
|
||
|
|
if (ret) {
|
||
|
|
pci_dev_put(host_bridge);
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
lpc_bridge = pci_get_domain_bus_and_slot(0, 0, PCI_DEVFN(0x1f, 0));
|
||
|
|
if (!lpc_bridge)
|
||
|
|
return -ENODEV;
|
||
|
|
|
||
|
|
if (lpc_bridge->vendor != PCI_VENDOR_ID_INTEL ||
|
||
|
|
lpc_bridge->class != (PCI_CLASS_BRIDGE_ISA << 8)) {
|
||
|
|
pci_dev_put(lpc_bridge);
|
||
|
|
return -EINVAL;
|
||
|
|
}
|
||
|
|
|
||
|
|
ret = vfio_pci_core_register_dev_region(vdev,
|
||
|
|
PCI_VENDOR_ID_INTEL | VFIO_REGION_TYPE_PCI_VENDOR_TYPE,
|
||
|
|
VFIO_REGION_SUBTYPE_INTEL_IGD_LPC_CFG,
|
||
|
|
&vfio_pci_igd_cfg_regops, lpc_bridge->cfg_size,
|
||
|
|
VFIO_REGION_INFO_FLAG_READ, lpc_bridge);
|
||
|
|
if (ret) {
|
||
|
|
pci_dev_put(lpc_bridge);
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
int vfio_pci_igd_init(struct vfio_pci_core_device *vdev)
|
||
|
|
{
|
||
|
|
int ret;
|
||
|
|
|
||
|
|
ret = vfio_pci_igd_opregion_init(vdev);
|
||
|
|
if (ret)
|
||
|
|
return ret;
|
||
|
|
|
||
|
|
ret = vfio_pci_igd_cfg_init(vdev);
|
||
|
|
if (ret)
|
||
|
|
return ret;
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|