549 lines
14 KiB
C
549 lines
14 KiB
C
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* (C) Copyright 2008
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* Stefano Babic, DENX Software Engineering, sbabic@denx.de.
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*
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* This driver implements a lcd device for the ILITEK 922x display
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* controller. The interface to the display is SPI and the display's
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* memory is cyclically updated over the RGB interface.
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*/
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#include <linux/fb.h>
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#include <linux/delay.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/lcd.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/slab.h>
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#include <linux/spi/spi.h>
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#include <linux/string.h>
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/* Register offset, see manual section 8.2 */
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#define REG_START_OSCILLATION 0x00
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#define REG_DRIVER_CODE_READ 0x00
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#define REG_DRIVER_OUTPUT_CONTROL 0x01
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#define REG_LCD_AC_DRIVEING_CONTROL 0x02
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#define REG_ENTRY_MODE 0x03
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#define REG_COMPARE_1 0x04
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#define REG_COMPARE_2 0x05
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#define REG_DISPLAY_CONTROL_1 0x07
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#define REG_DISPLAY_CONTROL_2 0x08
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#define REG_DISPLAY_CONTROL_3 0x09
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#define REG_FRAME_CYCLE_CONTROL 0x0B
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#define REG_EXT_INTF_CONTROL 0x0C
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#define REG_POWER_CONTROL_1 0x10
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#define REG_POWER_CONTROL_2 0x11
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#define REG_POWER_CONTROL_3 0x12
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#define REG_POWER_CONTROL_4 0x13
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#define REG_RAM_ADDRESS_SET 0x21
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#define REG_WRITE_DATA_TO_GRAM 0x22
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#define REG_RAM_WRITE_MASK1 0x23
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#define REG_RAM_WRITE_MASK2 0x24
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#define REG_GAMMA_CONTROL_1 0x30
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#define REG_GAMMA_CONTROL_2 0x31
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#define REG_GAMMA_CONTROL_3 0x32
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#define REG_GAMMA_CONTROL_4 0x33
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#define REG_GAMMA_CONTROL_5 0x34
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#define REG_GAMMA_CONTROL_6 0x35
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#define REG_GAMMA_CONTROL_7 0x36
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#define REG_GAMMA_CONTROL_8 0x37
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#define REG_GAMMA_CONTROL_9 0x38
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#define REG_GAMMA_CONTROL_10 0x39
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#define REG_GATE_SCAN_CONTROL 0x40
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#define REG_VERT_SCROLL_CONTROL 0x41
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#define REG_FIRST_SCREEN_DRIVE_POS 0x42
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#define REG_SECOND_SCREEN_DRIVE_POS 0x43
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#define REG_RAM_ADDR_POS_H 0x44
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#define REG_RAM_ADDR_POS_V 0x45
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#define REG_OSCILLATOR_CONTROL 0x4F
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#define REG_GPIO 0x60
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#define REG_OTP_VCM_PROGRAMMING 0x61
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#define REG_OTP_VCM_STATUS_ENABLE 0x62
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#define REG_OTP_PROGRAMMING_ID_KEY 0x65
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/*
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* maximum frequency for register access
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* (not for the GRAM access)
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*/
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#define ILITEK_MAX_FREQ_REG 4000000
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/*
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* Device ID as found in the datasheet (supports 9221 and 9222)
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*/
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#define ILITEK_DEVICE_ID 0x9220
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#define ILITEK_DEVICE_ID_MASK 0xFFF0
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/* Last two bits in the START BYTE */
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#define START_RS_INDEX 0
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#define START_RS_REG 1
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#define START_RW_WRITE 0
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#define START_RW_READ 1
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/**
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* START_BYTE(id, rs, rw)
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*
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* Set the start byte according to the required operation.
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* The start byte is defined as:
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* ----------------------------------
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* | 0 | 1 | 1 | 1 | 0 | ID | RS | RW |
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* ----------------------------------
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* @id: display's id as set by the manufacturer
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* @rs: operation type bit, one of:
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* - START_RS_INDEX set the index register
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* - START_RS_REG write/read registers/GRAM
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* @rw: read/write operation
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* - START_RW_WRITE write
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* - START_RW_READ read
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*/
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#define START_BYTE(id, rs, rw) \
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(0x70 | (((id) & 0x01) << 2) | (((rs) & 0x01) << 1) | ((rw) & 0x01))
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/**
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* CHECK_FREQ_REG(spi_device s, spi_transfer x) - Check the frequency
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* for the SPI transfer. According to the datasheet, the controller
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* accept higher frequency for the GRAM transfer, but it requires
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* lower frequency when the registers are read/written.
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* The macro sets the frequency in the spi_transfer structure if
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* the frequency exceeds the maximum value.
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* @s: pointer to an SPI device
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* @x: pointer to the read/write buffer pair
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*/
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#define CHECK_FREQ_REG(s, x) \
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do { \
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if (s->max_speed_hz > ILITEK_MAX_FREQ_REG) \
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((struct spi_transfer *)x)->speed_hz = \
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ILITEK_MAX_FREQ_REG; \
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} while (0)
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#define CMD_BUFSIZE 16
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#define POWER_IS_ON(pwr) ((pwr) <= FB_BLANK_NORMAL)
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#define set_tx_byte(b) (tx_invert ? ~(b) : b)
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/*
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* ili922x_id - id as set by manufacturer
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*/
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static int ili922x_id = 1;
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module_param(ili922x_id, int, 0);
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static int tx_invert;
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module_param(tx_invert, int, 0);
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/*
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* driver's private structure
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*/
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struct ili922x {
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struct spi_device *spi;
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struct lcd_device *ld;
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int power;
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};
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/**
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* ili922x_read_status - read status register from display
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* @spi: spi device
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* @rs: output value
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*/
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static int ili922x_read_status(struct spi_device *spi, u16 *rs)
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{
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struct spi_message msg;
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struct spi_transfer xfer;
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unsigned char tbuf[CMD_BUFSIZE];
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unsigned char rbuf[CMD_BUFSIZE];
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int ret, i;
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memset(&xfer, 0, sizeof(struct spi_transfer));
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spi_message_init(&msg);
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xfer.tx_buf = tbuf;
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xfer.rx_buf = rbuf;
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xfer.cs_change = 1;
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CHECK_FREQ_REG(spi, &xfer);
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tbuf[0] = set_tx_byte(START_BYTE(ili922x_id, START_RS_INDEX,
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START_RW_READ));
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/*
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* we need 4-byte xfer here due to invalid dummy byte
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* received after start byte
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*/
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for (i = 1; i < 4; i++)
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tbuf[i] = set_tx_byte(0); /* dummy */
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xfer.bits_per_word = 8;
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xfer.len = 4;
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spi_message_add_tail(&xfer, &msg);
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ret = spi_sync(spi, &msg);
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if (ret < 0) {
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dev_dbg(&spi->dev, "Error sending SPI message 0x%x", ret);
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return ret;
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}
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*rs = (rbuf[2] << 8) + rbuf[3];
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return 0;
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}
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/**
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* ili922x_read - read register from display
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* @spi: spi device
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* @reg: offset of the register to be read
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* @rx: output value
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*/
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static int ili922x_read(struct spi_device *spi, u8 reg, u16 *rx)
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{
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struct spi_message msg;
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struct spi_transfer xfer_regindex, xfer_regvalue;
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unsigned char tbuf[CMD_BUFSIZE];
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unsigned char rbuf[CMD_BUFSIZE];
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int ret, len = 0, send_bytes;
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memset(&xfer_regindex, 0, sizeof(struct spi_transfer));
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memset(&xfer_regvalue, 0, sizeof(struct spi_transfer));
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spi_message_init(&msg);
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xfer_regindex.tx_buf = tbuf;
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xfer_regindex.rx_buf = rbuf;
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xfer_regindex.cs_change = 1;
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CHECK_FREQ_REG(spi, &xfer_regindex);
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tbuf[0] = set_tx_byte(START_BYTE(ili922x_id, START_RS_INDEX,
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START_RW_WRITE));
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tbuf[1] = set_tx_byte(0);
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tbuf[2] = set_tx_byte(reg);
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xfer_regindex.bits_per_word = 8;
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len = xfer_regindex.len = 3;
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spi_message_add_tail(&xfer_regindex, &msg);
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send_bytes = len;
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tbuf[len++] = set_tx_byte(START_BYTE(ili922x_id, START_RS_REG,
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START_RW_READ));
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tbuf[len++] = set_tx_byte(0);
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tbuf[len] = set_tx_byte(0);
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xfer_regvalue.cs_change = 1;
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xfer_regvalue.len = 3;
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xfer_regvalue.tx_buf = &tbuf[send_bytes];
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xfer_regvalue.rx_buf = &rbuf[send_bytes];
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CHECK_FREQ_REG(spi, &xfer_regvalue);
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spi_message_add_tail(&xfer_regvalue, &msg);
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ret = spi_sync(spi, &msg);
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if (ret < 0) {
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dev_dbg(&spi->dev, "Error sending SPI message 0x%x", ret);
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return ret;
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}
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*rx = (rbuf[1 + send_bytes] << 8) + rbuf[2 + send_bytes];
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return 0;
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}
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/**
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* ili922x_write - write a controller register
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* @spi: struct spi_device *
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* @reg: offset of the register to be written
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* @value: value to be written
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*/
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static int ili922x_write(struct spi_device *spi, u8 reg, u16 value)
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{
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struct spi_message msg;
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struct spi_transfer xfer_regindex, xfer_regvalue;
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unsigned char tbuf[CMD_BUFSIZE];
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unsigned char rbuf[CMD_BUFSIZE];
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int ret;
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memset(&xfer_regindex, 0, sizeof(struct spi_transfer));
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memset(&xfer_regvalue, 0, sizeof(struct spi_transfer));
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spi_message_init(&msg);
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xfer_regindex.tx_buf = tbuf;
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xfer_regindex.rx_buf = rbuf;
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xfer_regindex.cs_change = 1;
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CHECK_FREQ_REG(spi, &xfer_regindex);
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tbuf[0] = set_tx_byte(START_BYTE(ili922x_id, START_RS_INDEX,
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START_RW_WRITE));
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tbuf[1] = set_tx_byte(0);
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tbuf[2] = set_tx_byte(reg);
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xfer_regindex.bits_per_word = 8;
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xfer_regindex.len = 3;
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spi_message_add_tail(&xfer_regindex, &msg);
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ret = spi_sync(spi, &msg);
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spi_message_init(&msg);
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tbuf[0] = set_tx_byte(START_BYTE(ili922x_id, START_RS_REG,
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START_RW_WRITE));
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tbuf[1] = set_tx_byte((value & 0xFF00) >> 8);
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tbuf[2] = set_tx_byte(value & 0x00FF);
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xfer_regvalue.cs_change = 1;
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xfer_regvalue.len = 3;
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xfer_regvalue.tx_buf = tbuf;
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xfer_regvalue.rx_buf = rbuf;
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CHECK_FREQ_REG(spi, &xfer_regvalue);
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spi_message_add_tail(&xfer_regvalue, &msg);
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ret = spi_sync(spi, &msg);
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if (ret < 0) {
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dev_err(&spi->dev, "Error sending SPI message 0x%x", ret);
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return ret;
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}
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return 0;
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}
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#ifdef DEBUG
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/**
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* ili922x_reg_dump - dump all registers
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*
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* @spi: pointer to an SPI device
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*/
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static void ili922x_reg_dump(struct spi_device *spi)
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{
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u8 reg;
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u16 rx;
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dev_dbg(&spi->dev, "ILI922x configuration registers:\n");
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for (reg = REG_START_OSCILLATION;
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reg <= REG_OTP_PROGRAMMING_ID_KEY; reg++) {
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ili922x_read(spi, reg, &rx);
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dev_dbg(&spi->dev, "reg @ 0x%02X: 0x%04X\n", reg, rx);
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}
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}
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#else
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static inline void ili922x_reg_dump(struct spi_device *spi) {}
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#endif
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/**
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* set_write_to_gram_reg - initialize the display to write the GRAM
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* @spi: spi device
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*/
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static void set_write_to_gram_reg(struct spi_device *spi)
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{
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struct spi_message msg;
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struct spi_transfer xfer;
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unsigned char tbuf[CMD_BUFSIZE];
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memset(&xfer, 0, sizeof(struct spi_transfer));
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spi_message_init(&msg);
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xfer.tx_buf = tbuf;
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xfer.rx_buf = NULL;
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xfer.cs_change = 1;
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tbuf[0] = START_BYTE(ili922x_id, START_RS_INDEX, START_RW_WRITE);
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tbuf[1] = 0;
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tbuf[2] = REG_WRITE_DATA_TO_GRAM;
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xfer.bits_per_word = 8;
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xfer.len = 3;
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spi_message_add_tail(&xfer, &msg);
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spi_sync(spi, &msg);
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}
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/**
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* ili922x_poweron - turn the display on
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* @spi: spi device
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*
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* The sequence to turn on the display is taken from
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* the datasheet and/or the example code provided by the
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* manufacturer.
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*/
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static int ili922x_poweron(struct spi_device *spi)
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{
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int ret;
|
||
|
|
|
||
|
|
/* Power on */
|
||
|
|
ret = ili922x_write(spi, REG_POWER_CONTROL_1, 0x0000);
|
||
|
|
usleep_range(10000, 10500);
|
||
|
|
ret += ili922x_write(spi, REG_POWER_CONTROL_2, 0x0000);
|
||
|
|
ret += ili922x_write(spi, REG_POWER_CONTROL_3, 0x0000);
|
||
|
|
msleep(40);
|
||
|
|
ret += ili922x_write(spi, REG_POWER_CONTROL_4, 0x0000);
|
||
|
|
msleep(40);
|
||
|
|
/* register 0x56 is not documented in the datasheet */
|
||
|
|
ret += ili922x_write(spi, 0x56, 0x080F);
|
||
|
|
ret += ili922x_write(spi, REG_POWER_CONTROL_1, 0x4240);
|
||
|
|
usleep_range(10000, 10500);
|
||
|
|
ret += ili922x_write(spi, REG_POWER_CONTROL_2, 0x0000);
|
||
|
|
ret += ili922x_write(spi, REG_POWER_CONTROL_3, 0x0014);
|
||
|
|
msleep(40);
|
||
|
|
ret += ili922x_write(spi, REG_POWER_CONTROL_4, 0x1319);
|
||
|
|
msleep(40);
|
||
|
|
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* ili922x_poweroff - turn the display off
|
||
|
|
* @spi: spi device
|
||
|
|
*/
|
||
|
|
static int ili922x_poweroff(struct spi_device *spi)
|
||
|
|
{
|
||
|
|
int ret;
|
||
|
|
|
||
|
|
/* Power off */
|
||
|
|
ret = ili922x_write(spi, REG_POWER_CONTROL_1, 0x0000);
|
||
|
|
usleep_range(10000, 10500);
|
||
|
|
ret += ili922x_write(spi, REG_POWER_CONTROL_2, 0x0000);
|
||
|
|
ret += ili922x_write(spi, REG_POWER_CONTROL_3, 0x0000);
|
||
|
|
msleep(40);
|
||
|
|
ret += ili922x_write(spi, REG_POWER_CONTROL_4, 0x0000);
|
||
|
|
msleep(40);
|
||
|
|
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* ili922x_display_init - initialize the display by setting
|
||
|
|
* the configuration registers
|
||
|
|
* @spi: spi device
|
||
|
|
*/
|
||
|
|
static void ili922x_display_init(struct spi_device *spi)
|
||
|
|
{
|
||
|
|
ili922x_write(spi, REG_START_OSCILLATION, 1);
|
||
|
|
usleep_range(10000, 10500);
|
||
|
|
ili922x_write(spi, REG_DRIVER_OUTPUT_CONTROL, 0x691B);
|
||
|
|
ili922x_write(spi, REG_LCD_AC_DRIVEING_CONTROL, 0x0700);
|
||
|
|
ili922x_write(spi, REG_ENTRY_MODE, 0x1030);
|
||
|
|
ili922x_write(spi, REG_COMPARE_1, 0x0000);
|
||
|
|
ili922x_write(spi, REG_COMPARE_2, 0x0000);
|
||
|
|
ili922x_write(spi, REG_DISPLAY_CONTROL_1, 0x0037);
|
||
|
|
ili922x_write(spi, REG_DISPLAY_CONTROL_2, 0x0202);
|
||
|
|
ili922x_write(spi, REG_DISPLAY_CONTROL_3, 0x0000);
|
||
|
|
ili922x_write(spi, REG_FRAME_CYCLE_CONTROL, 0x0000);
|
||
|
|
|
||
|
|
/* Set RGB interface */
|
||
|
|
ili922x_write(spi, REG_EXT_INTF_CONTROL, 0x0110);
|
||
|
|
|
||
|
|
ili922x_poweron(spi);
|
||
|
|
|
||
|
|
ili922x_write(spi, REG_GAMMA_CONTROL_1, 0x0302);
|
||
|
|
ili922x_write(spi, REG_GAMMA_CONTROL_2, 0x0407);
|
||
|
|
ili922x_write(spi, REG_GAMMA_CONTROL_3, 0x0304);
|
||
|
|
ili922x_write(spi, REG_GAMMA_CONTROL_4, 0x0203);
|
||
|
|
ili922x_write(spi, REG_GAMMA_CONTROL_5, 0x0706);
|
||
|
|
ili922x_write(spi, REG_GAMMA_CONTROL_6, 0x0407);
|
||
|
|
ili922x_write(spi, REG_GAMMA_CONTROL_7, 0x0706);
|
||
|
|
ili922x_write(spi, REG_GAMMA_CONTROL_8, 0x0000);
|
||
|
|
ili922x_write(spi, REG_GAMMA_CONTROL_9, 0x0C06);
|
||
|
|
ili922x_write(spi, REG_GAMMA_CONTROL_10, 0x0F00);
|
||
|
|
ili922x_write(spi, REG_RAM_ADDRESS_SET, 0x0000);
|
||
|
|
ili922x_write(spi, REG_GATE_SCAN_CONTROL, 0x0000);
|
||
|
|
ili922x_write(spi, REG_VERT_SCROLL_CONTROL, 0x0000);
|
||
|
|
ili922x_write(spi, REG_FIRST_SCREEN_DRIVE_POS, 0xDB00);
|
||
|
|
ili922x_write(spi, REG_SECOND_SCREEN_DRIVE_POS, 0xDB00);
|
||
|
|
ili922x_write(spi, REG_RAM_ADDR_POS_H, 0xAF00);
|
||
|
|
ili922x_write(spi, REG_RAM_ADDR_POS_V, 0xDB00);
|
||
|
|
ili922x_reg_dump(spi);
|
||
|
|
set_write_to_gram_reg(spi);
|
||
|
|
}
|
||
|
|
|
||
|
|
static int ili922x_lcd_power(struct ili922x *lcd, int power)
|
||
|
|
{
|
||
|
|
int ret = 0;
|
||
|
|
|
||
|
|
if (POWER_IS_ON(power) && !POWER_IS_ON(lcd->power))
|
||
|
|
ret = ili922x_poweron(lcd->spi);
|
||
|
|
else if (!POWER_IS_ON(power) && POWER_IS_ON(lcd->power))
|
||
|
|
ret = ili922x_poweroff(lcd->spi);
|
||
|
|
|
||
|
|
if (!ret)
|
||
|
|
lcd->power = power;
|
||
|
|
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int ili922x_set_power(struct lcd_device *ld, int power)
|
||
|
|
{
|
||
|
|
struct ili922x *ili = lcd_get_data(ld);
|
||
|
|
|
||
|
|
return ili922x_lcd_power(ili, power);
|
||
|
|
}
|
||
|
|
|
||
|
|
static int ili922x_get_power(struct lcd_device *ld)
|
||
|
|
{
|
||
|
|
struct ili922x *ili = lcd_get_data(ld);
|
||
|
|
|
||
|
|
return ili->power;
|
||
|
|
}
|
||
|
|
|
||
|
|
static struct lcd_ops ili922x_ops = {
|
||
|
|
.get_power = ili922x_get_power,
|
||
|
|
.set_power = ili922x_set_power,
|
||
|
|
};
|
||
|
|
|
||
|
|
static int ili922x_probe(struct spi_device *spi)
|
||
|
|
{
|
||
|
|
struct ili922x *ili;
|
||
|
|
struct lcd_device *lcd;
|
||
|
|
int ret;
|
||
|
|
u16 reg = 0;
|
||
|
|
|
||
|
|
ili = devm_kzalloc(&spi->dev, sizeof(*ili), GFP_KERNEL);
|
||
|
|
if (!ili)
|
||
|
|
return -ENOMEM;
|
||
|
|
|
||
|
|
ili->spi = spi;
|
||
|
|
spi_set_drvdata(spi, ili);
|
||
|
|
|
||
|
|
/* check if the device is connected */
|
||
|
|
ret = ili922x_read(spi, REG_DRIVER_CODE_READ, ®);
|
||
|
|
if (ret || ((reg & ILITEK_DEVICE_ID_MASK) != ILITEK_DEVICE_ID)) {
|
||
|
|
dev_err(&spi->dev,
|
||
|
|
"no LCD found: Chip ID 0x%x, ret %d\n",
|
||
|
|
reg, ret);
|
||
|
|
return -ENODEV;
|
||
|
|
}
|
||
|
|
|
||
|
|
dev_info(&spi->dev, "ILI%x found, SPI freq %d, mode %d\n",
|
||
|
|
reg, spi->max_speed_hz, spi->mode);
|
||
|
|
|
||
|
|
ret = ili922x_read_status(spi, ®);
|
||
|
|
if (ret) {
|
||
|
|
dev_err(&spi->dev, "reading RS failed...\n");
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
dev_dbg(&spi->dev, "status: 0x%x\n", reg);
|
||
|
|
|
||
|
|
ili922x_display_init(spi);
|
||
|
|
|
||
|
|
ili->power = FB_BLANK_POWERDOWN;
|
||
|
|
|
||
|
|
lcd = devm_lcd_device_register(&spi->dev, "ili922xlcd", &spi->dev, ili,
|
||
|
|
&ili922x_ops);
|
||
|
|
if (IS_ERR(lcd)) {
|
||
|
|
dev_err(&spi->dev, "cannot register LCD\n");
|
||
|
|
return PTR_ERR(lcd);
|
||
|
|
}
|
||
|
|
|
||
|
|
ili->ld = lcd;
|
||
|
|
spi_set_drvdata(spi, ili);
|
||
|
|
|
||
|
|
ili922x_lcd_power(ili, FB_BLANK_UNBLANK);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static void ili922x_remove(struct spi_device *spi)
|
||
|
|
{
|
||
|
|
ili922x_poweroff(spi);
|
||
|
|
}
|
||
|
|
|
||
|
|
static struct spi_driver ili922x_driver = {
|
||
|
|
.driver = {
|
||
|
|
.name = "ili922x",
|
||
|
|
},
|
||
|
|
.probe = ili922x_probe,
|
||
|
|
.remove = ili922x_remove,
|
||
|
|
};
|
||
|
|
|
||
|
|
module_spi_driver(ili922x_driver);
|
||
|
|
|
||
|
|
MODULE_AUTHOR("Stefano Babic <sbabic@denx.de>");
|
||
|
|
MODULE_DESCRIPTION("ILI9221/9222 LCD driver");
|
||
|
|
MODULE_LICENSE("GPL");
|
||
|
|
MODULE_PARM_DESC(ili922x_id, "set controller identifier (default=1)");
|
||
|
|
MODULE_PARM_DESC(tx_invert, "invert bytes before sending");
|