linux-zen-server/tools/perf/pmu-events/arch/x86/amdzen3/branch.json

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[
{
"EventName": "bp_l1_btb_correct",
"EventCode": "0x8a",
"BriefDescription": "L1 Branch Prediction Overrides Existing Prediction (speculative)."
},
{
"EventName": "bp_l2_btb_correct",
"EventCode": "0x8b",
"BriefDescription": "L2 Branch Prediction Overrides Existing Prediction (speculative)."
},
{
"EventName": "bp_dyn_ind_pred",
"EventCode": "0x8e",
"BriefDescription": "Dynamic Indirect Predictions.",
"PublicDescription": "The number of times a branch used the indirect predictor to make a prediction."
},
{
"EventName": "bp_de_redirect",
"EventCode": "0x91",
"BriefDescription": "Decode Redirects",
"PublicDescription": "The number of times the instruction decoder overrides the predicted target."
},
{
"EventName": "bp_l1_tlb_fetch_hit",
"EventCode": "0x94",
"BriefDescription": "The number of instruction fetches that hit in the L1 ITLB.",
"UMask": "0xff"
},
{
"EventName": "bp_l1_tlb_fetch_hit.if1g",
"EventCode": "0x94",
"BriefDescription": "The number of instruction fetches that hit in the L1 ITLB. L1 Instruction TLB hit (1G page size).",
"UMask": "0x04"
},
{
"EventName": "bp_l1_tlb_fetch_hit.if2m",
"EventCode": "0x94",
"BriefDescription": "The number of instruction fetches that hit in the L1 ITLB. L1 Instruction TLB hit (2M page size).",
"UMask": "0x02"
},
{
"EventName": "bp_l1_tlb_fetch_hit.if4k",
"EventCode": "0x94",
"BriefDescription": "The number of instruction fetches that hit in the L1 ITLB. L1 Instrcution TLB hit (4K or 16K page size).",
"UMask": "0x01"
},
{
"EventName": "bp_tlb_rel",
"EventCode": "0x99",
"BriefDescription": "The number of ITLB reload requests."
}
]