347 lines
13 KiB
C
347 lines
13 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* tools/testing/selftests/kvm/include/x86_64/hyperv.h
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*
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* Copyright (C) 2021, Red Hat, Inc.
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*
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*/
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#ifndef SELFTEST_KVM_HYPERV_H
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#define SELFTEST_KVM_HYPERV_H
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#include "processor.h"
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#define HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS 0x40000000
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#define HYPERV_CPUID_INTERFACE 0x40000001
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#define HYPERV_CPUID_VERSION 0x40000002
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#define HYPERV_CPUID_FEATURES 0x40000003
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#define HYPERV_CPUID_ENLIGHTMENT_INFO 0x40000004
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#define HYPERV_CPUID_IMPLEMENT_LIMITS 0x40000005
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#define HYPERV_CPUID_CPU_MANAGEMENT_FEATURES 0x40000007
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#define HYPERV_CPUID_NESTED_FEATURES 0x4000000A
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#define HYPERV_CPUID_SYNDBG_VENDOR_AND_MAX_FUNCTIONS 0x40000080
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#define HYPERV_CPUID_SYNDBG_INTERFACE 0x40000081
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#define HYPERV_CPUID_SYNDBG_PLATFORM_CAPABILITIES 0x40000082
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#define HV_X64_MSR_GUEST_OS_ID 0x40000000
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#define HV_X64_MSR_HYPERCALL 0x40000001
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#define HV_X64_MSR_VP_INDEX 0x40000002
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#define HV_X64_MSR_RESET 0x40000003
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#define HV_X64_MSR_VP_RUNTIME 0x40000010
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#define HV_X64_MSR_TIME_REF_COUNT 0x40000020
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#define HV_X64_MSR_REFERENCE_TSC 0x40000021
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#define HV_X64_MSR_TSC_FREQUENCY 0x40000022
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#define HV_X64_MSR_APIC_FREQUENCY 0x40000023
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#define HV_X64_MSR_EOI 0x40000070
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#define HV_X64_MSR_ICR 0x40000071
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#define HV_X64_MSR_TPR 0x40000072
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#define HV_X64_MSR_VP_ASSIST_PAGE 0x40000073
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#define HV_X64_MSR_SCONTROL 0x40000080
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#define HV_X64_MSR_SVERSION 0x40000081
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#define HV_X64_MSR_SIEFP 0x40000082
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#define HV_X64_MSR_SIMP 0x40000083
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#define HV_X64_MSR_EOM 0x40000084
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#define HV_X64_MSR_SINT0 0x40000090
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#define HV_X64_MSR_SINT1 0x40000091
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#define HV_X64_MSR_SINT2 0x40000092
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#define HV_X64_MSR_SINT3 0x40000093
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#define HV_X64_MSR_SINT4 0x40000094
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#define HV_X64_MSR_SINT5 0x40000095
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#define HV_X64_MSR_SINT6 0x40000096
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#define HV_X64_MSR_SINT7 0x40000097
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#define HV_X64_MSR_SINT8 0x40000098
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#define HV_X64_MSR_SINT9 0x40000099
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#define HV_X64_MSR_SINT10 0x4000009A
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#define HV_X64_MSR_SINT11 0x4000009B
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#define HV_X64_MSR_SINT12 0x4000009C
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#define HV_X64_MSR_SINT13 0x4000009D
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#define HV_X64_MSR_SINT14 0x4000009E
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#define HV_X64_MSR_SINT15 0x4000009F
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#define HV_X64_MSR_STIMER0_CONFIG 0x400000B0
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#define HV_X64_MSR_STIMER0_COUNT 0x400000B1
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#define HV_X64_MSR_STIMER1_CONFIG 0x400000B2
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#define HV_X64_MSR_STIMER1_COUNT 0x400000B3
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#define HV_X64_MSR_STIMER2_CONFIG 0x400000B4
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#define HV_X64_MSR_STIMER2_COUNT 0x400000B5
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#define HV_X64_MSR_STIMER3_CONFIG 0x400000B6
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#define HV_X64_MSR_STIMER3_COUNT 0x400000B7
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#define HV_X64_MSR_GUEST_IDLE 0x400000F0
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#define HV_X64_MSR_CRASH_P0 0x40000100
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#define HV_X64_MSR_CRASH_P1 0x40000101
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#define HV_X64_MSR_CRASH_P2 0x40000102
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#define HV_X64_MSR_CRASH_P3 0x40000103
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#define HV_X64_MSR_CRASH_P4 0x40000104
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#define HV_X64_MSR_CRASH_CTL 0x40000105
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#define HV_X64_MSR_REENLIGHTENMENT_CONTROL 0x40000106
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#define HV_X64_MSR_TSC_EMULATION_CONTROL 0x40000107
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#define HV_X64_MSR_TSC_EMULATION_STATUS 0x40000108
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#define HV_X64_MSR_TSC_INVARIANT_CONTROL 0x40000118
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#define HV_X64_MSR_SYNDBG_CONTROL 0x400000F1
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#define HV_X64_MSR_SYNDBG_STATUS 0x400000F2
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#define HV_X64_MSR_SYNDBG_SEND_BUFFER 0x400000F3
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#define HV_X64_MSR_SYNDBG_RECV_BUFFER 0x400000F4
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#define HV_X64_MSR_SYNDBG_PENDING_BUFFER 0x400000F5
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#define HV_X64_MSR_SYNDBG_OPTIONS 0x400000FF
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/* HYPERV_CPUID_FEATURES.EAX */
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#define HV_MSR_VP_RUNTIME_AVAILABLE \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 0)
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#define HV_MSR_TIME_REF_COUNT_AVAILABLE \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 1)
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#define HV_MSR_SYNIC_AVAILABLE \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 2)
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#define HV_MSR_SYNTIMER_AVAILABLE \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 3)
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#define HV_MSR_APIC_ACCESS_AVAILABLE \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 4)
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#define HV_MSR_HYPERCALL_AVAILABLE \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 5)
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#define HV_MSR_VP_INDEX_AVAILABLE \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 6)
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#define HV_MSR_RESET_AVAILABLE \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 7)
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#define HV_MSR_STAT_PAGES_AVAILABLE \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 8)
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#define HV_MSR_REFERENCE_TSC_AVAILABLE \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 9)
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#define HV_MSR_GUEST_IDLE_AVAILABLE \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 10)
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#define HV_ACCESS_FREQUENCY_MSRS \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 11)
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#define HV_ACCESS_REENLIGHTENMENT \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 13)
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#define HV_ACCESS_TSC_INVARIANT \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EAX, 15)
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/* HYPERV_CPUID_FEATURES.EBX */
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#define HV_CREATE_PARTITIONS \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EBX, 0)
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#define HV_ACCESS_PARTITION_ID \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EBX, 1)
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#define HV_ACCESS_MEMORY_POOL \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EBX, 2)
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#define HV_ADJUST_MESSAGE_BUFFERS \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EBX, 3)
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#define HV_POST_MESSAGES \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EBX, 4)
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#define HV_SIGNAL_EVENTS \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EBX, 5)
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#define HV_CREATE_PORT \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EBX, 6)
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#define HV_CONNECT_PORT \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EBX, 7)
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#define HV_ACCESS_STATS \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EBX, 8)
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#define HV_DEBUGGING \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EBX, 11)
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#define HV_CPU_MANAGEMENT \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EBX, 12)
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#define HV_ENABLE_EXTENDED_HYPERCALLS \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EBX, 20)
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#define HV_ISOLATION \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EBX, 22)
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/* HYPERV_CPUID_FEATURES.EDX */
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#define HV_X64_MWAIT_AVAILABLE \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EDX, 0)
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#define HV_X64_GUEST_DEBUGGING_AVAILABLE \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EDX, 1)
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#define HV_X64_PERF_MONITOR_AVAILABLE \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EDX, 2)
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#define HV_X64_CPU_DYNAMIC_PARTITIONING_AVAILABLE \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EDX, 3)
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#define HV_X64_HYPERCALL_XMM_INPUT_AVAILABLE \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EDX, 4)
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#define HV_X64_GUEST_IDLE_STATE_AVAILABLE \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EDX, 5)
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#define HV_FEATURE_FREQUENCY_MSRS_AVAILABLE \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EDX, 8)
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#define HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EDX, 10)
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#define HV_FEATURE_DEBUG_MSRS_AVAILABLE \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EDX, 11)
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#define HV_STIMER_DIRECT_MODE_AVAILABLE \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_FEATURES, 0, EDX, 19)
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/* HYPERV_CPUID_ENLIGHTMENT_INFO.EAX */
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#define HV_X64_AS_SWITCH_RECOMMENDED \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_ENLIGHTMENT_INFO, 0, EAX, 0)
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#define HV_X64_LOCAL_TLB_FLUSH_RECOMMENDED \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_ENLIGHTMENT_INFO, 0, EAX, 1)
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#define HV_X64_REMOTE_TLB_FLUSH_RECOMMENDED \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_ENLIGHTMENT_INFO, 0, EAX, 2)
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#define HV_X64_APIC_ACCESS_RECOMMENDED \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_ENLIGHTMENT_INFO, 0, EAX, 3)
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#define HV_X64_SYSTEM_RESET_RECOMMENDED \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_ENLIGHTMENT_INFO, 0, EAX, 4)
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#define HV_X64_RELAXED_TIMING_RECOMMENDED \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_ENLIGHTMENT_INFO, 0, EAX, 5)
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#define HV_DEPRECATING_AEOI_RECOMMENDED \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_ENLIGHTMENT_INFO, 0, EAX, 9)
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#define HV_X64_CLUSTER_IPI_RECOMMENDED \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_ENLIGHTMENT_INFO, 0, EAX, 10)
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#define HV_X64_EX_PROCESSOR_MASKS_RECOMMENDED \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_ENLIGHTMENT_INFO, 0, EAX, 11)
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#define HV_X64_ENLIGHTENED_VMCS_RECOMMENDED \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_ENLIGHTMENT_INFO, 0, EAX, 14)
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/* HYPERV_CPUID_SYNDBG_PLATFORM_CAPABILITIES.EAX */
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#define HV_X64_SYNDBG_CAP_ALLOW_KERNEL_DEBUGGING \
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KVM_X86_CPU_FEATURE(HYPERV_CPUID_SYNDBG_PLATFORM_CAPABILITIES, 0, EAX, 1)
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/* Hypercalls */
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#define HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE 0x0002
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#define HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST 0x0003
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#define HVCALL_NOTIFY_LONG_SPIN_WAIT 0x0008
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#define HVCALL_SEND_IPI 0x000b
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#define HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX 0x0013
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#define HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST_EX 0x0014
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#define HVCALL_SEND_IPI_EX 0x0015
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#define HVCALL_GET_PARTITION_ID 0x0046
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#define HVCALL_DEPOSIT_MEMORY 0x0048
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#define HVCALL_CREATE_VP 0x004e
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#define HVCALL_GET_VP_REGISTERS 0x0050
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#define HVCALL_SET_VP_REGISTERS 0x0051
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#define HVCALL_POST_MESSAGE 0x005c
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#define HVCALL_SIGNAL_EVENT 0x005d
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#define HVCALL_POST_DEBUG_DATA 0x0069
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#define HVCALL_RETRIEVE_DEBUG_DATA 0x006a
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#define HVCALL_RESET_DEBUG_SESSION 0x006b
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#define HVCALL_ADD_LOGICAL_PROCESSOR 0x0076
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#define HVCALL_MAP_DEVICE_INTERRUPT 0x007c
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#define HVCALL_UNMAP_DEVICE_INTERRUPT 0x007d
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#define HVCALL_RETARGET_INTERRUPT 0x007e
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#define HVCALL_FLUSH_GUEST_PHYSICAL_ADDRESS_SPACE 0x00af
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#define HVCALL_FLUSH_GUEST_PHYSICAL_ADDRESS_LIST 0x00b0
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/* Extended hypercalls */
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#define HV_EXT_CALL_QUERY_CAPABILITIES 0x8001
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#define HV_FLUSH_ALL_PROCESSORS BIT(0)
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#define HV_FLUSH_ALL_VIRTUAL_ADDRESS_SPACES BIT(1)
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#define HV_FLUSH_NON_GLOBAL_MAPPINGS_ONLY BIT(2)
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#define HV_FLUSH_USE_EXTENDED_RANGE_FORMAT BIT(3)
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/* hypercall status code */
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#define HV_STATUS_SUCCESS 0
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#define HV_STATUS_INVALID_HYPERCALL_CODE 2
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#define HV_STATUS_INVALID_HYPERCALL_INPUT 3
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#define HV_STATUS_INVALID_ALIGNMENT 4
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#define HV_STATUS_INVALID_PARAMETER 5
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#define HV_STATUS_ACCESS_DENIED 6
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#define HV_STATUS_OPERATION_DENIED 8
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#define HV_STATUS_INSUFFICIENT_MEMORY 11
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#define HV_STATUS_INVALID_PORT_ID 17
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#define HV_STATUS_INVALID_CONNECTION_ID 18
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#define HV_STATUS_INSUFFICIENT_BUFFERS 19
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/* hypercall options */
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#define HV_HYPERCALL_FAST_BIT BIT(16)
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#define HV_HYPERCALL_VARHEAD_OFFSET 17
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#define HV_HYPERCALL_REP_COMP_OFFSET 32
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/*
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* Issue a Hyper-V hypercall. Returns exception vector raised or 0, 'hv_status'
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* is set to the hypercall status (if no exception occurred).
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*/
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static inline uint8_t __hyperv_hypercall(u64 control, vm_vaddr_t input_address,
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vm_vaddr_t output_address,
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uint64_t *hv_status)
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{
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uint64_t error_code;
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uint8_t vector;
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/* Note both the hypercall and the "asm safe" clobber r9-r11. */
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asm volatile("mov %[output_address], %%r8\n\t"
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|
KVM_ASM_SAFE("vmcall")
|
||
|
|
: "=a" (*hv_status),
|
||
|
|
"+c" (control), "+d" (input_address),
|
||
|
|
KVM_ASM_SAFE_OUTPUTS(vector, error_code)
|
||
|
|
: [output_address] "r"(output_address),
|
||
|
|
"a" (-EFAULT)
|
||
|
|
: "cc", "memory", "r8", KVM_ASM_SAFE_CLOBBERS);
|
||
|
|
return vector;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Issue a Hyper-V hypercall and assert that it succeeded. */
|
||
|
|
static inline void hyperv_hypercall(u64 control, vm_vaddr_t input_address,
|
||
|
|
vm_vaddr_t output_address)
|
||
|
|
{
|
||
|
|
uint64_t hv_status;
|
||
|
|
uint8_t vector;
|
||
|
|
|
||
|
|
vector = __hyperv_hypercall(control, input_address, output_address, &hv_status);
|
||
|
|
|
||
|
|
GUEST_ASSERT(!vector);
|
||
|
|
GUEST_ASSERT((hv_status & 0xffff) == 0);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Write 'Fast' hypercall input 'data' to the first 'n_sse_regs' SSE regs */
|
||
|
|
static inline void hyperv_write_xmm_input(void *data, int n_sse_regs)
|
||
|
|
{
|
||
|
|
int i;
|
||
|
|
|
||
|
|
for (i = 0; i < n_sse_regs; i++)
|
||
|
|
write_sse_reg(i, (sse128_t *)(data + sizeof(sse128_t) * i));
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Proper HV_X64_MSR_GUEST_OS_ID value */
|
||
|
|
#define HYPERV_LINUX_OS_ID ((u64)0x8100 << 48)
|
||
|
|
|
||
|
|
#define HV_X64_MSR_VP_ASSIST_PAGE 0x40000073
|
||
|
|
#define HV_X64_MSR_VP_ASSIST_PAGE_ENABLE 0x00000001
|
||
|
|
#define HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_SHIFT 12
|
||
|
|
#define HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_MASK \
|
||
|
|
(~((1ull << HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_SHIFT) - 1))
|
||
|
|
|
||
|
|
struct hv_nested_enlightenments_control {
|
||
|
|
struct {
|
||
|
|
__u32 directhypercall:1;
|
||
|
|
__u32 reserved:31;
|
||
|
|
} features;
|
||
|
|
struct {
|
||
|
|
__u32 reserved;
|
||
|
|
} hypercallControls;
|
||
|
|
} __packed;
|
||
|
|
|
||
|
|
/* Define virtual processor assist page structure. */
|
||
|
|
struct hv_vp_assist_page {
|
||
|
|
__u32 apic_assist;
|
||
|
|
__u32 reserved1;
|
||
|
|
__u64 vtl_control[3];
|
||
|
|
struct hv_nested_enlightenments_control nested_control;
|
||
|
|
__u8 enlighten_vmentry;
|
||
|
|
__u8 reserved2[7];
|
||
|
|
__u64 current_nested_vmcs;
|
||
|
|
} __packed;
|
||
|
|
|
||
|
|
extern struct hv_vp_assist_page *current_vp_assist;
|
||
|
|
|
||
|
|
int enable_vp_assist(uint64_t vp_assist_pa, void *vp_assist);
|
||
|
|
|
||
|
|
struct hyperv_test_pages {
|
||
|
|
/* VP assist page */
|
||
|
|
void *vp_assist_hva;
|
||
|
|
uint64_t vp_assist_gpa;
|
||
|
|
void *vp_assist;
|
||
|
|
|
||
|
|
/* Partition assist page */
|
||
|
|
void *partition_assist_hva;
|
||
|
|
uint64_t partition_assist_gpa;
|
||
|
|
void *partition_assist;
|
||
|
|
|
||
|
|
/* Enlightened VMCS */
|
||
|
|
void *enlightened_vmcs_hva;
|
||
|
|
uint64_t enlightened_vmcs_gpa;
|
||
|
|
void *enlightened_vmcs;
|
||
|
|
};
|
||
|
|
|
||
|
|
struct hyperv_test_pages *vcpu_alloc_hyperv_test_pages(struct kvm_vm *vm,
|
||
|
|
vm_vaddr_t *p_hv_pages_gva);
|
||
|
|
|
||
|
|
/* HV_X64_MSR_TSC_INVARIANT_CONTROL bits */
|
||
|
|
#define HV_INVARIANT_TSC_EXPOSED BIT_ULL(0)
|
||
|
|
|
||
|
|
#endif /* !SELFTEST_KVM_HYPERV_H */
|