209 lines
5.7 KiB
YAML
209 lines
5.7 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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# Copyright (C) 2020 Texas Instruments Incorporated
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# Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/dma/ti/k3-bcdma.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Texas Instruments K3 DMSS BCDMA
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maintainers:
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- Peter Ujfalusi <peter.ujfalusi@gmail.com>
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description: |
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The Block Copy DMA (BCDMA) is intended to perform similar functions as the TR
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mode channels of K3 UDMA-P.
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BCDMA includes block copy channels and Split channels.
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Block copy channels mainly used for memory to memory transfers, but with
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optional triggers a block copy channel can service peripherals by accessing
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directly to memory mapped registers or area.
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Split channels can be used to service PSI-L based peripherals.
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The peripherals can be PSI-L native or legacy, non PSI-L native peripherals
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with PDMAs. PDMA is tasked to act as a bridge between the PSI-L fabric and the
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legacy peripheral.
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PDMAs can be configured via BCDMA split channel's peer registers to match with
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the configuration of the legacy peripheral.
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properties:
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compatible:
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enum:
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- ti,am62a-dmss-bcdma-csirx
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- ti,am64-dmss-bcdma
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reg:
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minItems: 3
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maxItems: 5
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reg-names:
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minItems: 3
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maxItems: 5
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"#dma-cells":
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const: 3
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description: |
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cell 1: type of the BCDMA channel to be used to service the peripheral:
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0 - split channel
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1 - block copy channel using global trigger 1
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2 - block copy channel using global trigger 2
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3 - block copy channel using local trigger
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cell 2: parameter for the channel:
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if cell 1 is 0 (split channel):
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PSI-L thread ID of the remote (to BCDMA) end.
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Valid ranges for thread ID depends on the data movement direction:
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for source thread IDs (rx): 0 - 0x7fff
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for destination thread IDs (tx): 0x8000 - 0xffff
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Please refer to the device documentation for the PSI-L thread map and
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also the PSI-L peripheral chapter for the correct thread ID.
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if cell 1 is 1 or 2 (block copy channel using global trigger):
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Unused, ignored
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The trigger must be configured for the channel externally to BCDMA,
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channels using global triggers should not be requested directly, but
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via DMA event router.
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if cell 1 is 3 (block copy channel using local trigger):
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bchan number of the locally triggered channel
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cell 3: ASEL value for the channel
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msi-parent: true
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power-domains:
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description:
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Power domain if available
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maxItems: 1
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ti,asel:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: ASEL value for non slave channels
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ti,sci-rm-range-bchan:
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$ref: /schemas/types.yaml#/definitions/uint32-array
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description: |
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Array of BCDMA block-copy channel resource subtypes for resource
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allocation for this host
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minItems: 1
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# Should be enough
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maxItems: 255
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items:
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maximum: 0x3f
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ti,sci-rm-range-tchan:
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$ref: /schemas/types.yaml#/definitions/uint32-array
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description: |
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Array of BCDMA split tx channel resource subtypes for resource allocation
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for this host
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minItems: 1
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# Should be enough
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maxItems: 255
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items:
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maximum: 0x3f
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ti,sci-rm-range-rchan:
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$ref: /schemas/types.yaml#/definitions/uint32-array
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description: |
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Array of BCDMA split rx channel resource subtypes for resource allocation
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for this host
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minItems: 1
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# Should be enough
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maxItems: 255
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items:
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maximum: 0x3f
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required:
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- compatible
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- "#dma-cells"
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- reg
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- reg-names
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- msi-parent
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- ti,sci
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- ti,sci-dev-id
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- ti,sci-rm-range-rchan
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allOf:
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- $ref: /schemas/dma/dma-controller.yaml#
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- $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
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- if:
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properties:
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compatible:
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contains:
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const: ti,am62a-dmss-bcdma-csirx
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then:
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properties:
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ti,sci-rm-range-bchan: false
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ti,sci-rm-range-tchan: false
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reg:
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maxItems: 3
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reg-names:
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items:
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- const: gcfg
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- const: rchanrt
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- const: ringrt
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required:
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- power-domains
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else:
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properties:
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reg:
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minItems: 5
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reg-names:
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items:
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- const: gcfg
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- const: bchanrt
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- const: rchanrt
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- const: tchanrt
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- const: ringrt
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required:
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- ti,sci-rm-range-bchan
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- ti,sci-rm-range-tchan
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unevaluatedProperties: false
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examples:
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- |+
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cbass_main {
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#address-cells = <2>;
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#size-cells = <2>;
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main_dmss {
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compatible = "simple-mfd";
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#address-cells = <2>;
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#size-cells = <2>;
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dma-ranges;
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ranges;
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ti,sci-dev-id = <25>;
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main_bcdma: dma-controller@485c0100 {
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compatible = "ti,am64-dmss-bcdma";
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reg = <0x0 0x485c0100 0x0 0x100>,
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<0x0 0x4c000000 0x0 0x20000>,
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<0x0 0x4a820000 0x0 0x20000>,
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<0x0 0x4aa40000 0x0 0x20000>,
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<0x0 0x4bc00000 0x0 0x100000>;
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reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt";
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msi-parent = <&inta_main_dmss>;
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#dma-cells = <3>;
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ti,sci = <&dmsc>;
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ti,sci-dev-id = <26>;
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ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */
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ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */
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ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */
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};
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};
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};
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