456 lines
10 KiB
YAML
456 lines
10 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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# Copyright 2021 ARM Ltd.
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/firmware/arm,scmi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: System Control and Management Interface (SCMI) Message Protocol
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maintainers:
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- Sudeep Holla <sudeep.holla@arm.com>
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description: |
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The SCMI is intended to allow agents such as OSPM to manage various functions
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that are provided by the hardware platform it is running on, including power
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and performance functions.
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This binding is intended to define the interface the firmware implementing
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the SCMI as described in ARM document number ARM DEN 0056 ("ARM System Control
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and Management Interface Platform Design Document")[0] provide for OSPM in
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the device tree.
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[0] https://developer.arm.com/documentation/den0056/latest
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properties:
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$nodename:
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const: scmi
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compatible:
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oneOf:
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- description: SCMI compliant firmware with mailbox transport
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items:
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- const: arm,scmi
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- description: SCMI compliant firmware with ARM SMC/HVC transport
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items:
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- const: arm,scmi-smc
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- description: SCMI compliant firmware with SCMI Virtio transport.
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The virtio transport only supports a single device.
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items:
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- const: arm,scmi-virtio
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- description: SCMI compliant firmware with OP-TEE transport
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items:
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- const: linaro,scmi-optee
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interrupts:
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description:
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The interrupt that indicates message completion by the platform
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rather than by the return of the smc call. This should not be used
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except when the platform requires such behavior.
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maxItems: 1
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interrupt-names:
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const: a2p
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mbox-names:
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description:
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Specifies the mailboxes used to communicate with SCMI compliant
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firmware.
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items:
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- const: tx
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- const: rx
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mboxes:
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description:
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List of phandle and mailbox channel specifiers. It should contain
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exactly one or two mailboxes, one for transmitting messages("tx")
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and another optional for receiving the notifications("rx") if supported.
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minItems: 1
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maxItems: 2
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shmem:
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description:
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List of phandle pointing to the shared memory(SHM) area, for each
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transport channel specified.
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minItems: 1
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maxItems: 2
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'#address-cells':
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const: 1
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'#size-cells':
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const: 0
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atomic-threshold-us:
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description:
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An optional time value, expressed in microseconds, representing, on this
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platform, the threshold above which any SCMI command, advertised to have
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an higher-than-threshold execution latency, should not be considered for
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atomic mode of operation, even if requested.
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default: 0
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arm,smc-id:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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SMC id required when using smc or hvc transports
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linaro,optee-channel-id:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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Channel specifier required when using OP-TEE transport.
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protocol@11:
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$ref: '#/$defs/protocol-node'
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unevaluatedProperties: false
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properties:
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reg:
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const: 0x11
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'#power-domain-cells':
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const: 1
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required:
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- '#power-domain-cells'
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protocol@13:
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$ref: '#/$defs/protocol-node'
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unevaluatedProperties: false
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properties:
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reg:
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const: 0x13
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'#clock-cells':
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const: 1
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required:
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- '#clock-cells'
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protocol@14:
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$ref: '#/$defs/protocol-node'
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unevaluatedProperties: false
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properties:
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reg:
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const: 0x14
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'#clock-cells':
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const: 1
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required:
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- '#clock-cells'
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protocol@15:
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$ref: '#/$defs/protocol-node'
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unevaluatedProperties: false
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properties:
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reg:
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const: 0x15
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'#thermal-sensor-cells':
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const: 1
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required:
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- '#thermal-sensor-cells'
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protocol@16:
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$ref: '#/$defs/protocol-node'
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unevaluatedProperties: false
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properties:
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reg:
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const: 0x16
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'#reset-cells':
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const: 1
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required:
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- '#reset-cells'
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protocol@17:
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$ref: '#/$defs/protocol-node'
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unevaluatedProperties: false
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properties:
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reg:
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const: 0x17
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regulators:
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type: object
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additionalProperties: false
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description:
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The list of all regulators provided by this SCMI controller.
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properties:
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'#address-cells':
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const: 1
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'#size-cells':
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const: 0
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patternProperties:
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'^regulator@[0-9a-f]+$':
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type: object
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$ref: "../regulator/regulator.yaml#"
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unevaluatedProperties: false
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properties:
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reg:
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maxItems: 1
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description: Identifier for the voltage regulator.
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required:
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- reg
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protocol@18:
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$ref: '#/$defs/protocol-node'
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unevaluatedProperties: false
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properties:
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reg:
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const: 0x18
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additionalProperties: false
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$defs:
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protocol-node:
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type: object
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description:
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Each sub-node represents a protocol supported. If the platform
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supports a dedicated communication channel for a particular protocol,
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then the corresponding transport properties must be present.
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The virtio transport does not support a dedicated communication channel.
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properties:
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reg:
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maxItems: 1
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mbox-names:
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items:
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- const: tx
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- const: rx
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mboxes:
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minItems: 1
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maxItems: 2
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shmem:
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minItems: 1
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maxItems: 2
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linaro,optee-channel-id:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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Channel specifier required when using OP-TEE transport and
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protocol has a dedicated communication channel.
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required:
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- reg
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required:
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- compatible
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if:
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properties:
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compatible:
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contains:
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const: arm,scmi
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then:
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properties:
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interrupts: false
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interrupt-names: false
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required:
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- mboxes
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- shmem
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else:
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if:
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properties:
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compatible:
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contains:
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const: arm,scmi-smc
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then:
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required:
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- arm,smc-id
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- shmem
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else:
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if:
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properties:
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compatible:
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contains:
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const: linaro,scmi-optee
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then:
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required:
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- linaro,optee-channel-id
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examples:
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- |
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firmware {
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scmi {
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compatible = "arm,scmi";
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mboxes = <&mhuB 0 0>,
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<&mhuB 0 1>;
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mbox-names = "tx", "rx";
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shmem = <&cpu_scp_lpri0>,
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<&cpu_scp_lpri1>;
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#address-cells = <1>;
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#size-cells = <0>;
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atomic-threshold-us = <10000>;
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scmi_devpd: protocol@11 {
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reg = <0x11>;
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#power-domain-cells = <1>;
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};
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scmi_dvfs: protocol@13 {
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reg = <0x13>;
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#clock-cells = <1>;
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mboxes = <&mhuB 1 0>,
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<&mhuB 1 1>;
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mbox-names = "tx", "rx";
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shmem = <&cpu_scp_hpri0>,
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<&cpu_scp_hpri1>;
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};
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scmi_clk: protocol@14 {
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reg = <0x14>;
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#clock-cells = <1>;
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};
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scmi_sensors: protocol@15 {
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reg = <0x15>;
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#thermal-sensor-cells = <1>;
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};
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scmi_reset: protocol@16 {
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reg = <0x16>;
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#reset-cells = <1>;
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};
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scmi_voltage: protocol@17 {
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reg = <0x17>;
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regulators {
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#address-cells = <1>;
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#size-cells = <0>;
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regulator_devX: regulator@0 {
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reg = <0x0>;
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regulator-max-microvolt = <3300000>;
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};
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regulator_devY: regulator@9 {
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reg = <0x9>;
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <4200000>;
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};
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};
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};
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scmi_powercap: protocol@18 {
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reg = <0x18>;
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};
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};
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};
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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sram@50000000 {
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compatible = "mmio-sram";
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reg = <0x0 0x50000000 0x0 0x10000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x0 0x50000000 0x10000>;
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cpu_scp_lpri0: scp-sram-section@0 {
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compatible = "arm,scmi-shmem";
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reg = <0x0 0x80>;
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};
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cpu_scp_lpri1: scp-sram-section@80 {
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compatible = "arm,scmi-shmem";
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reg = <0x80 0x80>;
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};
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cpu_scp_hpri0: scp-sram-section@100 {
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compatible = "arm,scmi-shmem";
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reg = <0x100 0x80>;
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};
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cpu_scp_hpri2: scp-sram-section@180 {
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compatible = "arm,scmi-shmem";
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reg = <0x180 0x80>;
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};
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};
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};
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- |
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firmware {
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scmi {
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compatible = "arm,scmi-smc";
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shmem = <&cpu_scp_lpri0>, <&cpu_scp_lpri1>;
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arm,smc-id = <0xc3000001>;
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#address-cells = <1>;
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#size-cells = <0>;
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scmi_devpd1: protocol@11 {
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reg = <0x11>;
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#power-domain-cells = <1>;
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};
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};
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};
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- |
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firmware {
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scmi {
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compatible = "linaro,scmi-optee";
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linaro,optee-channel-id = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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scmi_dvfs1: protocol@13 {
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reg = <0x13>;
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linaro,optee-channel-id = <1>;
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shmem = <&cpu_optee_lpri0>;
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#clock-cells = <1>;
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};
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scmi_clk0: protocol@14 {
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reg = <0x14>;
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#clock-cells = <1>;
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};
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};
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};
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|
|
soc {
|
||
|
|
#address-cells = <2>;
|
||
|
|
#size-cells = <2>;
|
||
|
|
|
||
|
|
sram@51000000 {
|
||
|
|
compatible = "mmio-sram";
|
||
|
|
reg = <0x0 0x51000000 0x0 0x10000>;
|
||
|
|
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <1>;
|
||
|
|
ranges = <0 0x0 0x51000000 0x10000>;
|
||
|
|
|
||
|
|
cpu_optee_lpri0: optee-sram-section@0 {
|
||
|
|
compatible = "arm,scmi-shmem";
|
||
|
|
reg = <0x0 0x80>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
...
|