197 lines
7.0 KiB
Plaintext
197 lines
7.0 KiB
Plaintext
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* Freescale Management Complex
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The Freescale Management Complex (fsl-mc) is a hardware resource
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manager that manages specialized hardware objects used in
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network-oriented packet processing applications. After the fsl-mc
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block is enabled, pools of hardware resources are available, such as
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queues, buffer pools, I/O interfaces. These resources are building
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blocks that can be used to create functional hardware objects/devices
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such as network interfaces, crypto accelerator instances, L2 switches,
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etc.
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For an overview of the DPAA2 architecture and fsl-mc bus see:
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Documentation/networking/device_drivers/ethernet/freescale/dpaa2/overview.rst
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As described in the above overview, all DPAA2 objects in a DPRC share the
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same hardware "isolation context" and a 10-bit value called an ICID
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(isolation context id) is expressed by the hardware to identify
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the requester.
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The generic 'iommus' property is insufficient to describe the relationship
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between ICIDs and IOMMUs, so an iommu-map property is used to define
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the set of possible ICIDs under a root DPRC and how they map to
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an IOMMU.
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For generic IOMMU bindings, see
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Documentation/devicetree/bindings/iommu/iommu.txt.
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For arm-smmu binding, see:
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Documentation/devicetree/bindings/iommu/arm,smmu.yaml.
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The MSI writes are accompanied by sideband data which is derived from the ICID.
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The msi-map property is used to associate the devices with both the ITS
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controller and the sideband data which accompanies the writes.
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For generic MSI bindings, see
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Documentation/devicetree/bindings/interrupt-controller/msi.txt.
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For GICv3 and GIC ITS bindings, see:
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Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml.
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Required properties:
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- compatible
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Value type: <string>
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Definition: Must be "fsl,qoriq-mc". A Freescale Management Complex
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compatible with this binding must have Block Revision
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Registers BRR1 and BRR2 at offset 0x0BF8 and 0x0BFC in
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the MC control register region.
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- reg
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Value type: <prop-encoded-array>
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Definition: A standard property. Specifies one or two regions
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defining the MC's registers:
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-the first region is the command portal for the
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this machine and must always be present
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-the second region is the MC control registers. This
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region may not be present in some scenarios, such
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as in the device tree presented to a virtual machine.
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- ranges
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Value type: <prop-encoded-array>
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Definition: A standard property. Defines the mapping between the child
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MC address space and the parent system address space.
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The MC address space is defined by 3 components:
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<region type> <offset hi> <offset lo>
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Valid values for region type are
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0x0 - MC portals
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0x1 - QBMAN portals
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- #address-cells
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Value type: <u32>
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Definition: Must be 3. (see definition in 'ranges' property)
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- #size-cells
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Value type: <u32>
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Definition: Must be 1.
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Sub-nodes:
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The fsl-mc node may optionally have dpmac sub-nodes that describe
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the relationship between the Ethernet MACs which belong to the MC
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and the Ethernet PHYs on the system board.
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The dpmac nodes must be under a node named "dpmacs" which contains
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the following properties:
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- #address-cells
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Value type: <u32>
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Definition: Must be present if dpmac sub-nodes are defined and must
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have a value of 1.
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- #size-cells
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Value type: <u32>
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Definition: Must be present if dpmac sub-nodes are defined and must
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have a value of 0.
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These nodes must have the following properties:
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- compatible
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Value type: <string>
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Definition: Must be "fsl,qoriq-mc-dpmac".
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- reg
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Value type: <prop-encoded-array>
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Definition: Specifies the id of the dpmac.
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- phy-handle
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Value type: <phandle>
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Definition: Specifies the phandle to the PHY device node associated
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with the this dpmac.
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Optional properties:
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- iommu-map: Maps an ICID to an IOMMU and associated iommu-specifier
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data.
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The property is an arbitrary number of tuples of
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(icid-base,iommu,iommu-base,length).
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Any ICID i in the interval [icid-base, icid-base + length) is
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associated with the listed IOMMU, with the iommu-specifier
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(i - icid-base + iommu-base).
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- msi-map: Maps an ICID to a GIC ITS and associated msi-specifier
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data.
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The property is an arbitrary number of tuples of
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(icid-base,gic-its,msi-base,length).
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Any ICID in the interval [icid-base, icid-base + length) is
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associated with the listed GIC ITS, with the msi-specifier
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(i - icid-base + msi-base).
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Deprecated properties:
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- msi-parent
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Value type: <phandle>
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Definition: Describes the MSI controller node handling message
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interrupts for the MC. When there is no translation
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between the ICID and deviceID this property can be used
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to describe the MSI controller used by the devices on the
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mc-bus.
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The use of this property for mc-bus is deprecated. Please
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use msi-map.
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Example:
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smmu: iommu@5000000 {
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compatible = "arm,mmu-500";
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#iommu-cells = <1>;
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stream-match-mask = <0x7C00>;
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...
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};
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gic: interrupt-controller@6000000 {
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compatible = "arm,gic-v3";
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...
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}
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its: gic-its@6020000 {
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compatible = "arm,gic-v3-its";
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msi-controller;
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...
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};
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fsl_mc: fsl-mc@80c000000 {
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compatible = "fsl,qoriq-mc";
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reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */
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<0x00000000 0x08340000 0 0x40000>; /* MC control reg */
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/* define map for ICIDs 23-64 */
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iommu-map = <23 &smmu 23 41>;
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/* define msi map for ICIDs 23-64 */
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msi-map = <23 &its 23 41>;
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#address-cells = <3>;
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#size-cells = <1>;
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/*
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* Region type 0x0 - MC portals
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* Region type 0x1 - QBMAN portals
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*/
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ranges = <0x0 0x0 0x0 0x8 0x0c000000 0x4000000
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0x1 0x0 0x0 0x8 0x18000000 0x8000000>;
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dpmacs {
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#address-cells = <1>;
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#size-cells = <0>;
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dpmac@1 {
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compatible = "fsl,qoriq-mc-dpmac";
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reg = <1>;
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phy-handle = <&mdio0_phy0>;
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}
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}
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};
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