77 lines
1.7 KiB
YAML
77 lines
1.7 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mmc/amlogic,meson-gx-mmc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Amlogic SD / eMMC controller for S905/GXBB family SoCs
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description:
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The MMC 5.1 compliant host controller on Amlogic provides the
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interface for SD, eMMC and SDIO devices
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maintainers:
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- Neil Armstrong <neil.armstrong@linaro.org>
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allOf:
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- $ref: mmc-controller.yaml#
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properties:
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compatible:
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oneOf:
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- const: amlogic,meson-axg-mmc
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- items:
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- const: amlogic,meson-gx-mmc
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- const: amlogic,meson-gxbb-mmc
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reg:
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maxItems: 1
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interrupts:
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minItems: 1
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items:
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- description: mmc controller instance
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- description: card detect
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clocks:
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maxItems: 3
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clock-names:
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items:
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- const: core
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- const: clkin0
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- const: clkin1
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resets:
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maxItems: 1
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amlogic,dram-access-quirk:
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type: boolean
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description:
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set when controller's internal DMA engine cannot access the DRAM memory,
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like on the G12A dedicated SDIO controller.
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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- resets
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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mmc@70000 {
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compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
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reg = <0x70000 0x2000>;
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interrupts = <GIC_SPI 216 IRQ_TYPE_EDGE_RISING>;
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clocks = <&clk_mmc>, <&xtal>, <&clk_div>;
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clock-names = "core", "clkin0", "clkin1";
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pinctrl-0 = <&emm_pins>;
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resets = <&reset_mmc>;
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};
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