67 lines
2.0 KiB
YAML
67 lines
2.0 KiB
YAML
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# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mmc/synopsys-dw-mshc-common.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Synopsys Designware Mobile Storage Host Controller Common Properties
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allOf:
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- $ref: mmc-controller.yaml#
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maintainers:
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- Ulf Hansson <ulf.hansson@linaro.org>
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# Everything else is described in the common file
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properties:
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resets:
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maxItems: 1
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reset-names:
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const: reset
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clock-frequency:
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description:
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Should be the frequency (in Hz) of the ciu clock. If this
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is specified and the ciu clock is specified then we'll try to set the ciu
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clock to this at probe time.
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fifo-depth:
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description:
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The maximum size of the tx/rx fifo's. If this property is not
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specified, the default value of the fifo size is determined from the
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controller registers.
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$ref: /schemas/types.yaml#/definitions/uint32
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card-detect-delay:
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description:
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Delay in milli-seconds before detecting card after card
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insert event. The default value is 0.
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$ref: /schemas/types.yaml#/definitions/uint32
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default: 0
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data-addr:
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description:
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Override fifo address with value provided by DT. The default FIFO reg
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offset is assumed as 0x100 (version < 0x240A) and 0x200(version >= 0x240A)
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by driver. If the controller does not follow this rule, please use
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this property to set fifo address in device tree.
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$ref: /schemas/types.yaml#/definitions/uint32
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fifo-watermark-aligned:
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description:
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Data done irq is expected if data length is less than
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watermark in PIO mode. But fifo watermark is requested to be aligned
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with data length in some SoC so that TX/RX irq can be generated with
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data done irq. Add this watermark quirk to mark this requirement and
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force fifo watermark setting accordingly.
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$ref: /schemas/types.yaml#/definitions/flag
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dmas:
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maxItems: 1
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dma-names:
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const: rx-tx
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additionalProperties: true
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