142 lines
2.9 KiB
YAML
142 lines
2.9 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/rtc/st,stm32-rtc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: STMicroelectronics STM32 Real Time Clock
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maintainers:
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- Gabriel Fernandez <gabriel.fernandez@foss.st.com>
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properties:
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compatible:
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enum:
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- st,stm32-rtc
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- st,stm32h7-rtc
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- st,stm32mp1-rtc
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reg:
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maxItems: 1
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clocks:
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minItems: 1
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maxItems: 2
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clock-names:
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items:
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- const: pclk
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- const: rtc_ck
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interrupts:
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maxItems: 1
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st,syscfg:
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$ref: "/schemas/types.yaml#/definitions/phandle-array"
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items:
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minItems: 3
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maxItems: 3
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description: |
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Phandle/offset/mask triplet. The phandle to pwrcfg used to
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access control register at offset, and change the dbp (Disable Backup
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Protection) bit represented by the mask, mandatory to disable/enable backup
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domain (RTC registers) write protection.
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assigned-clocks:
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description: |
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override default rtc_ck parent clock reference to the rtc_ck clock entry
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maxItems: 1
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assigned-clock-parents:
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description: |
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override default rtc_ck parent clock phandle of the new parent clock of rtc_ck
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maxItems: 1
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allOf:
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- if:
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properties:
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compatible:
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contains:
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const: st,stm32-rtc
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then:
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properties:
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clocks:
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minItems: 1
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maxItems: 1
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clock-names: false
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required:
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- st,syscfg
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- if:
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properties:
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compatible:
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contains:
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const: st,stm32h7-rtc
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then:
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properties:
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clocks:
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minItems: 2
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maxItems: 2
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required:
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- clock-names
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- st,syscfg
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- if:
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properties:
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compatible:
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contains:
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const: st,stm32mp1-rtc
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then:
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properties:
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clocks:
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minItems: 2
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maxItems: 2
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assigned-clocks: false
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assigned-clock-parents: false
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required:
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- clock-names
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required:
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- compatible
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- reg
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- clocks
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- interrupts
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/mfd/stm32f4-rcc.h>
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#include <dt-bindings/clock/stm32fx-clock.h>
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rtc@40002800 {
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compatible = "st,stm32-rtc";
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reg = <0x40002800 0x400>;
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clocks = <&rcc 1 CLK_RTC>;
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assigned-clocks = <&rcc 1 CLK_RTC>;
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assigned-clock-parents = <&rcc 1 CLK_LSE>;
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interrupt-parent = <&exti>;
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interrupts = <17 1>;
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st,syscfg = <&pwrcfg 0x00 0x100>;
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};
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/stm32mp1-clks.h>
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rtc@5c004000 {
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compatible = "st,stm32mp1-rtc";
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reg = <0x5c004000 0x400>;
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clocks = <&rcc RTCAPB>, <&rcc RTC>;
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clock-names = "pclk", "rtc_ck";
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interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
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};
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...
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