107 lines
2.8 KiB
YAML
107 lines
2.8 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-dwc3-glue.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Socionext UniPhier SoC DWC3 USB3.0 glue layer
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maintainers:
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- Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
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description: |+
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DWC3 USB3.0 glue layer implemented on Socionext UniPhier SoCs is
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a sideband logic handling signals to DWC3 host controller inside
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USB3.0 component.
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properties:
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compatible:
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items:
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- enum:
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- socionext,uniphier-pro4-dwc3-glue
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- socionext,uniphier-pro5-dwc3-glue
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- socionext,uniphier-pxs2-dwc3-glue
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- socionext,uniphier-ld20-dwc3-glue
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- socionext,uniphier-pxs3-dwc3-glue
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- socionext,uniphier-nx1-dwc3-glue
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- const: simple-mfd
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reg:
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maxItems: 1
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"#address-cells":
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const: 1
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"#size-cells":
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const: 1
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ranges: true
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patternProperties:
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"^reset-controller@[0-9a-f]+$":
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$ref: /schemas/reset/socionext,uniphier-glue-reset.yaml#
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"^regulator@[0-9a-f]+$":
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$ref: /schemas/regulator/socionext,uniphier-regulator.yaml#
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"^phy@[0-9a-f]+$":
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oneOf:
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- $ref: /schemas/phy/socionext,uniphier-usb3hs-phy.yaml#
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- $ref: /schemas/phy/socionext,uniphier-usb3ss-phy.yaml#
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required:
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- compatible
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- reg
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additionalProperties: false
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examples:
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- |
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usb@65b00000 {
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compatible = "socionext,uniphier-ld20-dwc3-glue", "simple-mfd";
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reg = <0x65b00000 0x400>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x65b00000 0x400>;
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reset-controller@0 {
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compatible = "socionext,uniphier-ld20-usb3-reset";
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reg = <0x0 0x4>;
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#reset-cells = <1>;
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clock-names = "link";
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clocks = <&sys_clk 14>;
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reset-names = "link";
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resets = <&sys_rst 14>;
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};
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regulator@100 {
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compatible = "socionext,uniphier-ld20-usb3-regulator";
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reg = <0x100 0x10>;
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clock-names = "link";
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clocks = <&sys_clk 14>;
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reset-names = "link";
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resets = <&sys_rst 14>;
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};
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phy@200 {
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compatible = "socionext,uniphier-ld20-usb3-hsphy";
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reg = <0x200 0x10>;
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#phy-cells = <0>;
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clock-names = "link", "phy";
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clocks = <&sys_clk 14>, <&sys_clk 16>;
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reset-names = "link", "phy";
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resets = <&sys_rst 14>, <&sys_rst 16>;
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};
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phy@300 {
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compatible = "socionext,uniphier-ld20-usb3-ssphy";
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reg = <0x300 0x10>;
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#phy-cells = <0>;
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clock-names = "link", "phy";
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clocks = <&sys_clk 14>, <&sys_clk 18>;
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reset-names = "link", "phy";
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resets = <&sys_rst 14>, <&sys_rst 18>;
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};
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};
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