65 lines
1.7 KiB
YAML
65 lines
1.7 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-perictrl.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Socionext UniPhier peripheral block controller
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maintainers:
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- Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
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description: |+
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Peripheral block implemented on Socionext UniPhier SoCs is an integrated
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component of the peripherals including UART, I2C/FI2C, and SCSSI.
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Peripheral block controller is a logic to control the component.
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properties:
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compatible:
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items:
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- enum:
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- socionext,uniphier-ld4-perictrl
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- socionext,uniphier-pro4-perictrl
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- socionext,uniphier-pro5-perictrl
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- socionext,uniphier-pxs2-perictrl
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- socionext,uniphier-sld8-perictrl
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- socionext,uniphier-ld11-perictrl
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- socionext,uniphier-ld20-perictrl
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- socionext,uniphier-pxs3-perictrl
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- socionext,uniphier-nx1-perictrl
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- const: simple-mfd
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- const: syscon
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reg:
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maxItems: 1
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clock-controller:
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$ref: /schemas/clock/socionext,uniphier-clock.yaml#
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reset-controller:
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$ref: /schemas/reset/socionext,uniphier-reset.yaml#
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required:
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- compatible
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- reg
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additionalProperties: false
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examples:
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- |
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syscon@59820000 {
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compatible = "socionext,uniphier-ld20-perictrl",
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"simple-mfd", "syscon";
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reg = <0x59820000 0x200>;
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clock-controller {
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compatible = "socionext,uniphier-ld20-peri-clock";
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#clock-cells = <1>;
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};
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reset-controller {
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compatible = "socionext,uniphier-ld20-peri-reset";
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#reset-cells = <1>;
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};
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};
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