287 lines
9.9 KiB
ReStructuredText
287 lines
9.9 KiB
ReStructuredText
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================================
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Application Data Integrity (ADI)
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================================
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SPARC M7 processor adds the Application Data Integrity (ADI) feature.
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ADI allows a task to set version tags on any subset of its address
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space. Once ADI is enabled and version tags are set for ranges of
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address space of a task, the processor will compare the tag in pointers
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to memory in these ranges to the version set by the application
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previously. Access to memory is granted only if the tag in given pointer
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matches the tag set by the application. In case of mismatch, processor
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raises an exception.
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Following steps must be taken by a task to enable ADI fully:
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1. Set the user mode PSTATE.mcde bit. This acts as master switch for
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the task's entire address space to enable/disable ADI for the task.
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2. Set TTE.mcd bit on any TLB entries that correspond to the range of
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addresses ADI is being enabled on. MMU checks the version tag only
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on the pages that have TTE.mcd bit set.
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3. Set the version tag for virtual addresses using stxa instruction
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and one of the MCD specific ASIs. Each stxa instruction sets the
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given tag for one ADI block size number of bytes. This step must
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be repeated for entire page to set tags for entire page.
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ADI block size for the platform is provided by the hypervisor to kernel
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in machine description tables. Hypervisor also provides the number of
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top bits in the virtual address that specify the version tag. Once
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version tag has been set for a memory location, the tag is stored in the
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physical memory and the same tag must be present in the ADI version tag
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bits of the virtual address being presented to the MMU. For example on
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SPARC M7 processor, MMU uses bits 63-60 for version tags and ADI block
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size is same as cacheline size which is 64 bytes. A task that sets ADI
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version to, say 10, on a range of memory, must access that memory using
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virtual addresses that contain 0xa in bits 63-60.
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ADI is enabled on a set of pages using mprotect() with PROT_ADI flag.
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When ADI is enabled on a set of pages by a task for the first time,
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kernel sets the PSTATE.mcde bit for the task. Version tags for memory
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addresses are set with an stxa instruction on the addresses using
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ASI_MCD_PRIMARY or ASI_MCD_ST_BLKINIT_PRIMARY. ADI block size is
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provided by the hypervisor to the kernel. Kernel returns the value of
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ADI block size to userspace using auxiliary vector along with other ADI
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info. Following auxiliary vectors are provided by the kernel:
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============ ===========================================
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AT_ADI_BLKSZ ADI block size. This is the granularity and
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alignment, in bytes, of ADI versioning.
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AT_ADI_NBITS Number of ADI version bits in the VA
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============ ===========================================
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IMPORTANT NOTES
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===============
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- Version tag values of 0x0 and 0xf are reserved. These values match any
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tag in virtual address and never generate a mismatch exception.
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- Version tags are set on virtual addresses from userspace even though
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tags are stored in physical memory. Tags are set on a physical page
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after it has been allocated to a task and a pte has been created for
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it.
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- When a task frees a memory page it had set version tags on, the page
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goes back to free page pool. When this page is re-allocated to a task,
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kernel clears the page using block initialization ASI which clears the
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version tags as well for the page. If a page allocated to a task is
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freed and allocated back to the same task, old version tags set by the
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task on that page will no longer be present.
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- ADI tag mismatches are not detected for non-faulting loads.
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- Kernel does not set any tags for user pages and it is entirely a
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task's responsibility to set any version tags. Kernel does ensure the
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version tags are preserved if a page is swapped out to the disk and
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swapped back in. It also preserves that version tags if a page is
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migrated.
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- ADI works for any size pages. A userspace task need not be aware of
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page size when using ADI. It can simply select a virtual address
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range, enable ADI on the range using mprotect() and set version tags
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for the entire range. mprotect() ensures range is aligned to page size
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and is a multiple of page size.
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- ADI tags can only be set on writable memory. For example, ADI tags can
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not be set on read-only mappings.
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ADI related traps
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=================
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With ADI enabled, following new traps may occur:
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Disrupting memory corruption
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----------------------------
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When a store accesses a memory location that has TTE.mcd=1,
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the task is running with ADI enabled (PSTATE.mcde=1), and the ADI
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tag in the address used (bits 63:60) does not match the tag set on
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the corresponding cacheline, a memory corruption trap occurs. By
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default, it is a disrupting trap and is sent to the hypervisor
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first. Hypervisor creates a sun4v error report and sends a
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resumable error (TT=0x7e) trap to the kernel. The kernel sends
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a SIGSEGV to the task that resulted in this trap with the following
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info::
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siginfo.si_signo = SIGSEGV;
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siginfo.errno = 0;
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siginfo.si_code = SEGV_ADIDERR;
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siginfo.si_addr = addr; /* PC where first mismatch occurred */
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siginfo.si_trapno = 0;
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Precise memory corruption
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-------------------------
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When a store accesses a memory location that has TTE.mcd=1,
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the task is running with ADI enabled (PSTATE.mcde=1), and the ADI
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tag in the address used (bits 63:60) does not match the tag set on
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the corresponding cacheline, a memory corruption trap occurs. If
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MCD precise exception is enabled (MCDPERR=1), a precise
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exception is sent to the kernel with TT=0x1a. The kernel sends
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a SIGSEGV to the task that resulted in this trap with the following
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info::
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siginfo.si_signo = SIGSEGV;
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siginfo.errno = 0;
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siginfo.si_code = SEGV_ADIPERR;
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siginfo.si_addr = addr; /* address that caused trap */
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siginfo.si_trapno = 0;
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NOTE:
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ADI tag mismatch on a load always results in precise trap.
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MCD disabled
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------------
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When a task has not enabled ADI and attempts to set ADI version
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on a memory address, processor sends an MCD disabled trap. This
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trap is handled by hypervisor first and the hypervisor vectors this
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trap through to the kernel as Data Access Exception trap with
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fault type set to 0xa (invalid ASI). When this occurs, the kernel
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sends the task SIGSEGV signal with following info::
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siginfo.si_signo = SIGSEGV;
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siginfo.errno = 0;
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siginfo.si_code = SEGV_ACCADI;
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siginfo.si_addr = addr; /* address that caused trap */
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siginfo.si_trapno = 0;
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Sample program to use ADI
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-------------------------
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Following sample program is meant to illustrate how to use the ADI
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functionality::
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#include <unistd.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <elf.h>
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#include <sys/ipc.h>
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#include <sys/shm.h>
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#include <sys/mman.h>
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#include <asm/asi.h>
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#ifndef AT_ADI_BLKSZ
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#define AT_ADI_BLKSZ 48
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#endif
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#ifndef AT_ADI_NBITS
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#define AT_ADI_NBITS 49
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#endif
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#ifndef PROT_ADI
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#define PROT_ADI 0x10
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#endif
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#define BUFFER_SIZE 32*1024*1024UL
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main(int argc, char* argv[], char* envp[])
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{
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unsigned long i, mcde, adi_blksz, adi_nbits;
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char *shmaddr, *tmp_addr, *end, *veraddr, *clraddr;
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int shmid, version;
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Elf64_auxv_t *auxv;
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adi_blksz = 0;
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while(*envp++ != NULL);
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for (auxv = (Elf64_auxv_t *)envp; auxv->a_type != AT_NULL; auxv++) {
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switch (auxv->a_type) {
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case AT_ADI_BLKSZ:
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adi_blksz = auxv->a_un.a_val;
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break;
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case AT_ADI_NBITS:
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adi_nbits = auxv->a_un.a_val;
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break;
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}
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}
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if (adi_blksz == 0) {
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fprintf(stderr, "Oops! ADI is not supported\n");
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exit(1);
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}
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printf("ADI capabilities:\n");
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printf("\tBlock size = %ld\n", adi_blksz);
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printf("\tNumber of bits = %ld\n", adi_nbits);
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if ((shmid = shmget(2, BUFFER_SIZE,
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IPC_CREAT | SHM_R | SHM_W)) < 0) {
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perror("shmget failed");
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exit(1);
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}
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shmaddr = shmat(shmid, NULL, 0);
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if (shmaddr == (char *)-1) {
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perror("shm attach failed");
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shmctl(shmid, IPC_RMID, NULL);
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exit(1);
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}
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if (mprotect(shmaddr, BUFFER_SIZE, PROT_READ|PROT_WRITE|PROT_ADI)) {
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perror("mprotect failed");
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goto err_out;
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}
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/* Set the ADI version tag on the shm segment
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*/
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version = 10;
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tmp_addr = shmaddr;
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end = shmaddr + BUFFER_SIZE;
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while (tmp_addr < end) {
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asm volatile(
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"stxa %1, [%0]0x90\n\t"
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:
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: "r" (tmp_addr), "r" (version));
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tmp_addr += adi_blksz;
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}
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asm volatile("membar #Sync\n\t");
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/* Create a versioned address from the normal address by placing
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* version tag in the upper adi_nbits bits
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*/
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tmp_addr = (void *) ((unsigned long)shmaddr << adi_nbits);
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tmp_addr = (void *) ((unsigned long)tmp_addr >> adi_nbits);
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veraddr = (void *) (((unsigned long)version << (64-adi_nbits))
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| (unsigned long)tmp_addr);
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printf("Starting the writes:\n");
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for (i = 0; i < BUFFER_SIZE; i++) {
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veraddr[i] = (char)(i);
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if (!(i % (1024 * 1024)))
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printf(".");
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}
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printf("\n");
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printf("Verifying data...");
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fflush(stdout);
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for (i = 0; i < BUFFER_SIZE; i++)
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if (veraddr[i] != (char)i)
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printf("\nIndex %lu mismatched\n", i);
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printf("Done.\n");
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/* Disable ADI and clean up
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*/
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if (mprotect(shmaddr, BUFFER_SIZE, PROT_READ|PROT_WRITE)) {
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perror("mprotect failed");
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goto err_out;
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}
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if (shmdt((const void *)shmaddr) != 0)
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perror("Detach failure");
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shmctl(shmid, IPC_RMID, NULL);
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exit(0);
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err_out:
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if (shmdt((const void *)shmaddr) != 0)
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perror("Detach failure");
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shmctl(shmid, IPC_RMID, NULL);
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exit(1);
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}
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