144 lines
3.6 KiB
Plaintext
144 lines
3.6 KiB
Plaintext
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2021 DH electronics GmbH
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*/
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/ {
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chosen {
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stdout-path = "serial0:115200n8";
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};
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};
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/*
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* Special SoM hardware required which uses the pins from micro SD card. The
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* pins SD3_DAT0 and SD3_DAT1 are muxed as can2 Tx and Rx. The signals for can2
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* Tx and Rx are routed to the DHCOM UART1 rts/cts pins. Therefore the micro SD
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* card must be disabled and the uart1 rts/cts must be output on other DHCOM
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* pins, see uart1 and usdhc3 node below.
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*/
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&can2 {
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status = "okay";
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};
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&gpio1 {
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/*
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* NOTE: On DRC02, the RS485_RX_En is controlled by a separate
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* GPIO line, however the i.MX6 UART driver assumes RX happens
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* during TX anyway and that it only controls drive enable DE
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* line. Hence, the RX is always enabled here.
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*/
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rs485-rx-en-hog {
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gpio-hog;
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gpios = <18 0>; /* GPIO Q */
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line-name = "rs485-rx-en";
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output-low;
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};
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};
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&gpio3 {
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gpio-line-names =
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "DRC02-In1", "", "", "", "";
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};
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&gpio4 {
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gpio-line-names =
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"", "", "", "", "", "DHCOM-E", "DRC02-In2", "DHCOM-H",
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"DHCOM-I", "DRC02-HW0", "", "", "", "", "", "",
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"", "", "", "", "DRC02-Out1", "", "", "",
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"", "", "", "", "", "", "", "";
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};
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&gpio6 {
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gpio-line-names =
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"", "", "", "DRC02-Out2", "", "", "SOM-HW1", "",
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"", "", "", "", "", "", "DRC02-HW2", "DRC02-HW1",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "";
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};
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&i2c1 {
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eeprom@50 {
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compatible = "atmel,24c04";
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reg = <0x50>;
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pagesize = <16>;
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};
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};
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&uart1 {
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/*
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* Due to the use of can2 the signals for can2 Tx and Rx are routed to
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* DHCOM UART1 rts/cts pins. Therefore this UART have to use DHCOM GPIOs
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* for rts/cts. So configure DHCOM GPIO I as rts and GPIO M as cts.
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*/
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/delete-property/ uart-has-rtscts;
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cts-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; /* GPIO M */
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pinctrl-0 = <&pinctrl_uart1 &pinctrl_dhcom_i &pinctrl_dhcom_m>;
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pinctrl-names = "default";
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rts-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* GPIO I */
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};
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&uart5 {
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/*
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* On DRC02 this UART is used as RS485 interface and RS485_TX_En is
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* controlled by DHCOM GPIO P. So remove rts/cts pins and the property
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* uart-has-rtscts from this UART and add the DHCOM GPIO P pin via
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* rts-gpios. The RS485_RX_En is controlled by DHCOM GPIO Q, see gpio1
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* node above.
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*/
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/delete-property/ uart-has-rtscts;
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linux,rs485-enabled-at-boot-time;
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pinctrl-0 = <&pinctrl_uart5_core &pinctrl_dhcom_p &pinctrl_dhcom_q>;
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pinctrl-names = "default";
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rts-gpios = <&gpio7 13 GPIO_ACTIVE_HIGH>; /* GPIO P */
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};
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&usbh1 {
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disable-over-current;
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};
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&usdhc2 { /* SD card */
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status = "okay";
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};
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&usdhc3 {
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/*
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* Due to the use of can2 the micro SD card on module have to be
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* disabled, because the pins SD3_DAT0 and SD3_DAT1 are muxed as
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* can2 Tx and Rx.
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*/
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status = "disabled";
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};
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&iomuxc {
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pinctrl-0 = <
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/*
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* The following DHCOM GPIOs are used on this board.
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* Therefore, they have been removed from the list below.
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* I: uart1 rts
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* M: uart1 cts
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* P: uart5 rs485-tx-en
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* Q: uart5 rs485-rx-en
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*/
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&pinctrl_hog_base
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&pinctrl_dhcom_a &pinctrl_dhcom_b &pinctrl_dhcom_c
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&pinctrl_dhcom_d &pinctrl_dhcom_e &pinctrl_dhcom_f
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&pinctrl_dhcom_g &pinctrl_dhcom_h
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&pinctrl_dhcom_j &pinctrl_dhcom_k &pinctrl_dhcom_l
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&pinctrl_dhcom_n &pinctrl_dhcom_o
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&pinctrl_dhcom_r
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&pinctrl_dhcom_s &pinctrl_dhcom_t &pinctrl_dhcom_u
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&pinctrl_dhcom_v &pinctrl_dhcom_w &pinctrl_dhcom_int
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>;
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pinctrl-names = "default";
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pinctrl_uart5_core: uart5-core-grp {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA 0x1b0b1
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MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA 0x1b0b1
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>;
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};
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};
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