739 lines
16 KiB
Plaintext
739 lines
16 KiB
Plaintext
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/*
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* Copyright 2016 Gateworks Corporation
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public
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* License along with this file; if not, write to the Free
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* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/linux-event-codes.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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/* these are used by bootloader for disabling nodes */
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aliases {
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led0 = &led0;
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led1 = &led1;
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nand = &gpmi;
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usb0 = &usbh1;
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usb1 = &usbotg;
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};
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chosen {
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stdout-path = &uart2;
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};
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gpio-keys {
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compatible = "gpio-keys";
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user-pb {
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label = "user_pb";
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gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
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linux,code = <BTN_0>;
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};
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user-pb1x {
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label = "user_pb1x";
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linux,code = <BTN_1>;
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interrupt-parent = <&gsc>;
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interrupts = <0>;
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};
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key-erased {
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label = "key-erased";
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linux,code = <BTN_2>;
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interrupt-parent = <&gsc>;
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interrupts = <1>;
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};
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eeprom-wp {
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label = "eeprom_wp";
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linux,code = <BTN_3>;
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interrupt-parent = <&gsc>;
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interrupts = <2>;
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};
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tamper {
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label = "tamper";
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linux,code = <BTN_4>;
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interrupt-parent = <&gsc>;
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interrupts = <5>;
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};
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switch-hold {
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label = "switch_hold";
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linux,code = <BTN_5>;
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interrupt-parent = <&gsc>;
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interrupts = <7>;
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};
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_leds>;
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led0: led-user1 {
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label = "user1";
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gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
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default-state = "on";
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linux,default-trigger = "heartbeat";
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};
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led1: led-user2 {
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label = "user2";
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gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
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default-state = "off";
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};
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};
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memory@10000000 {
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device_type = "memory";
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reg = <0x10000000 0x20000000>;
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};
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pps {
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compatible = "pps-gpio";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pps>;
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gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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reg_5p0v: regulator-5p0v {
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compatible = "regulator-fixed";
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regulator-name = "5P0V";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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};
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reg_usb_otg_vbus: regulator-usb-otg-vbus {
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compatible = "regulator-fixed";
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regulator-name = "usb_otg_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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};
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&gpmi {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpmi_nand>;
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status = "okay";
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};
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&hdmi {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hdmi>;
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ddc-i2c-bus = <&i2c3>;
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status = "okay";
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};
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&i2c1 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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gsc: gsc@20 {
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compatible = "gw,gsc";
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reg = <0x20>;
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interrupt-parent = <&gpio1>;
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interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
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interrupt-controller;
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#interrupt-cells = <1>;
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#size-cells = <0>;
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adc {
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compatible = "gw,gsc-adc";
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#address-cells = <1>;
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#size-cells = <0>;
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channel@0 {
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gw,mode = <0>;
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reg = <0x00>;
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label = "temp";
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};
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channel@2 {
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gw,mode = <1>;
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reg = <0x02>;
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label = "vdd_vin";
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};
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channel@5 {
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gw,mode = <1>;
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reg = <0x05>;
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label = "vdd_3p3";
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};
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channel@8 {
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gw,mode = <1>;
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reg = <0x08>;
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label = "vdd_bat";
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};
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channel@b {
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gw,mode = <1>;
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reg = <0x0b>;
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label = "vdd_5p0";
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};
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channel@e {
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gw,mode = <1>;
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reg = <0xe>;
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label = "vdd_arm";
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};
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channel@11 {
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gw,mode = <1>;
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reg = <0x11>;
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label = "vdd_soc";
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};
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channel@14 {
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gw,mode = <1>;
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reg = <0x14>;
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label = "vdd_3p0";
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};
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channel@17 {
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gw,mode = <1>;
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reg = <0x17>;
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label = "vdd_1p5";
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};
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channel@1d {
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gw,mode = <1>;
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reg = <0x1d>;
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label = "vdd_1p8a";
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};
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channel@20 {
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gw,mode = <1>;
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reg = <0x20>;
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label = "vdd_1p0b";
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};
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channel@26 {
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gw,mode = <1>;
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reg = <0x26>;
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label = "vdd_an1";
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};
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};
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};
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gsc_gpio: gpio@23 {
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compatible = "nxp,pca9555";
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reg = <0x23>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-parent = <&gsc>;
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interrupts = <4>;
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};
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eeprom1: eeprom@50 {
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compatible = "atmel,24c02";
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reg = <0x50>;
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pagesize = <16>;
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};
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eeprom2: eeprom@51 {
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compatible = "atmel,24c02";
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reg = <0x51>;
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pagesize = <16>;
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};
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eeprom3: eeprom@52 {
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compatible = "atmel,24c02";
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reg = <0x52>;
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pagesize = <16>;
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};
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eeprom4: eeprom@53 {
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compatible = "atmel,24c02";
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reg = <0x53>;
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pagesize = <16>;
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};
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rtc: ds1672@68 {
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compatible = "dallas,ds1672";
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reg = <0x68>;
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};
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};
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&i2c2 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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magn@1c {
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compatible = "st,lsm9ds1-magn";
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reg = <0x1c>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_mag>;
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interrupt-parent = <&gpio1>;
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interrupts = <2 IRQ_TYPE_EDGE_RISING>;
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};
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imu@6a {
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compatible = "st,lsm9ds1-imu";
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reg = <0x6a>;
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st,drdy-int-pin = <1>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_imu>;
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interrupt-parent = <&gpio7>;
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interrupts = <13 IRQ_TYPE_LEVEL_HIGH>;
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};
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ltc3676: pmic@3c {
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compatible = "lltc,ltc3676";
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reg = <0x3c>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pmic>;
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interrupt-parent = <&gpio1>;
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interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
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regulators {
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/* VDD_SOC (1+R1/R2 = 1.635) */
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reg_vdd_soc: sw1 {
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regulator-name = "vddsoc";
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regulator-min-microvolt = <674400>;
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regulator-max-microvolt = <1308000>;
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lltc,fb-voltage-divider = <127000 200000>;
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regulator-ramp-delay = <7000>;
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regulator-boot-on;
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regulator-always-on;
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};
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/* VDD_DDR (1+R1/R2 = 2.105) */
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reg_vdd_ddr: sw2 {
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regulator-name = "vddddr";
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regulator-min-microvolt = <868310>;
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regulator-max-microvolt = <1684000>;
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lltc,fb-voltage-divider = <221000 200000>;
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regulator-ramp-delay = <7000>;
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regulator-boot-on;
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regulator-always-on;
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};
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/* VDD_ARM (1+R1/R2 = 1.635) */
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reg_vdd_arm: sw3 {
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regulator-name = "vddarm";
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regulator-min-microvolt = <674400>;
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regulator-max-microvolt = <1308000>;
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lltc,fb-voltage-divider = <127000 200000>;
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regulator-ramp-delay = <7000>;
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regulator-boot-on;
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regulator-always-on;
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};
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/* VDD_3P3 (1+R1/R2 = 1.281) */
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reg_3p3v: sw4 {
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regulator-name = "vdd3p3";
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regulator-min-microvolt = <1880000>;
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regulator-max-microvolt = <3647000>;
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lltc,fb-voltage-divider = <200000 56200>;
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regulator-ramp-delay = <7000>;
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regulator-boot-on;
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regulator-always-on;
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};
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/* VDD_1P8a (1+R1/R2 = 2.505): Analog Video Decoder */
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reg_1p8a: ldo2 {
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regulator-name = "vdd1p8a";
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regulator-min-microvolt = <1816125>;
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regulator-max-microvolt = <1816125>;
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|
|
lltc,fb-voltage-divider = <301000 200000>;
|
||
|
|
regulator-boot-on;
|
||
|
|
regulator-always-on;
|
||
|
|
};
|
||
|
|
|
||
|
|
/* VDD_1P8b: microSD VDD_1P8 */
|
||
|
|
reg_1p8b: ldo3 {
|
||
|
|
regulator-name = "vdd1p8b";
|
||
|
|
regulator-min-microvolt = <1800000>;
|
||
|
|
regulator-max-microvolt = <1800000>;
|
||
|
|
regulator-boot-on;
|
||
|
|
};
|
||
|
|
|
||
|
|
/* VDD_HIGH (1+R1/R2 = 4.17) */
|
||
|
|
reg_3p0v: ldo4 {
|
||
|
|
regulator-name = "vdd3p0";
|
||
|
|
regulator-min-microvolt = <3023250>;
|
||
|
|
regulator-max-microvolt = <3023250>;
|
||
|
|
lltc,fb-voltage-divider = <634000 200000>;
|
||
|
|
regulator-boot-on;
|
||
|
|
regulator-always-on;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
&i2c3 {
|
||
|
|
clock-frequency = <100000>;
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&pinctrl_i2c3>;
|
||
|
|
status = "okay";
|
||
|
|
|
||
|
|
adv7180: camera@20 {
|
||
|
|
compatible = "adi,adv7180";
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&pinctrl_adv7180>;
|
||
|
|
reg = <0x20>;
|
||
|
|
powerdown-gpios = <&gpio5 20 GPIO_ACTIVE_LOW>;
|
||
|
|
interrupt-parent = <&gpio5>;
|
||
|
|
interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
|
||
|
|
|
||
|
|
port {
|
||
|
|
adv7180_to_ipu1_csi0_mux: endpoint {
|
||
|
|
remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
|
||
|
|
bus-width = <8>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
&ipu1_csi0_from_ipu1_csi0_mux {
|
||
|
|
bus-width = <8>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&ipu1_csi0_mux_from_parallel_sensor {
|
||
|
|
remote-endpoint = <&adv7180_to_ipu1_csi0_mux>;
|
||
|
|
bus-width = <8>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&ipu1_csi0 {
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&pinctrl_ipu1_csi0>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&pcie {
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&pinctrl_pcie>;
|
||
|
|
reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&pwm2 {
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
|
||
|
|
status = "disabled";
|
||
|
|
};
|
||
|
|
|
||
|
|
&pwm3 {
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
|
||
|
|
status = "disabled";
|
||
|
|
};
|
||
|
|
|
||
|
|
&pwm4 {
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */
|
||
|
|
status = "disabled";
|
||
|
|
};
|
||
|
|
|
||
|
|
&uart2 {
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&pinctrl_uart2>;
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&uart3 {
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&pinctrl_uart3>;
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&uart4 {
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&pinctrl_uart4>;
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&uart5 {
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&pinctrl_uart5>;
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&usbh1 {
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&usbotg {
|
||
|
|
vbus-supply = <®_usb_otg_vbus>;
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&pinctrl_usbotg>;
|
||
|
|
disable-over-current;
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&usdhc3 {
|
||
|
|
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||
|
|
pinctrl-0 = <&pinctrl_usdhc3>;
|
||
|
|
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
|
||
|
|
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
|
||
|
|
cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
&wdog1 {
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&pinctrl_wdog>;
|
||
|
|
fsl,ext-reset-output;
|
||
|
|
};
|
||
|
|
|
||
|
|
&iomuxc {
|
||
|
|
pinctrl_adv7180: adv7180grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23 0x0001b0b0
|
||
|
|
MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x4001b0b0
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_gpmi_nand: gpminandgrp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
|
||
|
|
MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
|
||
|
|
MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
|
||
|
|
MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
|
||
|
|
MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
|
||
|
|
MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
|
||
|
|
MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
|
||
|
|
MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
|
||
|
|
MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
|
||
|
|
MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
|
||
|
|
MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
|
||
|
|
MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
|
||
|
|
MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
|
||
|
|
MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
|
||
|
|
MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_hdmi: hdmigrp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE 0x1f8b0
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_i2c1: i2c1grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
|
||
|
|
MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
|
||
|
|
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0xb0b1
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_i2c2: i2c2grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
||
|
|
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_i2c3: i2c3grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
||
|
|
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_imu: imugrp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_ipu1_csi0: ipu1csi0grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0
|
||
|
|
MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0
|
||
|
|
MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0
|
||
|
|
MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0
|
||
|
|
MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0
|
||
|
|
MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0
|
||
|
|
MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0
|
||
|
|
MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0
|
||
|
|
MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b0
|
||
|
|
MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b0
|
||
|
|
MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_gpio_leds: gpioledsgrp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
|
||
|
|
MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_mag: maggrp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_pcie: pciegrp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0
|
||
|
|
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x4001b0b0 /* PCIESKT_WDIS# */
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_pmic: pmicgrp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_pps: ppsgrp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_pwm2: pwm2grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_pwm3: pwm3grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_pwm4: pwm4grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_uart2: uart2grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
|
||
|
|
MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_uart3: uart3grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
|
||
|
|
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_uart4: uart4grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
|
||
|
|
MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_uart5: uart5grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
|
||
|
|
MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_usbotg: usbotggrp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
|
||
|
|
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* OTG_PWR_EN */
|
||
|
|
MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x17059
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_usdhc3: usdhc3grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
|
||
|
|
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
|
||
|
|
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
|
||
|
|
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
|
||
|
|
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
|
||
|
|
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
|
||
|
|
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */
|
||
|
|
MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
|
||
|
|
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
|
||
|
|
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
|
||
|
|
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
|
||
|
|
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
|
||
|
|
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
|
||
|
|
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */
|
||
|
|
MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
|
||
|
|
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
|
||
|
|
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
|
||
|
|
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
|
||
|
|
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
|
||
|
|
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
|
||
|
|
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */
|
||
|
|
MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_wdog: wdoggrp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
};
|