293 lines
6.6 KiB
Plaintext
293 lines
6.6 KiB
Plaintext
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// SPDX-License-Identifier: GPL-2.0 OR X11
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/*
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* Device Tree Include file for TQ-Systems TQMa7x boards with full mounted PCB.
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*
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* Copyright (C) 2016 TQ-Systems GmbH
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* Author: Markus Niebel <Markus.Niebel@tq-group.com>
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* Copyright (C) 2019 Bruno Thomsen <bruno.thomsen@gmail.com>
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*/
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/ {
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memory@80000000 {
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device_type = "memory";
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/* 512 MB - default configuration */
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reg = <0x80000000 0x20000000>;
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};
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};
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&cpu0 {
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cpu-supply = <&sw1a_reg>;
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};
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&gpio2 {
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/* Configured as pullup by QSPI pin group */
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qspi-reset-hog {
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gpio-hog;
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gpios = <4 GPIO_ACTIVE_LOW>;
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input;
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line-name = "qspi-reset";
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};
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};
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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clock-frequency = <100000>;
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status = "okay";
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pfuze3000: pmic@8 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pmic1>;
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compatible = "fsl,pfuze3000";
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reg = <0x08>;
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regulators {
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sw1a_reg: sw1a {
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <6250>;
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};
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/* use sw1c_reg to align with pfuze100/pfuze200 */
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sw1c_reg: sw1b {
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1475000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <6250>;
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};
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sw2_reg: sw2 {
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <1850000>;
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regulator-boot-on;
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regulator-always-on;
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};
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sw3a_reg: sw3 {
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <1650000>;
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regulator-boot-on;
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regulator-always-on;
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};
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swbst_reg: swbst {
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5150000>;
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};
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snvs_reg: vsnvs {
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <3000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vref_reg: vrefddr {
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regulator-boot-on;
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regulator-always-on;
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};
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vgen1_reg: vldo1 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vgen2_reg: vldo2 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1550000>;
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regulator-always-on;
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};
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vgen3_reg: vccsd {
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regulator-min-microvolt = <2850000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vgen4_reg: v33 {
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regulator-min-microvolt = <2850000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vgen5_reg: vldo3 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vgen6_reg: vldo4 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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};
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};
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/* NXP SE97BTP with temperature sensor + eeprom */
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se97b: temperature-sensor-eeprom@1e {
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compatible = "nxp,se97b", "jedec,jc-42.4-temp";
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reg = <0x1e>;
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status = "okay";
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};
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/* ST M24C64 */
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m24c64: eeprom@50 {
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compatible = "atmel,24c64";
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reg = <0x50>;
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pagesize = <32>;
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status = "okay";
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};
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at24c02: eeprom@56 {
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compatible = "atmel,24c02";
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reg = <0x56>;
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pagesize = <16>;
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status = "okay";
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};
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ds1339: rtc@68 {
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compatible = "dallas,ds1339";
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reg = <0x68>;
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};
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};
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&iomuxc {
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX7D_PAD_I2C1_SDA__I2C1_SDA 0x40000078
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MX7D_PAD_I2C1_SCL__I2C1_SCL 0x40000078
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>;
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};
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pinctrl_pmic1: pmic1grp {
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fsl,pins = <
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MX7D_PAD_SD2_RESET_B__GPIO5_IO11 0x4000005C
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>;
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};
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pinctrl_qspi: qspigrp {
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fsl,pins = <
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MX7D_PAD_EPDC_DATA00__QSPI_A_DATA0 0x5A
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MX7D_PAD_EPDC_DATA01__QSPI_A_DATA1 0x5A
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MX7D_PAD_EPDC_DATA02__QSPI_A_DATA2 0x5A
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MX7D_PAD_EPDC_DATA03__QSPI_A_DATA3 0x5A
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MX7D_PAD_EPDC_DATA05__QSPI_A_SCLK 0x11
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MX7D_PAD_EPDC_DATA06__QSPI_A_SS0_B 0x54
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MX7D_PAD_EPDC_DATA07__QSPI_A_SS1_B 0x54
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>;
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};
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pinctrl_qspi_reset: qspi_resetgrp {
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fsl,pins = <
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/* #QSPI_RESET */
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MX7D_PAD_EPDC_DATA04__GPIO2_IO4 0x52
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>;
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};
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pinctrl_usdhc3: usdhc3grp {
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fsl,pins = <
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MX7D_PAD_SD3_CMD__SD3_CMD 0x59
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MX7D_PAD_SD3_CLK__SD3_CLK 0x56
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MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
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MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
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MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
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MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59
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MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59
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MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59
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MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59
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MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59
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MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19
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>;
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};
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pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
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fsl,pins = <
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MX7D_PAD_SD3_CMD__SD3_CMD 0x5a
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MX7D_PAD_SD3_CLK__SD3_CLK 0x51
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MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a
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MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a
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MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a
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MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a
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MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a
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MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a
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MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a
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MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a
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MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1a
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>;
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};
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pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
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fsl,pins = <
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MX7D_PAD_SD3_CMD__SD3_CMD 0x5b
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MX7D_PAD_SD3_CLK__SD3_CLK 0x51
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MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b
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MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b
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MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b
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MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b
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MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b
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MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b
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MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b
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MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b
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MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1b
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>;
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};
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};
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&iomuxc_lpsr {
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pinctrl_wdog1: wdog1grp {
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fsl,pins = <
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MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x30
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>;
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};
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};
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&qspi {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_qspi &pinctrl_qspi_reset>;
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status = "okay";
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flash0: flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <29000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <4>;
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};
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};
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&sdma {
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status = "okay";
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};
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&usdhc3 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc3>;
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pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
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pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
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assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
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assigned-clock-rates = <400000000>;
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bus-width = <8>;
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non-removable;
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vmmc-supply = <&vgen4_reg>;
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vqmmc-supply = <&sw2_reg>;
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status = "okay";
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};
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&wdog1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_wdog1>;
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/*
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* Errata e10574:
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* WDOG reset needs to run with WDOG_RESET_B signal enabled.
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* X1-51 (WDOG1#) signal needs carrier board handling to reset
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* TQMa7 on X1-22 (RESET_IN#).
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*/
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fsl,ext-reset-output;
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status = "okay";
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};
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