494 lines
8.1 KiB
Plaintext
494 lines
8.1 KiB
Plaintext
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// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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// Copyright 2021 Jonathan Neuschäfer
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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compatible = "nuvoton,wpcm450";
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#address-cells = <1>;
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#size-cells = <1>;
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aliases {
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gpio0 = &gpio0;
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gpio1 = &gpio1;
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gpio2 = &gpio2;
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gpio3 = &gpio3;
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gpio4 = &gpio4;
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gpio5 = &gpio5;
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gpio6 = &gpio6;
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gpio7 = &gpio7;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "arm,arm926ej-s";
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device_type = "cpu";
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reg = <0>;
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};
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};
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clk24m: clock-24mhz {
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/* 24 MHz dummy clock */
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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#clock-cells = <0>;
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};
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refclk: clock-48mhz {
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/* 48 MHz reference oscillator */
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compatible = "fixed-clock";
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clock-output-names = "ref";
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clock-frequency = <48000000>;
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#clock-cells = <0>;
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&aic>;
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ranges;
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gcr: syscon@b0000000 {
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compatible = "nuvoton,wpcm450-gcr", "syscon", "simple-mfd";
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reg = <0xb0000000 0x200>;
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};
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clk: clock-controller@b0000200 {
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compatible = "nuvoton,wpcm450-clk";
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reg = <0xb0000200 0x100>;
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clocks = <&refclk>;
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clock-names = "ref";
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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serial0: serial@b8000000 {
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compatible = "nuvoton,wpcm450-uart";
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reg = <0xb8000000 0x20>;
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reg-shift = <2>;
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interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk24m>;
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pinctrl-names = "default";
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pinctrl-0 = <&bsp_pins>;
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status = "disabled";
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};
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serial1: serial@b8000100 {
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compatible = "nuvoton,wpcm450-uart";
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reg = <0xb8000100 0x20>;
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reg-shift = <2>;
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interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk24m>;
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status = "disabled";
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};
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timer0: timer@b8001000 {
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compatible = "nuvoton,wpcm450-timer";
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interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0xb8001000 0x1c>;
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clocks = <&clk24m>;
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};
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watchdog0: watchdog@b800101c {
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compatible = "nuvoton,wpcm450-wdt";
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0xb800101c 0x4>;
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clocks = <&clk24m>;
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};
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aic: interrupt-controller@b8002000 {
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compatible = "nuvoton,wpcm450-aic";
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reg = <0xb8002000 0x1000>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pinctrl: pinctrl@b8003000 {
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compatible = "nuvoton,wpcm450-pinctrl";
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reg = <0xb8003000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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gpio0: gpio@0 {
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reg = <0>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupts = <2 IRQ_TYPE_LEVEL_HIGH>,
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<3 IRQ_TYPE_LEVEL_HIGH>,
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<4 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-controller;
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};
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gpio1: gpio@1 {
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reg = <1>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-controller;
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};
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gpio2: gpio@2 {
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reg = <2>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpio3: gpio@3 {
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reg = <3>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpio4: gpio@4 {
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reg = <4>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpio5: gpio@5 {
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reg = <5>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpio6: gpio@6 {
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reg = <6>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpio7: gpio@7 {
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reg = <7>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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smb3_pins: mux-smb3 {
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groups = "smb3";
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function = "smb3";
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};
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smb4_pins: mux-smb4 {
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groups = "smb4";
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function = "smb4";
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};
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smb5_pins: mux-smb5 {
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groups = "smb5";
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function = "smb5";
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};
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scs1_pins: mux-scs1 {
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groups = "scs1";
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function = "scs1";
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};
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scs2_pins: mux-scs2 {
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groups = "scs2";
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function = "scs2";
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};
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scs3_pins: mux-scs3 {
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groups = "scs3";
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function = "scs3";
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};
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smb0_pins: mux-smb0 {
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groups = "smb0";
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function = "smb0";
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};
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smb1_pins: mux-smb1 {
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groups = "smb1";
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function = "smb1";
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};
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smb2_pins: mux-smb2 {
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groups = "smb2";
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function = "smb2";
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};
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bsp_pins: mux-bsp {
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groups = "bsp";
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function = "bsp";
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};
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hsp1_pins: mux-hsp1 {
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groups = "hsp1";
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function = "hsp1";
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};
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hsp2_pins: mux-hsp2 {
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groups = "hsp2";
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function = "hsp2";
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};
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r1err_pins: mux-r1err {
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groups = "r1err";
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function = "r1err";
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};
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r1md_pins: mux-r1md {
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groups = "r1md";
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function = "r1md";
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};
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rmii2_pins: mux-rmii2 {
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groups = "rmii2";
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function = "rmii2";
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};
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r2err_pins: mux-r2err {
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groups = "r2err";
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function = "r2err";
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};
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r2md_pins: mux-r2md {
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groups = "r2md";
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function = "r2md";
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};
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kbcc_pins: mux-kbcc {
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groups = "kbcc";
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function = "kbcc";
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};
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dvo0_pins: mux-dvo0 {
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groups = "dvo";
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function = "dvo0";
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};
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dvo3_pins: mux-dvo3 {
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groups = "dvo";
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function = "dvo3";
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};
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clko_pins: mux-clko {
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groups = "clko";
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function = "clko";
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};
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smi_pins: mux-smi {
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groups = "smi";
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function = "smi";
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};
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uinc_pins: mux-uinc {
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groups = "uinc";
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function = "uinc";
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};
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gspi_pins: mux-gspi {
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groups = "gspi";
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function = "gspi";
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};
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mben_pins: mux-mben {
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groups = "mben";
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function = "mben";
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};
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xcs2_pins: mux-xcs2 {
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groups = "xcs2";
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function = "xcs2";
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};
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xcs1_pins: mux-xcs1 {
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groups = "xcs1";
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function = "xcs1";
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};
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sdio_pins: mux-sdio {
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groups = "sdio";
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function = "sdio";
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};
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sspi_pins: mux-sspi {
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groups = "sspi";
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function = "sspi";
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};
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fi0_pins: mux-fi0 {
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groups = "fi0";
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function = "fi0";
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};
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fi1_pins: mux-fi1 {
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groups = "fi1";
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function = "fi1";
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};
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fi2_pins: mux-fi2 {
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groups = "fi2";
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function = "fi2";
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};
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fi3_pins: mux-fi3 {
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groups = "fi3";
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function = "fi3";
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};
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fi4_pins: mux-fi4 {
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groups = "fi4";
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function = "fi4";
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};
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fi5_pins: mux-fi5 {
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groups = "fi5";
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function = "fi5";
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};
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fi6_pins: mux-fi6 {
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groups = "fi6";
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function = "fi6";
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};
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fi7_pins: mux-fi7 {
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groups = "fi7";
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function = "fi7";
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};
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fi8_pins: mux-fi8 {
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groups = "fi8";
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function = "fi8";
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};
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fi9_pins: mux-fi9 {
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groups = "fi9";
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function = "fi9";
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};
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fi10_pins: mux-fi10 {
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groups = "fi10";
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function = "fi10";
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};
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fi11_pins: mux-fi11 {
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groups = "fi11";
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function = "fi11";
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};
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fi12_pins: mux-fi12 {
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groups = "fi12";
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function = "fi12";
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};
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fi13_pins: mux-fi13 {
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groups = "fi13";
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function = "fi13";
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};
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fi14_pins: mux-fi14 {
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groups = "fi14";
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function = "fi14";
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};
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fi15_pins: mux-fi15 {
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groups = "fi15";
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function = "fi15";
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};
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pwm0_pins: mux-pwm0 {
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groups = "pwm0";
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function = "pwm0";
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};
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pwm1_pins: mux-pwm1 {
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groups = "pwm1";
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function = "pwm1";
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};
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pwm2_pins: mux-pwm2 {
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groups = "pwm2";
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function = "pwm2";
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};
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pwm3_pins: mux-pwm3 {
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groups = "pwm3";
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function = "pwm3";
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};
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pwm4_pins: mux-pwm4 {
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groups = "pwm4";
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function = "pwm4";
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};
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pwm5_pins: mux-pwm5 {
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groups = "pwm5";
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function = "pwm5";
|
||
|
|
};
|
||
|
|
|
||
|
|
pwm6_pins: mux-pwm6 {
|
||
|
|
groups = "pwm6";
|
||
|
|
function = "pwm6";
|
||
|
|
};
|
||
|
|
|
||
|
|
pwm7_pins: mux-pwm7 {
|
||
|
|
groups = "pwm7";
|
||
|
|
function = "pwm7";
|
||
|
|
};
|
||
|
|
|
||
|
|
hg0_pins: mux-hg0 {
|
||
|
|
groups = "hg0";
|
||
|
|
function = "hg0";
|
||
|
|
};
|
||
|
|
|
||
|
|
hg1_pins: mux-hg1 {
|
||
|
|
groups = "hg1";
|
||
|
|
function = "hg1";
|
||
|
|
};
|
||
|
|
|
||
|
|
hg2_pins: mux-hg2 {
|
||
|
|
groups = "hg2";
|
||
|
|
function = "hg2";
|
||
|
|
};
|
||
|
|
|
||
|
|
hg3_pins: mux-hg3 {
|
||
|
|
groups = "hg3";
|
||
|
|
function = "hg3";
|
||
|
|
};
|
||
|
|
|
||
|
|
hg4_pins: mux-hg4 {
|
||
|
|
groups = "hg4";
|
||
|
|
function = "hg4";
|
||
|
|
};
|
||
|
|
|
||
|
|
hg5_pins: mux-hg5 {
|
||
|
|
groups = "hg5";
|
||
|
|
function = "hg5";
|
||
|
|
};
|
||
|
|
|
||
|
|
hg6_pins: mux-hg6 {
|
||
|
|
groups = "hg6";
|
||
|
|
function = "hg6";
|
||
|
|
};
|
||
|
|
|
||
|
|
hg7_pins: mux-hg7 {
|
||
|
|
groups = "hg7";
|
||
|
|
function = "hg7";
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
fiu: spi-controller@c8000000 {
|
||
|
|
compatible = "nuvoton,wpcm450-fiu";
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
reg = <0xc8000000 0x1000>, <0xc0000000 0x4000000>;
|
||
|
|
reg-names = "control", "memory";
|
||
|
|
clocks = <&clk 0>;
|
||
|
|
nuvoton,shm = <&shm>;
|
||
|
|
status = "disabled";
|
||
|
|
};
|
||
|
|
|
||
|
|
shm: syscon@c8001000 {
|
||
|
|
compatible = "nuvoton,wpcm450-shm", "syscon";
|
||
|
|
reg = <0xc8001000 0x1000>;
|
||
|
|
reg-io-width = <1>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|