125 lines
2.1 KiB
Plaintext
125 lines
2.1 KiB
Plaintext
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source for the iWave RZ/G1H Qseven SOM
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*
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* Copyright (C) 2020 Renesas Electronics Corp.
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*/
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#include "r8a7742.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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compatible = "iwave,g21m", "renesas,r8a7742";
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memory@40000000 {
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device_type = "memory";
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reg = <0 0x40000000 0 0x40000000>;
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};
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memory@200000000 {
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device_type = "memory";
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reg = <2 0x00000000 0 0x40000000>;
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};
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reg_3p3v: 3p3v {
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compatible = "regulator-fixed";
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regulator-name = "3P3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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regulator-boot-on;
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};
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};
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&extal_clk {
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clock-frequency = <20000000>;
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};
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&gpio0 {
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/* GP0_18 set low to select QSPI. Doing so will disable VIN2 */
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qspi-en-hog {
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gpio-hog;
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gpios = <18 GPIO_ACTIVE_HIGH>;
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output-low;
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line-name = "QSPI_EN";
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};
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};
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&i2c0 {
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pinctrl-0 = <&i2c0_pins>;
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pinctrl-names = "default";
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status = "okay";
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clock-frequency = <400000>;
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rtc@68 {
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compatible = "ti,bq32000";
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reg = <0x68>;
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interrupt-parent = <&gpio1>;
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interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
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};
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};
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&mmcif1 {
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pinctrl-0 = <&mmc1_pins>;
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pinctrl-names = "default";
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vmmc-supply = <®_3p3v>;
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bus-width = <4>;
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non-removable;
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status = "okay";
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};
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&pfc {
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i2c0_pins: i2c0 {
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groups = "i2c0";
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function = "i2c0";
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};
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mmc1_pins: mmc1 {
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groups = "mmc1_data4", "mmc1_ctrl";
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function = "mmc1";
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};
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qspi_pins: qspi {
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groups = "qspi_ctrl", "qspi_data2";
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function = "qspi";
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};
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};
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&qspi {
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pinctrl-0 = <&qspi_pins>;
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pinctrl-names = "default";
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status = "okay";
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flash: flash@0 {
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compatible = "sst,sst25vf016b", "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <50000000>;
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m25p,fast-read;
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spi-cpol;
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spi-cpha;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "bootloader";
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reg = <0x00000000 0x000c0000>;
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read-only;
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};
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partition@c0000 {
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label = "env";
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reg = <0x000c0000 0x00002000>;
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};
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partition@c2000 {
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label = "user";
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reg = <0x000c2000 0x0013e000>;
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};
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};
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};
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};
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