326 lines
11 KiB
Plaintext
326 lines
11 KiB
Plaintext
|
// SPDX-License-Identifier: GPL-2.0
|
||
|
|
|
||
|
|
#include "tegra30-asus-nexus7-grouper-memory-timings.dtsi"
|
||
|
|
|
||
|
|
/ {
|
||
|
|
/*
|
||
|
|
* Tilapia's memory timings are pretty much the same as the Grouper's
|
||
|
|
* ones. There are few minor tunings made for a higher clock rates,
|
||
|
|
* these differentiating timings are overridden here for Tilapia.
|
||
|
|
*/
|
||
|
|
|
||
|
|
memory-controller@7000f400 {
|
||
|
|
emc-timings-0 {
|
||
|
|
timing-667000000 {
|
||
|
|
clock-frequency = <667000000>;
|
||
|
|
|
||
|
|
nvidia,emc-auto-cal-interval = <0x001fffff>;
|
||
|
|
nvidia,emc-mode-1 = <0x80100002>;
|
||
|
|
nvidia,emc-mode-2 = <0x80200018>;
|
||
|
|
nvidia,emc-mode-reset = <0x80000b71>;
|
||
|
|
nvidia,emc-zcal-cnt-long = <0x00000040>;
|
||
|
|
nvidia,emc-cfg-periodic-qrst;
|
||
|
|
|
||
|
|
nvidia,emc-configuration = <
|
||
|
|
0x0000001f /* EMC_RC */
|
||
|
|
0x00000069 /* EMC_RFC */
|
||
|
|
0x00000017 /* EMC_RAS */
|
||
|
|
0x00000007 /* EMC_RP */
|
||
|
|
0x00000005 /* EMC_R2W */
|
||
|
|
0x0000000c /* EMC_W2R */
|
||
|
|
0x00000003 /* EMC_R2P */
|
||
|
|
0x00000011 /* EMC_W2P */
|
||
|
|
0x00000007 /* EMC_RD_RCD */
|
||
|
|
0x00000007 /* EMC_WR_RCD */
|
||
|
|
0x00000002 /* EMC_RRD */
|
||
|
|
0x00000001 /* EMC_REXT */
|
||
|
|
0x00000000 /* EMC_WEXT */
|
||
|
|
0x00000007 /* EMC_WDV */
|
||
|
|
0x0000000b /* EMC_QUSE */
|
||
|
|
0x00000009 /* EMC_QRST */
|
||
|
|
0x0000000b /* EMC_QSAFE */
|
||
|
|
0x00000011 /* EMC_RDV */
|
||
|
|
0x00001412 /* EMC_REFRESH */
|
||
|
|
0x00000000 /* EMC_BURST_REFRESH_NUM */
|
||
|
|
0x00000504 /* EMC_PRE_REFRESH_REQ_CNT */
|
||
|
|
0x00000002 /* EMC_PDEX2WR */
|
||
|
|
0x0000000e /* EMC_PDEX2RD */
|
||
|
|
0x00000001 /* EMC_PCHG2PDEN */
|
||
|
|
0x00000000 /* EMC_ACT2PDEN */
|
||
|
|
0x0000000c /* EMC_AR2PDEN */
|
||
|
|
0x00000016 /* EMC_RW2PDEN */
|
||
|
|
0x00000072 /* EMC_TXSR */
|
||
|
|
0x00000200 /* EMC_TXSRDLL */
|
||
|
|
0x00000005 /* EMC_TCKE */
|
||
|
|
0x00000015 /* EMC_TFAW */
|
||
|
|
0x00000000 /* EMC_TRPAB */
|
||
|
|
0x00000006 /* EMC_TCLKSTABLE */
|
||
|
|
0x00000007 /* EMC_TCLKSTOP */
|
||
|
|
0x00001453 /* EMC_TREFBW */
|
||
|
|
0x0000000c /* EMC_QUSE_EXTRA */
|
||
|
|
0x00000004 /* EMC_FBIO_CFG6 */
|
||
|
|
0x00000000 /* EMC_ODT_WRITE */
|
||
|
|
0x00000000 /* EMC_ODT_READ */
|
||
|
|
0x00005088 /* EMC_FBIO_CFG5 */
|
||
|
|
0xf00b0191 /* EMC_CFG_DIG_DLL */
|
||
|
|
0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
|
||
|
|
0x00000008 /* EMC_DLL_XFORM_DQS0 */
|
||
|
|
0x00000008 /* EMC_DLL_XFORM_DQS1 */
|
||
|
|
0x00000008 /* EMC_DLL_XFORM_DQS2 */
|
||
|
|
0x00000008 /* EMC_DLL_XFORM_DQS3 */
|
||
|
|
0x0000000a /* EMC_DLL_XFORM_DQS4 */
|
||
|
|
0x0000000a /* EMC_DLL_XFORM_DQS5 */
|
||
|
|
0x0000000a /* EMC_DLL_XFORM_DQS6 */
|
||
|
|
0x0000000a /* EMC_DLL_XFORM_DQS7 */
|
||
|
|
0x00000000 /* EMC_DLL_XFORM_QUSE0 */
|
||
|
|
0x00000000 /* EMC_DLL_XFORM_QUSE1 */
|
||
|
|
0x00000000 /* EMC_DLL_XFORM_QUSE2 */
|
||
|
|
0x00000000 /* EMC_DLL_XFORM_QUSE3 */
|
||
|
|
0x00000000 /* EMC_DLL_XFORM_QUSE4 */
|
||
|
|
0x00000000 /* EMC_DLL_XFORM_QUSE5 */
|
||
|
|
0x00000000 /* EMC_DLL_XFORM_QUSE6 */
|
||
|
|
0x00000000 /* EMC_DLL_XFORM_QUSE7 */
|
||
|
|
0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
|
||
|
|
0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
|
||
|
|
0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
|
||
|
|
0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
|
||
|
|
0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
|
||
|
|
0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
|
||
|
|
0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
|
||
|
|
0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
|
||
|
|
0x0000000c /* EMC_DLL_XFORM_DQ0 */
|
||
|
|
0x0000000c /* EMC_DLL_XFORM_DQ1 */
|
||
|
|
0x0000000c /* EMC_DLL_XFORM_DQ2 */
|
||
|
|
0x0000000c /* EMC_DLL_XFORM_DQ3 */
|
||
|
|
0x000002a0 /* EMC_XM2CMDPADCTRL */
|
||
|
|
0x0800013d /* EMC_XM2DQSPADCTRL2 */
|
||
|
|
0x22220000 /* EMC_XM2DQPADCTRL2 */
|
||
|
|
0x77fff884 /* EMC_XM2CLKPADCTRL */
|
||
|
|
0x01f1f501 /* EMC_XM2COMPPADCTRL */
|
||
|
|
0x07077404 /* EMC_XM2VTTGENPADCTRL */
|
||
|
|
0x54000000 /* EMC_XM2VTTGENPADCTRL2 */
|
||
|
|
0x080001e8 /* EMC_XM2QUSEPADCTRL */
|
||
|
|
0x08000021 /* EMC_XM2DQSPADCTRL3 */
|
||
|
|
0x00000802 /* EMC_CTT_TERM_CTRL */
|
||
|
|
0x00020000 /* EMC_ZCAL_INTERVAL */
|
||
|
|
0x00000100 /* EMC_ZCAL_WAIT_CNT */
|
||
|
|
0x0156000c /* EMC_MRS_WAIT_CNT */
|
||
|
|
0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
|
||
|
|
0x00000000 /* EMC_CTT */
|
||
|
|
0x00000000 /* EMC_CTT_DURATION */
|
||
|
|
0x800028a5 /* EMC_DYN_SELF_REF_CONTROL */
|
||
|
|
0xe8000000 /* EMC_FBIO_SPARE */
|
||
|
|
0xff00ff49 /* EMC_CFG_RSV */
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
emc-timings-1 {
|
||
|
|
timing-333500000 {
|
||
|
|
clock-frequency = <333500000>;
|
||
|
|
|
||
|
|
nvidia,emc-auto-cal-interval = <0x001fffff>;
|
||
|
|
nvidia,emc-mode-1 = <0x80100002>;
|
||
|
|
nvidia,emc-mode-2 = <0x80200000>;
|
||
|
|
nvidia,emc-mode-reset = <0x80000321>;
|
||
|
|
nvidia,emc-zcal-cnt-long = <0x00000040>;
|
||
|
|
|
||
|
|
nvidia,emc-configuration = <
|
||
|
|
0x0000000f /* EMC_RC */
|
||
|
|
0x00000034 /* EMC_RFC */
|
||
|
|
0x0000000a /* EMC_RAS */
|
||
|
|
0x00000003 /* EMC_RP */
|
||
|
|
0x00000003 /* EMC_R2W */
|
||
|
|
0x00000008 /* EMC_W2R */
|
||
|
|
0x00000002 /* EMC_R2P */
|
||
|
|
0x00000009 /* EMC_W2P */
|
||
|
|
0x00000003 /* EMC_RD_RCD */
|
||
|
|
0x00000003 /* EMC_WR_RCD */
|
||
|
|
0x00000002 /* EMC_RRD */
|
||
|
|
0x00000001 /* EMC_REXT */
|
||
|
|
0x00000000 /* EMC_WEXT */
|
||
|
|
0x00000004 /* EMC_WDV */
|
||
|
|
0x00000006 /* EMC_QUSE */
|
||
|
|
0x00000004 /* EMC_QRST */
|
||
|
|
0x0000000a /* EMC_QSAFE */
|
||
|
|
0x0000000c /* EMC_RDV */
|
||
|
|
0x000009e9 /* EMC_REFRESH */
|
||
|
|
0x00000000 /* EMC_BURST_REFRESH_NUM */
|
||
|
|
0x0000027a /* EMC_PRE_REFRESH_REQ_CNT */
|
||
|
|
0x00000001 /* EMC_PDEX2WR */
|
||
|
|
0x00000008 /* EMC_PDEX2RD */
|
||
|
|
0x00000001 /* EMC_PCHG2PDEN */
|
||
|
|
0x00000000 /* EMC_ACT2PDEN */
|
||
|
|
0x00000007 /* EMC_AR2PDEN */
|
||
|
|
0x0000000e /* EMC_RW2PDEN */
|
||
|
|
0x00000039 /* EMC_TXSR */
|
||
|
|
0x00000200 /* EMC_TXSRDLL */
|
||
|
|
0x00000004 /* EMC_TCKE */
|
||
|
|
0x0000000a /* EMC_TFAW */
|
||
|
|
0x00000000 /* EMC_TRPAB */
|
||
|
|
0x00000004 /* EMC_TCLKSTABLE */
|
||
|
|
0x00000005 /* EMC_TCLKSTOP */
|
||
|
|
0x00000a2a /* EMC_TREFBW */
|
||
|
|
0x00000000 /* EMC_QUSE_EXTRA */
|
||
|
|
0x00000004 /* EMC_FBIO_CFG6 */
|
||
|
|
0x00000000 /* EMC_ODT_WRITE */
|
||
|
|
0x00000000 /* EMC_ODT_READ */
|
||
|
|
0x00007088 /* EMC_FBIO_CFG5 */
|
||
|
|
0x002600a4 /* EMC_CFG_DIG_DLL */
|
||
|
|
0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
|
||
|
|
0x0003c000 /* EMC_DLL_XFORM_DQS0 */
|
||
|
|
0x0003c000 /* EMC_DLL_XFORM_DQS1 */
|
||
|
|
0x0003c000 /* EMC_DLL_XFORM_DQS2 */
|
||
|
|
0x0003c000 /* EMC_DLL_XFORM_DQS3 */
|
||
|
|
0x00014000 /* EMC_DLL_XFORM_DQS4 */
|
||
|
|
0x00014000 /* EMC_DLL_XFORM_DQS5 */
|
||
|
|
0x00014000 /* EMC_DLL_XFORM_DQS6 */
|
||
|
|
0x00014000 /* EMC_DLL_XFORM_DQS7 */
|
||
|
|
0x00000000 /* EMC_DLL_XFORM_QUSE0 */
|
||
|
|
0x00000000 /* EMC_DLL_XFORM_QUSE1 */
|
||
|
|
0x00000000 /* EMC_DLL_XFORM_QUSE2 */
|
||
|
|
0x00000000 /* EMC_DLL_XFORM_QUSE3 */
|
||
|
|
0x00000000 /* EMC_DLL_XFORM_QUSE4 */
|
||
|
|
0x00000000 /* EMC_DLL_XFORM_QUSE5 */
|
||
|
|
0x00000000 /* EMC_DLL_XFORM_QUSE6 */
|
||
|
|
0x00000000 /* EMC_DLL_XFORM_QUSE7 */
|
||
|
|
0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
|
||
|
|
0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
|
||
|
|
0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
|
||
|
|
0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
|
||
|
|
0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
|
||
|
|
0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
|
||
|
|
0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
|
||
|
|
0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
|
||
|
|
0x00048000 /* EMC_DLL_XFORM_DQ0 */
|
||
|
|
0x00048000 /* EMC_DLL_XFORM_DQ1 */
|
||
|
|
0x00048000 /* EMC_DLL_XFORM_DQ2 */
|
||
|
|
0x00048000 /* EMC_DLL_XFORM_DQ3 */
|
||
|
|
0x000002a0 /* EMC_XM2CMDPADCTRL */
|
||
|
|
0x0800013d /* EMC_XM2DQSPADCTRL2 */
|
||
|
|
0x00000000 /* EMC_XM2DQPADCTRL2 */
|
||
|
|
0x77fff884 /* EMC_XM2CLKPADCTRL */
|
||
|
|
0x01f1f508 /* EMC_XM2COMPPADCTRL */
|
||
|
|
0x05057404 /* EMC_XM2VTTGENPADCTRL */
|
||
|
|
0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
|
||
|
|
0x080001e8 /* EMC_XM2QUSEPADCTRL */
|
||
|
|
0x08000021 /* EMC_XM2DQSPADCTRL3 */
|
||
|
|
0x00000802 /* EMC_CTT_TERM_CTRL */
|
||
|
|
0x00020000 /* EMC_ZCAL_INTERVAL */
|
||
|
|
0x00000100 /* EMC_ZCAL_WAIT_CNT */
|
||
|
|
0x018b000c /* EMC_MRS_WAIT_CNT */
|
||
|
|
0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
|
||
|
|
0x00000000 /* EMC_CTT */
|
||
|
|
0x00000000 /* EMC_CTT_DURATION */
|
||
|
|
0x800014d4 /* EMC_DYN_SELF_REF_CONTROL */
|
||
|
|
0xe8000000 /* EMC_FBIO_SPARE */
|
||
|
|
0xff00ff89 /* EMC_CFG_RSV */
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
timing-667000000 {
|
||
|
|
clock-frequency = <667000000>;
|
||
|
|
|
||
|
|
nvidia,emc-auto-cal-interval = <0x001fffff>;
|
||
|
|
nvidia,emc-mode-1 = <0x80100002>;
|
||
|
|
nvidia,emc-mode-2 = <0x80200018>;
|
||
|
|
nvidia,emc-mode-reset = <0x80000b71>;
|
||
|
|
nvidia,emc-zcal-cnt-long = <0x00000040>;
|
||
|
|
nvidia,emc-cfg-periodic-qrst;
|
||
|
|
|
||
|
|
nvidia,emc-configuration = <
|
||
|
|
0x00000020 /* EMC_RC */
|
||
|
|
0x0000006a /* EMC_RFC */
|
||
|
|
0x00000017 /* EMC_RAS */
|
||
|
|
0x00000007 /* EMC_RP */
|
||
|
|
0x00000005 /* EMC_R2W */
|
||
|
|
0x0000000c /* EMC_W2R */
|
||
|
|
0x00000003 /* EMC_R2P */
|
||
|
|
0x00000011 /* EMC_W2P */
|
||
|
|
0x00000007 /* EMC_RD_RCD */
|
||
|
|
0x00000007 /* EMC_WR_RCD */
|
||
|
|
0x00000002 /* EMC_RRD */
|
||
|
|
0x00000001 /* EMC_REXT */
|
||
|
|
0x00000000 /* EMC_WEXT */
|
||
|
|
0x00000007 /* EMC_WDV */
|
||
|
|
0x0000000a /* EMC_QUSE */
|
||
|
|
0x00000009 /* EMC_QRST */
|
||
|
|
0x0000000b /* EMC_QSAFE */
|
||
|
|
0x00000011 /* EMC_RDV */
|
||
|
|
0x00001412 /* EMC_REFRESH */
|
||
|
|
0x00000000 /* EMC_BURST_REFRESH_NUM */
|
||
|
|
0x00000504 /* EMC_PRE_REFRESH_REQ_CNT */
|
||
|
|
0x00000002 /* EMC_PDEX2WR */
|
||
|
|
0x0000000e /* EMC_PDEX2RD */
|
||
|
|
0x00000001 /* EMC_PCHG2PDEN */
|
||
|
|
0x00000000 /* EMC_ACT2PDEN */
|
||
|
|
0x0000000c /* EMC_AR2PDEN */
|
||
|
|
0x00000016 /* EMC_RW2PDEN */
|
||
|
|
0x00000072 /* EMC_TXSR */
|
||
|
|
0x00000200 /* EMC_TXSRDLL */
|
||
|
|
0x00000005 /* EMC_TCKE */
|
||
|
|
0x00000015 /* EMC_TFAW */
|
||
|
|
0x00000000 /* EMC_TRPAB */
|
||
|
|
0x00000006 /* EMC_TCLKSTABLE */
|
||
|
|
0x00000007 /* EMC_TCLKSTOP */
|
||
|
|
0x00001453 /* EMC_TREFBW */
|
||
|
|
0x0000000b /* EMC_QUSE_EXTRA */
|
||
|
|
0x00000006 /* EMC_FBIO_CFG6 */
|
||
|
|
0x00000000 /* EMC_ODT_WRITE */
|
||
|
|
0x00000000 /* EMC_ODT_READ */
|
||
|
|
0x00005088 /* EMC_FBIO_CFG5 */
|
||
|
|
0xf00b0191 /* EMC_CFG_DIG_DLL */
|
||
|
|
0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
|
||
|
|
0x00000008 /* EMC_DLL_XFORM_DQS0 */
|
||
|
|
0x00000008 /* EMC_DLL_XFORM_DQS1 */
|
||
|
|
0x00000008 /* EMC_DLL_XFORM_DQS2 */
|
||
|
|
0x00000008 /* EMC_DLL_XFORM_DQS3 */
|
||
|
|
0x0000000a /* EMC_DLL_XFORM_DQS4 */
|
||
|
|
0x0000000a /* EMC_DLL_XFORM_DQS5 */
|
||
|
|
0x0000000a /* EMC_DLL_XFORM_DQS6 */
|
||
|
|
0x0000000a /* EMC_DLL_XFORM_DQS7 */
|
||
|
|
0x00018000 /* EMC_DLL_XFORM_QUSE0 */
|
||
|
|
0x00018000 /* EMC_DLL_XFORM_QUSE1 */
|
||
|
|
0x00018000 /* EMC_DLL_XFORM_QUSE2 */
|
||
|
|
0x00018000 /* EMC_DLL_XFORM_QUSE3 */
|
||
|
|
0x00000000 /* EMC_DLL_XFORM_QUSE4 */
|
||
|
|
0x00000000 /* EMC_DLL_XFORM_QUSE5 */
|
||
|
|
0x00000000 /* EMC_DLL_XFORM_QUSE6 */
|
||
|
|
0x00000000 /* EMC_DLL_XFORM_QUSE7 */
|
||
|
|
0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
|
||
|
|
0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
|
||
|
|
0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
|
||
|
|
0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
|
||
|
|
0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
|
||
|
|
0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
|
||
|
|
0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
|
||
|
|
0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
|
||
|
|
0x0000000a /* EMC_DLL_XFORM_DQ0 */
|
||
|
|
0x0000000a /* EMC_DLL_XFORM_DQ1 */
|
||
|
|
0x0000000a /* EMC_DLL_XFORM_DQ2 */
|
||
|
|
0x0000000a /* EMC_DLL_XFORM_DQ3 */
|
||
|
|
0x000002a0 /* EMC_XM2CMDPADCTRL */
|
||
|
|
0x0800013d /* EMC_XM2DQSPADCTRL2 */
|
||
|
|
0x22220000 /* EMC_XM2DQPADCTRL2 */
|
||
|
|
0x77fff884 /* EMC_XM2CLKPADCTRL */
|
||
|
|
0x01f1f501 /* EMC_XM2COMPPADCTRL */
|
||
|
|
0x07077404 /* EMC_XM2VTTGENPADCTRL */
|
||
|
|
0x54000000 /* EMC_XM2VTTGENPADCTRL2 */
|
||
|
|
0x080001e8 /* EMC_XM2QUSEPADCTRL */
|
||
|
|
0x0c000021 /* EMC_XM2DQSPADCTRL3 */
|
||
|
|
0x00000802 /* EMC_CTT_TERM_CTRL */
|
||
|
|
0x00020000 /* EMC_ZCAL_INTERVAL */
|
||
|
|
0x00000100 /* EMC_ZCAL_WAIT_CNT */
|
||
|
|
0x0155000c /* EMC_MRS_WAIT_CNT */
|
||
|
|
0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
|
||
|
|
0x00000000 /* EMC_CTT */
|
||
|
|
0x00000000 /* EMC_CTT_DURATION */
|
||
|
|
0x800028a5 /* EMC_DYN_SELF_REF_CONTROL */
|
||
|
|
0xe8000000 /* EMC_FBIO_SPARE */
|
||
|
|
0xff00ff49 /* EMC_CFG_RSV */
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|