75 lines
2.7 KiB
C
75 lines
2.7 KiB
C
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* AM33XX PRM instance offset macros
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*
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* Copyright (C) 2011-2012 Texas Instruments Incorporated - https://www.ti.com/
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*/
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#ifndef __ARCH_ARM_MACH_OMAP2_PRM33XX_H
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#define __ARCH_ARM_MACH_OMAP2_PRM33XX_H
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#include "prcm-common.h"
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#include "prm.h"
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#define AM33XX_PRM_BASE 0x44E00000
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#define AM33XX_PRM_REGADDR(inst, reg) \
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AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRM_BASE + (inst) + (reg))
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/* PRM instances */
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#define AM33XX_PRM_OCP_SOCKET_MOD 0x0B00
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#define AM33XX_PRM_PER_MOD 0x0C00
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#define AM33XX_PRM_WKUP_MOD 0x0D00
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#define AM33XX_PRM_MPU_MOD 0x0E00
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#define AM33XX_PRM_DEVICE_MOD 0x0F00
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#define AM33XX_PRM_RTC_MOD 0x1000
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#define AM33XX_PRM_GFX_MOD 0x1100
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#define AM33XX_PRM_CEFUSE_MOD 0x1200
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/* PRM.PER_PRM register offsets */
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#define AM33XX_PM_PER_PWRSTST_OFFSET 0x0008
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#define AM33XX_PM_PER_PWRSTST AM33XX_PRM_REGADDR(AM33XX_PRM_PER_MOD, 0x0008)
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#define AM33XX_PM_PER_PWRSTCTRL_OFFSET 0x000c
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#define AM33XX_PM_PER_PWRSTCTRL AM33XX_PRM_REGADDR(AM33XX_PRM_PER_MOD, 0x000c)
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/* PRM.WKUP_PRM register offsets */
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#define AM33XX_PM_WKUP_PWRSTCTRL_OFFSET 0x0004
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#define AM33XX_PM_WKUP_PWRSTCTRL AM33XX_PRM_REGADDR(AM33XX_PRM_WKUP_MOD, 0x0004)
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#define AM33XX_PM_WKUP_PWRSTST_OFFSET 0x0008
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#define AM33XX_PM_WKUP_PWRSTST AM33XX_PRM_REGADDR(AM33XX_PRM_WKUP_MOD, 0x0008)
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/* PRM.MPU_PRM register offsets */
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#define AM33XX_PM_MPU_PWRSTCTRL_OFFSET 0x0000
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#define AM33XX_PM_MPU_PWRSTCTRL AM33XX_PRM_REGADDR(AM33XX_PRM_MPU_MOD, 0x0000)
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#define AM33XX_PM_MPU_PWRSTST_OFFSET 0x0004
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#define AM33XX_PM_MPU_PWRSTST AM33XX_PRM_REGADDR(AM33XX_PRM_MPU_MOD, 0x0004)
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/* PRM.DEVICE_PRM register offsets */
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#define AM33XX_PRM_RSTCTRL_OFFSET 0x0000
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#define AM33XX_PRM_RSTCTRL AM33XX_PRM_REGADDR(AM33XX_PRM_DEVICE_MOD, 0x0000)
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/* PRM.RTC_PRM register offsets */
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#define AM33XX_PM_RTC_PWRSTCTRL_OFFSET 0x0000
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#define AM33XX_PM_RTC_PWRSTCTRL AM33XX_PRM_REGADDR(AM33XX_PRM_RTC_MOD, 0x0000)
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#define AM33XX_PM_RTC_PWRSTST_OFFSET 0x0004
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#define AM33XX_PM_RTC_PWRSTST AM33XX_PRM_REGADDR(AM33XX_PRM_RTC_MOD, 0x0004)
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/* PRM.GFX_PRM register offsets */
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#define AM33XX_PM_GFX_PWRSTCTRL_OFFSET 0x0000
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#define AM33XX_PM_GFX_PWRSTCTRL AM33XX_PRM_REGADDR(AM33XX_PRM_GFX_MOD, 0x0000)
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#define AM33XX_PM_GFX_PWRSTST_OFFSET 0x0010
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#define AM33XX_PM_GFX_PWRSTST AM33XX_PRM_REGADDR(AM33XX_PRM_GFX_MOD, 0x0010)
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/* PRM.CEFUSE_PRM register offsets */
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#define AM33XX_PM_CEFUSE_PWRSTCTRL_OFFSET 0x0000
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#define AM33XX_PM_CEFUSE_PWRSTCTRL AM33XX_PRM_REGADDR(AM33XX_PRM_CEFUSE_MOD, 0x0000)
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#define AM33XX_PM_CEFUSE_PWRSTST_OFFSET 0x0004
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#define AM33XX_PM_CEFUSE_PWRSTST AM33XX_PRM_REGADDR(AM33XX_PRM_CEFUSE_MOD, 0x0004)
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#ifndef __ASSEMBLER__
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int am33xx_prm_init(const struct omap_prcm_init_data *data);
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#endif /* ASSEMBLER */
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#endif
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