105 lines
2.6 KiB
C
105 lines
2.6 KiB
C
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* linux/arch/arm/mm/copypage-xsc3.S
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*
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* Copyright (C) 2004 Intel Corp.
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*
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* Adapted for 3rd gen XScale core, no more mini-dcache
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* Author: Matt Gilbert (matthew.m.gilbert@intel.com)
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*/
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#include <linux/init.h>
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#include <linux/highmem.h>
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/*
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* General note:
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* We don't really want write-allocate cache behaviour for these functions
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* since that will just eat through 8K of the cache.
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*/
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/*
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* XSC3 optimised copy_user_highpage
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*
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* The source page may have some clean entries in the cache already, but we
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* can safely ignore them - break_cow() will flush them out of the cache
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* if we eventually end up using our copied page.
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*
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*/
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static void xsc3_mc_copy_user_page(void *kto, const void *kfrom)
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{
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int tmp;
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asm volatile ("\
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.arch xscale \n\
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pld [%1, #0] \n\
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pld [%1, #32] \n\
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1: pld [%1, #64] \n\
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pld [%1, #96] \n\
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\n\
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2: ldrd r2, r3, [%1], #8 \n\
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ldrd r4, r5, [%1], #8 \n\
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mcr p15, 0, %0, c7, c6, 1 @ invalidate\n\
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strd r2, r3, [%0], #8 \n\
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ldrd r2, r3, [%1], #8 \n\
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strd r4, r5, [%0], #8 \n\
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ldrd r4, r5, [%1], #8 \n\
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strd r2, r3, [%0], #8 \n\
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strd r4, r5, [%0], #8 \n\
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ldrd r2, r3, [%1], #8 \n\
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ldrd r4, r5, [%1], #8 \n\
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mcr p15, 0, %0, c7, c6, 1 @ invalidate\n\
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strd r2, r3, [%0], #8 \n\
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ldrd r2, r3, [%1], #8 \n\
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subs %2, %2, #1 \n\
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strd r4, r5, [%0], #8 \n\
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ldrd r4, r5, [%1], #8 \n\
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strd r2, r3, [%0], #8 \n\
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strd r4, r5, [%0], #8 \n\
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bgt 1b \n\
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beq 2b "
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: "+&r" (kto), "+&r" (kfrom), "=&r" (tmp)
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: "2" (PAGE_SIZE / 64 - 1)
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: "r2", "r3", "r4", "r5");
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}
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void xsc3_mc_copy_user_highpage(struct page *to, struct page *from,
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unsigned long vaddr, struct vm_area_struct *vma)
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{
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void *kto, *kfrom;
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kto = kmap_atomic(to);
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kfrom = kmap_atomic(from);
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flush_cache_page(vma, vaddr, page_to_pfn(from));
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xsc3_mc_copy_user_page(kto, kfrom);
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kunmap_atomic(kfrom);
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kunmap_atomic(kto);
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}
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/*
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* XScale optimised clear_user_page
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*/
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void xsc3_mc_clear_user_highpage(struct page *page, unsigned long vaddr)
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{
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void *ptr, *kaddr = kmap_atomic(page);
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asm volatile ("\
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.arch xscale \n\
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mov r1, %2 \n\
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mov r2, #0 \n\
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mov r3, #0 \n\
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1: mcr p15, 0, %0, c7, c6, 1 @ invalidate line\n\
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strd r2, r3, [%0], #8 \n\
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strd r2, r3, [%0], #8 \n\
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strd r2, r3, [%0], #8 \n\
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strd r2, r3, [%0], #8 \n\
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subs r1, r1, #1 \n\
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bne 1b"
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: "=r" (ptr)
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: "0" (kaddr), "I" (PAGE_SIZE / 32)
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: "r1", "r2", "r3");
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kunmap_atomic(kaddr);
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}
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struct cpu_user_fns xsc3_mc_user_fns __initdata = {
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.cpu_clear_user_highpage = xsc3_mc_clear_user_highpage,
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.cpu_copy_user_highpage = xsc3_mc_copy_user_highpage,
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};
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