139 lines
3.2 KiB
Plaintext
139 lines
3.2 KiB
Plaintext
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2021 Amlogic, Inc. All rights reserved.
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*/
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/gpio/gpio.h>
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/ {
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cpus {
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#address-cells = <2>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a35";
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reg = <0x0 0x0>;
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enable-method = "psci";
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};
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cpu1: cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a35";
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reg = <0x0 0x1>;
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enable-method = "psci";
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};
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cpu2: cpu@2 {
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device_type = "cpu";
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compatible = "arm,cortex-a35";
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reg = <0x0 0x2>;
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enable-method = "psci";
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};
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cpu3: cpu@3 {
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device_type = "cpu";
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compatible = "arm,cortex-a35";
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reg = <0x0 0x3>;
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enable-method = "psci";
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};
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
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};
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psci {
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compatible = "arm,psci-1.0";
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method = "smc";
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};
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xtal: xtal-clk {
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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clock-output-names = "xtal";
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#clock-cells = <0>;
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};
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pwrc: power-controller {
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compatible = "amlogic,meson-s4-pwrc";
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#power-domain-cells = <1>;
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status = "okay";
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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gic: interrupt-controller@fff01000 {
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compatible = "arm,gic-400";
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#interrupt-cells = <3>;
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#address-cells = <0>;
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interrupt-controller;
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reg = <0x0 0xfff01000 0 0x1000>,
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<0x0 0xfff02000 0 0x2000>,
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<0x0 0xfff04000 0 0x2000>,
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<0x0 0xfff06000 0 0x2000>;
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interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
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};
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apb4: apb4@fe000000 {
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compatible = "simple-bus";
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reg = <0x0 0xfe000000 0x0 0x480000>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
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periphs_pinctrl: pinctrl@4000 {
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compatible = "amlogic,meson-s4-periphs-pinctrl";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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gpio: bank@4000 {
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reg = <0x0 0x4000 0x0 0x004c>,
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<0x0 0x40c0 0x0 0x0220>;
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reg-names = "mux", "gpio";
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&periphs_pinctrl 0 0 82>;
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};
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};
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gpio_intc: interrupt-controller@4080 {
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compatible = "amlogic,meson-s4-gpio-intc",
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"amlogic,meson-gpio-intc";
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reg = <0x0 0x4080 0x0 0x20>;
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interrupt-controller;
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#interrupt-cells = <2>;
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amlogic,channel-interrupts =
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<10 11 12 13 14 15 16 17 18 19 20 21>;
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};
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uart_B: serial@7a000 {
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compatible = "amlogic,meson-s4-uart",
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"amlogic,meson-ao-uart";
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reg = <0x0 0x7a000 0x0 0x18>;
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interrupts = <GIC_SPI 169 IRQ_TYPE_EDGE_RISING>;
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status = "disabled";
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clocks = <&xtal>, <&xtal>, <&xtal>;
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clock-names = "xtal", "pclk", "baud";
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};
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reset: reset-controller@2000 {
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compatible = "amlogic,meson-s4-reset";
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reg = <0x0 0x2000 0x0 0x98>;
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#reset-cells = <1>;
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};
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};
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};
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};
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