106 lines
3.4 KiB
Plaintext
106 lines
3.4 KiB
Plaintext
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/*
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* BSD LICENSE
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*
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* Copyright (c) 2016 Broadcom. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Broadcom Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <dt-bindings/clock/bcm-ns2.h>
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osc: oscillator {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <25000000>;
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};
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lcpll_ddr: lcpll_ddr@6501d058 {
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#clock-cells = <1>;
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compatible = "brcm,ns2-lcpll-ddr";
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reg = <0x6501d058 0x20>,
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<0x6501c020 0x4>,
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<0x6501d04c 0x4>;
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clocks = <&osc>;
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clock-output-names = "lcpll_ddr", "pcie_sata_usb",
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"ddr", "ddr_ch2_unused",
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"ddr_ch3_unused", "ddr_ch4_unused",
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"ddr_ch5_unused";
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};
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lcpll_ports: lcpll_ports@6501d078 {
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#clock-cells = <1>;
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compatible = "brcm,ns2-lcpll-ports";
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reg = <0x6501d078 0x20>,
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<0x6501c020 0x4>,
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<0x6501d054 0x4>;
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clocks = <&osc>;
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clock-output-names = "lcpll_ports", "wan", "rgmii",
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"ports_ch2_unused",
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"ports_ch3_unused",
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"ports_ch4_unused",
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"ports_ch5_unused";
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};
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genpll_scr: genpll_scr@6501d098 {
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#clock-cells = <1>;
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compatible = "brcm,ns2-genpll-scr";
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reg = <0x6501d098 0x32>,
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<0x6501c020 0x4>,
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<0x6501d044 0x4>;
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clocks = <&osc>;
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clock-output-names = "genpll_scr", "scr", "fs",
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"audio_ref", "scr_ch3_unused",
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"scr_ch4_unused", "scr_ch5_unused";
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};
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iprocmed: iprocmed {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&genpll_scr BCM_NS2_GENPLL_SCR_SCR_CLK>;
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clock-div = <2>;
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clock-mult = <1>;
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};
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iprocslow: iprocslow {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&genpll_scr BCM_NS2_GENPLL_SCR_SCR_CLK>;
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clock-div = <4>;
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clock-mult = <1>;
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};
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genpll_sw: genpll_sw@6501d0c4 {
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#clock-cells = <1>;
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compatible = "brcm,ns2-genpll-sw";
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reg = <0x6501d0c4 0x32>,
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<0x6501c020 0x4>,
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<0x6501d044 0x4>;
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clocks = <&osc>;
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clock-output-names = "genpll_sw", "rpe", "250", "nic",
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"chimp", "port", "sdio";
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};
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