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linux-zen-server/arch/arm64/boot/dts/exynos/exynosautov9.dtsi

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Initial commit
2023-08-30 17:53:23 +02:00
// SPDX-License-Identifier: GPL-2.0
/*
* Samsung's ExynosAuto v9 SoC device tree source
*
* Copyright (c) 2021 Samsung Electronics Co., Ltd.
*
*/
#include <dt-bindings/clock/samsung,exynosautov9.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/soc/samsung,boot-mode.h>
#include <dt-bindings/soc/samsung,exynos-usi.h>
/ {
compatible = "samsung,exynosautov9";
#address-cells = <2>;
#size-cells = <1>;
interrupt-parent = <&gic>;
aliases {
pinctrl0 = &pinctrl_alive;
pinctrl1 = &pinctrl_aud;
pinctrl2 = &pinctrl_fsys0;
pinctrl3 = &pinctrl_fsys1;
pinctrl4 = &pinctrl_fsys2;
pinctrl5 = &pinctrl_peric0;
pinctrl6 = &pinctrl_peric1;
};
arm-pmu {
compatible = "arm,cortex-a76-pmu";
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>,
<&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu-map {
cluster0 {
core0 {
cpu = <&cpu0>;
};
core1 {
cpu = <&cpu1>;
};
core2 {
cpu = <&cpu2>;
};
core3 {
cpu = <&cpu3>;
};
};
cluster1 {
core0 {
cpu = <&cpu4>;
};
core1 {
cpu = <&cpu5>;
};
core2 {
cpu = <&cpu6>;
};
core3 {
cpu = <&cpu7>;
};
};
};
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a76";
reg = <0x0>;
enable-method = "psci";
};
cpu1: cpu@100 {
device_type = "cpu";
compatible = "arm,cortex-a76";
reg = <0x100>;
enable-method = "psci";
};
cpu2: cpu@200 {
device_type = "cpu";
compatible = "arm,cortex-a76";
reg = <0x200>;
enable-method = "psci";
};
cpu3: cpu@300 {
device_type = "cpu";
compatible = "arm,cortex-a76";
reg = <0x300>;
enable-method = "psci";
};
cpu4: cpu@10000 {
device_type = "cpu";
compatible = "arm,cortex-a76";
reg = <0x10000>;
enable-method = "psci";
};
cpu5: cpu@10100 {
device_type = "cpu";
compatible = "arm,cortex-a76";
reg = <0x10100>;
enable-method = "psci";
};
cpu6: cpu@10200 {
device_type = "cpu";
compatible = "arm,cortex-a76";
reg = <0x10200>;
enable-method = "psci";
};
cpu7: cpu@10300 {
device_type = "cpu";
compatible = "arm,cortex-a76";
reg = <0x10300>;
enable-method = "psci";
};
};
psci {
compatible = "arm,psci-1.0";
method = "smc";
cpu_suspend = <0xc4000001>;
cpu_off = <0x84000002>;
cpu_on = <0xc4000003>;
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
};
fixed-rate-clocks {
xtcxo: clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-output-names = "oscclk";
};
};
soc: soc@0 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0x0 0x20000000>;
chipid@10000000 {
compatible = "samsung,exynos850-chipid";
reg = <0x10000000 0x24>;
};
cmu_peris: clock-controller@10020000 {
compatible = "samsung,exynosautov9-cmu-peris";
reg = <0x10020000 0x8000>;
#clock-cells = <1>;
clocks = <&xtcxo>,
<&cmu_top DOUT_CLKCMU_PERIS_BUS>;
clock-names = "oscclk",
"dout_clkcmu_peris_bus";
};
cmu_peric0: clock-controller@10200000 {
compatible = "samsung,exynosautov9-cmu-peric0";
reg = <0x10200000 0x8000>;
#clock-cells = <1>;
clocks = <&xtcxo>,
<&cmu_top DOUT_CLKCMU_PERIC0_BUS>,
<&cmu_top DOUT_CLKCMU_PERIC0_IP>;
clock-names = "oscclk",
"dout_clkcmu_peric0_bus",
"dout_clkcmu_peric0_ip";
};
cmu_peric1: clock-controller@10800000 {
compatible = "samsung,exynosautov9-cmu-peric1";
reg = <0x10800000 0x8000>;
#clock-cells = <1>;
clocks = <&xtcxo>,
<&cmu_top DOUT_CLKCMU_PERIC1_BUS>,
<&cmu_top DOUT_CLKCMU_PERIC1_IP>;
clock-names = "oscclk",
"dout_clkcmu_peric1_bus",
"dout_clkcmu_peric1_ip";
};
cmu_fsys1: clock-controller@17040000 {
compatible = "samsung,exynosautov9-cmu-fsys1";
reg = <0x17040000 0x8000>;
#clock-cells = <1>;
clocks = <&xtcxo>,
<&cmu_top DOUT_CLKCMU_FSYS1_BUS>,
<&cmu_top GOUT_CLKCMU_FSYS1_MMC_CARD>,
<&cmu_top DOUT_CLKCMU_FSYS1_USBDRD>;
clock-names = "oscclk",
"dout_clkcmu_fsys1_bus",
"gout_clkcmu_fsys1_mmc_card",
"dout_clkcmu_fsys1_usbdrd";
};
cmu_fsys0: clock-controller@17700000 {
compatible = "samsung,exynosautov9-cmu-fsys0";
reg = <0x17700000 0x8000>;
#clock-cells = <1>;
clocks = <&xtcxo>,
<&cmu_top DOUT_CLKCMU_FSYS0_BUS>,
<&cmu_top DOUT_CLKCMU_FSYS0_PCIE>;
clock-names = "oscclk",
"dout_clkcmu_fsys0_bus",
"dout_clkcmu_fsys0_pcie";
};
cmu_fsys2: clock-controller@17c00000 {
compatible = "samsung,exynosautov9-cmu-fsys2";
reg = <0x17c00000 0x8000>;
#clock-cells = <1>;
clocks = <&xtcxo>,
<&cmu_top DOUT_CLKCMU_FSYS2_BUS>,
<&cmu_top DOUT_CLKCMU_FSYS2_UFS_EMBD>,
<&cmu_top DOUT_CLKCMU_FSYS2_ETHERNET>;
clock-names = "oscclk",
"dout_clkcmu_fsys2_bus",
"dout_fsys2_clkcmu_ufs_embd",
"dout_fsys2_clkcmu_ethernet";
};
cmu_core: clock-controller@1b030000 {
compatible = "samsung,exynosautov9-cmu-core";
reg = <0x1b030000 0x8000>;
#clock-cells = <1>;
clocks = <&xtcxo>,
<&cmu_top DOUT_CLKCMU_CORE_BUS>;
clock-names = "oscclk",
"dout_clkcmu_core_bus";
};
cmu_busmc: clock-controller@1b200000 {
compatible = "samsung,exynosautov9-cmu-busmc";
reg = <0x1b200000 0x8000>;
#clock-cells = <1>;
clocks = <&xtcxo>,
<&cmu_top DOUT_CLKCMU_BUSMC_BUS>;
clock-names = "oscclk",
"dout_clkcmu_busmc_bus";
};
cmu_top: clock-controller@1b240000 {
compatible = "samsung,exynosautov9-cmu-top";
reg = <0x1b240000 0x8000>;
#clock-cells = <1>;
clocks = <&xtcxo>;
clock-names = "oscclk";
};
gic: interrupt-controller@10101000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
reg = <0x10101000 0x1000>,
<0x10102000 0x2000>,
<0x10104000 0x2000>,
<0x10106000 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) |
IRQ_TYPE_LEVEL_HIGH)>;
};
pdma0: dma-controller@1b2e0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x1b2e0000 0x1000>;
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu_busmc CLK_GOUT_BUSMC_PDMA0_PCLK>;
clock-names = "apb_pclk";
arm,pl330-broken-no-flushp;
#dma-cells = <1>;
};
pinctrl_alive: pinctrl@10450000 {
compatible = "samsung,exynosautov9-pinctrl";
reg = <0x10450000 0x1000>;
wakeup-interrupt-controller {
compatible = "samsung,exynosautov9-wakeup-eint";
};
};
pinctrl_aud: pinctrl@19c60000{
compatible = "samsung,exynosautov9-pinctrl";
reg = <0x19c60000 0x1000>;
};
pinctrl_fsys0: pinctrl@17740000 {
compatible = "samsung,exynosautov9-pinctrl";
reg = <0x17740000 0x1000>;
interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
};
pinctrl_fsys1: pinctrl@17060000 {
compatible = "samsung,exynosautov9-pinctrl";
reg = <0x17060000 0x1000>;
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
};
pinctrl_fsys2: pinctrl@17c30000 {
compatible = "samsung,exynosautov9-pinctrl";
reg = <0x17c30000 0x1000>;
interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
};
pinctrl_peric0: pinctrl@10230000 {
compatible = "samsung,exynosautov9-pinctrl";
reg = <0x10230000 0x1000>;
interrupts = <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>;
};
pinctrl_peric1: pinctrl@10830000 {
compatible = "samsung,exynosautov9-pinctrl";
reg = <0x10830000 0x1000>;
interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
};
pmu_system_controller: system-controller@10460000 {
compatible = "samsung,exynos7-pmu", "syscon";
reg = <0x10460000 0x10000>;
reboot: syscon-reboot {
compatible = "syscon-reboot";
regmap = <&pmu_system_controller>;
offset = <0x3a00>; /* SYSTEM_CONFIGURATION */
value = <0x2>;
mask = <0x2>;
};
reboot-mode {
compatible = "syscon-reboot-mode";
offset = <0x810>; /* SYSIP_DAT0 */
mode-bootloader = <EXYNOSAUTOV9_BOOT_BOOTLOADER>;
mode-fastboot = <EXYNOSAUTOV9_BOOT_FASTBOOT>;
mode-recovery = <EXYNOSAUTOV9_BOOT_RECOVERY>;
};
};
syscon_fsys2: syscon@17c20000 {
compatible = "samsung,exynosautov9-fsys2-sysreg",
"samsung,exynosautov9-sysreg", "syscon";
reg = <0x17c20000 0x1000>;
};
syscon_peric0: syscon@10220000 {
compatible = "samsung,exynosautov9-peric0-sysreg",
"samsung,exynosautov9-sysreg", "syscon";
reg = <0x10220000 0x2000>;
};
syscon_peric1: syscon@10820000 {
compatible = "samsung,exynosautov9-peric1-sysreg",
"samsung,exynosautov9-sysreg", "syscon";
reg = <0x10820000 0x2000>;
};
usi_0: usi@103000c0 {
compatible = "samsung,exynosautov9-usi",
"samsung,exynos850-usi";
reg = <0x103000c0 0x20>;
samsung,sysreg = <&syscon_peric0 0x1000>;
samsung,mode = <USI_V2_UART>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>,
<&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>;
clock-names = "pclk", "ipclk";
status = "disabled";
serial_0: serial@10300000 {
compatible = "samsung,exynosautov9-uart",
"samsung,exynos850-uart";
reg = <0x10300000 0xc0>;
interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&uart0_bus>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>,
<&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>;
clock-names = "uart", "clk_uart_baud0";
samsung,uart-fifosize = <256>;
status = "disabled";
};
spi_0: spi@10300000 {
compatible = "samsung,exynosautov9-spi";
reg = <0x10300000 0x30>;
interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&spi0_bus &spi0_cs_func>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>,
<&cmu_peric0 CLK_DOUT_PERIC0_USI00_USI>,
<&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>;
clock-names = "spi", "spi_busclk0", "spi_ioclk";
samsung,spi-src-clk = <0>;
dmas = <&pdma0 1>, <&pdma0 0>;
dma-names = "tx", "rx";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
hsi2c_0: i2c@10300000 {
compatible = "samsung,exynosautov9-hsi2c";
reg = <0x10300000 0xc0>;
interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&hsi2c0_bus>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>,
<&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>;
clock-names = "hsi2c", "hsi2c_pclk";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
usi_i2c_0: usi@103100c0 {
compatible = "samsung,exynosautov9-usi",
"samsung,exynos850-usi";
reg = <0x103100c0 0x20>;
samsung,sysreg = <&syscon_peric0 0x1004>;
samsung,mode = <USI_V2_I2C>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_1>,
<&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_1>;
clock-names = "pclk", "ipclk";
status = "disabled";
hsi2c_1: i2c@10310000 {
compatible = "samsung,exynosautov9-hsi2c";
reg = <0x10310000 0xc0>;
interrupts = <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&hsi2c1_bus>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_1>,
<&cmu_peric0 CLK_GOUT_PERIC0_PCLK_1>;
clock-names = "hsi2c", "hsi2c_pclk";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
usi_1: usi@103200c0 {
compatible = "samsung,exynosautov9-usi",
"samsung,exynos850-usi";
reg = <0x103200c0 0x20>;
samsung,sysreg = <&syscon_peric0 0x1008>;
samsung,mode = <USI_V2_UART>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_2>,
<&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_2>;
clock-names = "pclk", "ipclk";
status = "disabled";
serial_1: serial@10320000 {
compatible = "samsung,exynosautov9-uart",
"samsung,exynos850-uart";
reg = <0x10320000 0xc0>;
interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&uart1_bus>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_2>,
<&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_2>;
clock-names = "uart", "clk_uart_baud0";
samsung,uart-fifosize = <256>;
status = "disabled";
};
spi_1: spi@10320000 {
compatible = "samsung,exynosautov9-spi";
reg = <0x10320000 0x30>;
interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&spi1_bus &spi1_cs_func>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_2>,
<&cmu_peric0 CLK_DOUT_PERIC0_USI01_USI>,
<&cmu_peric0 CLK_GOUT_PERIC0_PCLK_2>;
clock-names = "spi", "spi_busclk0", "spi_ioclk";
samsung,spi-src-clk = <0>;
dmas = <&pdma0 3>, <&pdma0 2>;
dma-names = "tx", "rx";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
hsi2c_2: i2c@10320000 {
compatible = "samsung,exynosautov9-hsi2c";
reg = <0x10320000 0xc0>;
interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&hsi2c2_bus>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_2>,
<&cmu_peric0 CLK_GOUT_PERIC0_PCLK_2>;
clock-names = "hsi2c", "hsi2c_pclk";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
usi_i2c_1: usi@103300c0 {
compatible = "samsung,exynosautov9-usi",
"samsung,exynos850-usi";
reg = <0x103300c0 0x20>;
samsung,sysreg = <&syscon_peric0 0x100c>;
samsung,mode = <USI_V2_I2C>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_3>,
<&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_3>;
clock-names = "pclk", "ipclk";
status = "disabled";
hsi2c_3: i2c@10330000 {
compatible = "samsung,exynosautov9-hsi2c";
reg = <0x10330000 0xc0>;
interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&hsi2c3_bus>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_3>,
<&cmu_peric0 CLK_GOUT_PERIC0_PCLK_3>;
clock-names = "hsi2c", "hsi2c_pclk";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
usi_2: usi@103400c0 {
compatible = "samsung,exynosautov9-usi",
"samsung,exynos850-usi";
reg = <0x103400c0 0x20>;
samsung,sysreg = <&syscon_peric0 0x1010>;
samsung,mode = <USI_V2_UART>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_4>,
<&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_4>;
clock-names = "pclk", "ipclk";
status = "disabled";
serial_2: serial@10340000 {
compatible = "samsung,exynosautov9-uart",
"samsung,exynos850-uart";
reg = <0x10340000 0xc0>;
interrupts = <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&uart2_bus>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_4>,
<&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_4>;
clock-names = "uart", "clk_uart_baud0";
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_2: spi@10340000 {
compatible = "samsung,exynosautov9-spi";
reg = <0x10340000 0x30>;
interrupts = <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&spi2_bus &spi2_cs_func>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_4>,
<&cmu_peric0 CLK_DOUT_PERIC0_USI02_USI>,
<&cmu_peric0 CLK_GOUT_PERIC0_PCLK_4>;
clock-names = "spi", "spi_busclk0", "spi_ioclk";
samsung,spi-src-clk = <0>;
dmas = <&pdma0 5>, <&pdma0 4>;
dma-names = "tx", "rx";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
hsi2c_4: i2c@10340000 {
compatible = "samsung,exynosautov9-hsi2c";
reg = <0x10340000 0xc0>;
interrupts = <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&hsi2c4_bus>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_4>,
<&cmu_peric0 CLK_GOUT_PERIC0_PCLK_4>;
clock-names = "hsi2c", "hsi2c_pclk";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
usi_i2c_2: usi@103500c0 {
compatible = "samsung,exynosautov9-usi",
"samsung,exynos850-usi";
reg = <0x103500c0 0x20>;
samsung,sysreg = <&syscon_peric0 0x1014>;
samsung,mode = <USI_V2_I2C>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_5>,
<&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_5>;
clock-names = "pclk", "ipclk";
status = "disabled";
hsi2c_5: i2c@10350000 {
compatible = "samsung,exynosautov9-hsi2c";
reg = <0x10350000 0xc0>;
interrupts = <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&hsi2c5_bus>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_5>,
<&cmu_peric0 CLK_GOUT_PERIC0_PCLK_5>;
clock-names = "hsi2c", "hsi2c_pclk";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
usi_3: usi@103600c0 {
compatible = "samsung,exynosautov9-usi",
"samsung,exynos850-usi";
reg = <0x103600c0 0x20>;
samsung,sysreg = <&syscon_peric0 0x1018>;
samsung,mode = <USI_V2_UART>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_6>,
<&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_6>;
clock-names = "pclk", "ipclk";
status = "disabled";
serial_3: serial@10360000 {
compatible = "samsung,exynosautov9-uart",
"samsung,exynos850-uart";
reg = <0x10360000 0xc0>;
interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&uart3_bus>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_6>,
<&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_6>;
clock-names = "uart", "clk_uart_baud0";
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_3: spi@10360000 {
compatible = "samsung,exynosautov9-spi";
reg = <0x10360000 0x30>;
interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&spi3_bus &spi3_cs_func>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_6>,
<&cmu_peric0 CLK_DOUT_PERIC0_USI03_USI>,
<&cmu_peric0 CLK_GOUT_PERIC0_PCLK_6>;
clock-names = "spi", "spi_busclk0", "spi_ioclk";
samsung,spi-src-clk = <0>;
dmas = <&pdma0 7>, <&pdma0 6>;
dma-names = "tx", "rx";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
hsi2c_6: i2c@10360000 {
compatible = "samsung,exynosautov9-hsi2c";
reg = <0x10360000 0xc0>;
interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&hsi2c6_bus>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_6>,
<&cmu_peric0 CLK_GOUT_PERIC0_PCLK_6>;
clock-names = "hsi2c", "hsi2c_pclk";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
usi_i2c_3: usi@103700c0 {
compatible = "samsung,exynosautov9-usi",
"samsung,exynos850-usi";
reg = <0x103700c0 0x20>;
samsung,sysreg = <&syscon_peric0 0x101c>;
samsung,mode = <USI_V2_I2C>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_7>,
<&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_7>;
clock-names = "pclk", "ipclk";
status = "disabled";
hsi2c_7: i2c@10370000 {
compatible = "samsung,exynosautov9-hsi2c";
reg = <0x10370000 0xc0>;
interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&hsi2c7_bus>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_7>,
<&cmu_peric0 CLK_GOUT_PERIC0_PCLK_7>;
clock-names = "hsi2c", "hsi2c_pclk";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
usi_4: usi@103800c0 {
compatible = "samsung,exynosautov9-usi",
"samsung,exynos850-usi";
reg = <0x103800c0 0x20>;
samsung,sysreg = <&syscon_peric0 0x1020>;
samsung,mode = <USI_V2_UART>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_8>,
<&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_8>;
clock-names = "pclk", "ipclk";
status = "disabled";
serial_4: serial@10380000 {
compatible = "samsung,exynosautov9-uart",
"samsung,exynos850-uart";
reg = <0x10380000 0xc0>;
interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&uart4_bus>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_8>,
<&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_8>;
clock-names = "uart", "clk_uart_baud0";
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_4: spi@10380000 {
compatible = "samsung,exynosautov9-spi";
reg = <0x10380000 0x30>;
interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&spi4_bus &spi4_cs_func>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_8>,
<&cmu_peric0 CLK_DOUT_PERIC0_USI04_USI>,
<&cmu_peric0 CLK_GOUT_PERIC0_PCLK_8>;
clock-names = "spi", "spi_busclk0", "spi_ioclk";
samsung,spi-src-clk = <0>;
dmas = <&pdma0 9>, <&pdma0 8>;
dma-names = "tx", "rx";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
hsi2c_8: i2c@10380000 {
compatible = "samsung,exynosautov9-hsi2c";
reg = <0x10380000 0xc0>;
interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&hsi2c8_bus>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_8>,
<&cmu_peric0 CLK_GOUT_PERIC0_PCLK_8>;
clock-names = "hsi2c", "hsi2c_pclk";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
usi_i2c_4: usi@103900c0 {
compatible = "samsung,exynosautov9-usi",
"samsung,exynos850-usi";
reg = <0x103900c0 0x20>;
samsung,sysreg = <&syscon_peric0 0x1024>;
samsung,mode = <USI_V2_I2C>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_9>,
<&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_9>;
clock-names = "pclk", "ipclk";
status = "disabled";
hsi2c_9: i2c@10390000 {
compatible = "samsung,exynosautov9-hsi2c";
reg = <0x10390000 0xc0>;
interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&hsi2c9_bus>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_9>,
<&cmu_peric0 CLK_GOUT_PERIC0_PCLK_9>;
clock-names = "hsi2c", "hsi2c_pclk";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
usi_5: usi@103a00c0 {
compatible = "samsung,exynosautov9-usi",
"samsung,exynos850-usi";
reg = <0x103a00c0 0x20>;
samsung,sysreg = <&syscon_peric0 0x1028>;
samsung,mode = <USI_V2_UART>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_10>,
<&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_10>;
clock-names = "pclk", "ipclk";
status = "disabled";
serial_5: serial@103a0000 {
compatible = "samsung,exynosautov9-uart",
"samsung,exynos850-uart";
reg = <0x103a0000 0xc0>;
interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&uart5_bus>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_10>,
<&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_10>;
clock-names = "uart", "clk_uart_baud0";
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_5: spi@103a0000 {
compatible = "samsung,exynosautov9-spi";
reg = <0x103a0000 0x30>;
interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&spi5_bus &spi5_cs_func>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_10>,
<&cmu_peric0 CLK_DOUT_PERIC0_USI05_USI>,
<&cmu_peric0 CLK_GOUT_PERIC0_PCLK_10>;
clock-names = "spi", "spi_busclk0", "spi_ioclk";
samsung,spi-src-clk = <0>;
dmas = <&pdma0 11>, <&pdma0 10>;
dma-names = "tx", "rx";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
hsi2c_10: i2c@103a0000 {
compatible = "samsung,exynosautov9-hsi2c";
reg = <0x103a0000 0xc0>;
interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&hsi2c10_bus>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_10>,
<&cmu_peric0 CLK_GOUT_PERIC0_PCLK_10>;
clock-names = "hsi2c", "hsi2c_pclk";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
usi_i2c_5: usi@103b00c0 {
compatible = "samsung,exynosautov9-usi",
"samsung,exynos850-usi";
reg = <0x103b00c0 0x20>;
samsung,sysreg = <&syscon_peric0 0x102c>;
samsung,mode = <USI_V2_I2C>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_11>,
<&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_11>;
clock-names = "pclk", "ipclk";
status = "disabled";
hsi2c_11: i2c@103b0000 {
compatible = "samsung,exynosautov9-hsi2c";
reg = <0x103b0000 0xc0>;
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&hsi2c11_bus>;
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_11>,
<&cmu_peric0 CLK_GOUT_PERIC0_PCLK_11>;
clock-names = "hsi2c", "hsi2c_pclk";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
usi_6: usi@109000c0 {
compatible = "samsung,exynosautov9-usi",
"samsung,exynos850-usi";
reg = <0x109000c0 0x20>;
samsung,sysreg = <&syscon_peric1 0x1000>;
samsung,mode = <USI_V2_UART>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_0>,
<&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_0>;
clock-names = "pclk", "ipclk";
status = "disabled";
serial_6: serial@10900000 {
compatible = "samsung,exynosautov9-uart",
"samsung,exynos850-uart";
reg = <0x10900000 0xc0>;
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&uart6_bus>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_0>,
<&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_0>;
clock-names = "uart", "clk_uart_baud0";
samsung,uart-fifosize = <256>;
status = "disabled";
};
spi_6: spi@10900000 {
compatible = "samsung,exynosautov9-spi";
reg = <0x10900000 0x30>;
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&spi6_bus &spi6_cs_func>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_0>,
<&cmu_peric1 CLK_DOUT_PERIC1_USI06_USI>,
<&cmu_peric1 CLK_GOUT_PERIC1_PCLK_0>;
clock-names = "spi", "spi_busclk0", "spi_ioclk";
samsung,spi-src-clk = <0>;
dmas = <&pdma0 13>, <&pdma0 12>;
dma-names = "tx", "rx";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
hsi2c_12: i2c@10900000 {
compatible = "samsung,exynosautov9-hsi2c";
reg = <0x10900000 0xc0>;
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&hsi2c12_bus>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_0>,
<&cmu_peric1 CLK_GOUT_PERIC1_PCLK_0>;
clock-names = "hsi2c", "hsi2c_pclk";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
usi_i2c_6: usi@109100c0 {
compatible = "samsung,exynosautov9-usi",
"samsung,exynos850-usi";
reg = <0x109100c0 0x20>;
samsung,sysreg = <&syscon_peric1 0x1004>;
samsung,mode = <USI_V2_I2C>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_1>,
<&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_1>;
clock-names = "pclk", "ipclk";
status = "disabled";
hsi2c_13: i2c@10910000 {
compatible = "samsung,exynosautov9-hsi2c";
reg = <0x10910000 0xc0>;
interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&hsi2c13_bus>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_1>,
<&cmu_peric1 CLK_GOUT_PERIC1_PCLK_1>;
clock-names = "hsi2c", "hsi2c_pclk";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
usi_7: usi@109200c0 {
compatible = "samsung,exynosautov9-usi",
"samsung,exynos850-usi";
reg = <0x109200c0 0x20>;
samsung,sysreg = <&syscon_peric1 0x1008>;
samsung,mode = <USI_V2_UART>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_2>,
<&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_2>;
clock-names = "pclk", "ipclk";
status = "disabled";
serial_7: serial@10920000 {
compatible = "samsung,exynosautov9-uart",
"samsung,exynos850-uart";
reg = <0x10920000 0xc0>;
interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&uart7_bus>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_2>,
<&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_2>;
clock-names = "uart", "clk_uart_baud0";
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_7: spi@10920000 {
compatible = "samsung,exynosautov9-spi";
reg = <0x10920000 0x30>;
interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&spi7_bus &spi7_cs_func>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_2>,
<&cmu_peric1 CLK_DOUT_PERIC1_USI07_USI>,
<&cmu_peric1 CLK_GOUT_PERIC1_PCLK_2>;
clock-names = "spi", "spi_busclk0", "spi_ioclk";
samsung,spi-src-clk = <0>;
dmas = <&pdma0 15>, <&pdma0 14>;
dma-names = "tx", "rx";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
hsi2c_14: i2c@10920000 {
compatible = "samsung,exynosautov9-hsi2c";
reg = <0x10920000 0xc0>;
interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&hsi2c14_bus>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_2>,
<&cmu_peric1 CLK_GOUT_PERIC1_PCLK_2>;
clock-names = "hsi2c", "hsi2c_pclk";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
usi_i2c_7: usi@109300c0 {
compatible = "samsung,exynosautov9-usi",
"samsung,exynos850-usi";
reg = <0x109300c0 0x20>;
samsung,sysreg = <&syscon_peric1 0x100c>;
samsung,mode = <USI_V2_I2C>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_3>,
<&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_3>;
clock-names = "pclk", "ipclk";
status = "disabled";
hsi2c_15: i2c@10930000 {
compatible = "samsung,exynosautov9-hsi2c";
reg = <0x10930000 0xc0>;
interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&hsi2c15_bus>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_3>,
<&cmu_peric1 CLK_GOUT_PERIC1_PCLK_3>;
clock-names = "hsi2c", "hsi2c_pclk";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
usi_8: usi@109400c0 {
compatible = "samsung,exynosautov9-usi",
"samsung,exynos850-usi";
reg = <0x109400c0 0x20>;
samsung,sysreg = <&syscon_peric1 0x1010>;
samsung,mode = <USI_V2_UART>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_4>,
<&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_4>;
clock-names = "pclk", "ipclk";
status = "disabled";
serial_8: serial@10940000 {
compatible = "samsung,exynosautov9-uart",
"samsung,exynos850-uart";
reg = <0x10940000 0xc0>;
interrupts = <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&uart8_bus>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_4>,
<&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_4>;
clock-names = "uart", "clk_uart_baud0";
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_8: spi@10940000 {
compatible = "samsung,exynosautov9-spi";
reg = <0x10940000 0x30>;
interrupts = <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&spi8_bus &spi8_cs_func>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_4>,
<&cmu_peric1 CLK_DOUT_PERIC1_USI08_USI>,
<&cmu_peric1 CLK_GOUT_PERIC1_PCLK_4>;
clock-names = "spi", "spi_busclk0", "spi_ioclk";
samsung,spi-src-clk = <0>;
dmas = <&pdma0 17>, <&pdma0 16>;
dma-names = "tx", "rx";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
hsi2c_16: i2c@10940000 {
compatible = "samsung,exynosautov9-hsi2c";
reg = <0x10940000 0xc0>;
interrupts = <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&hsi2c16_bus>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_4>,
<&cmu_peric1 CLK_GOUT_PERIC1_PCLK_4>;
clock-names = "hsi2c", "hsi2c_pclk";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
usi_i2c_8: usi@109500c0 {
compatible = "samsung,exynosautov9-usi",
"samsung,exynos850-usi";
reg = <0x109500c0 0x20>;
samsung,sysreg = <&syscon_peric1 0x1014>;
samsung,mode = <USI_V2_I2C>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_5>,
<&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_5>;
clock-names = "pclk", "ipclk";
status = "disabled";
hsi2c_17: i2c@10950000 {
compatible = "samsung,exynosautov9-hsi2c";
reg = <0x10950000 0xc0>;
interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&hsi2c17_bus>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_5>,
<&cmu_peric1 CLK_GOUT_PERIC1_PCLK_5>;
clock-names = "hsi2c", "hsi2c_pclk";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
usi_9: usi@109600c0 {
compatible = "samsung,exynosautov9-usi",
"samsung,exynos850-usi";
reg = <0x109600c0 0x20>;
samsung,sysreg = <&syscon_peric1 0x1018>;
samsung,mode = <USI_V2_UART>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_6>,
<&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_6>;
clock-names = "pclk", "ipclk";
status = "disabled";
serial_9: serial@10960000 {
compatible = "samsung,exynosautov9-uart",
"samsung,exynos850-uart";
reg = <0x10960000 0xc0>;
interrupts = <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&uart9_bus>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_6>,
<&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_6>;
clock-names = "uart", "clk_uart_baud0";
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_9: spi@10960000 {
compatible = "samsung,exynosautov9-spi";
reg = <0x10960000 0x30>;
interrupts = <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&spi9_bus &spi9_cs_func>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_6>,
<&cmu_peric1 CLK_DOUT_PERIC1_USI09_USI>,
<&cmu_peric1 CLK_GOUT_PERIC1_PCLK_6>;
clock-names = "spi", "spi_busclk0", "spi_ioclk";
samsung,spi-src-clk = <0>;
dmas = <&pdma0 19>, <&pdma0 18>;
dma-names = "tx", "rx";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
hsi2c_18: i2c@10960000 {
compatible = "samsung,exynosautov9-hsi2c";
reg = <0x10960000 0xc0>;
interrupts = <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&hsi2c18_bus>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_6>,
<&cmu_peric1 CLK_GOUT_PERIC1_PCLK_6>;
clock-names = "hsi2c", "hsi2c_pclk";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
usi_i2c_9: usi@109700c0 {
compatible = "samsung,exynosautov9-usi",
"samsung,exynos850-usi";
reg = <0x109700c0 0x20>;
samsung,sysreg = <&syscon_peric1 0x101c>;
samsung,mode = <USI_V2_I2C>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_7>,
<&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_7>;
clock-names = "pclk", "ipclk";
status = "disabled";
hsi2c_19: i2c@10970000 {
compatible = "samsung,exynosautov9-hsi2c";
reg = <0x10970000 0xc0>;
interrupts = <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&hsi2c19_bus>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_7>,
<&cmu_peric1 CLK_GOUT_PERIC1_PCLK_7>;
clock-names = "hsi2c", "hsi2c_pclk";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
usi_10: usi@109800c0 {
compatible = "samsung,exynosautov9-usi",
"samsung,exynos850-usi";
reg = <0x109800c0 0x20>;
samsung,sysreg = <&syscon_peric1 0x1020>;
samsung,mode = <USI_V2_UART>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_8>,
<&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_8>;
clock-names = "pclk", "ipclk";
status = "disabled";
serial_10: serial@10980000 {
compatible = "samsung,exynosautov9-uart",
"samsung,exynos850-uart";
reg = <0x10980000 0xc0>;
interrupts = <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&uart10_bus>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_8>,
<&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_8>;
clock-names = "uart", "clk_uart_baud0";
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_10: spi@10980000 {
compatible = "samsung,exynosautov9-spi";
reg = <0x10980000 0x30>;
interrupts = <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&spi10_bus &spi10_cs_func>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_8>,
<&cmu_peric1 CLK_DOUT_PERIC1_USI10_USI>,
<&cmu_peric1 CLK_GOUT_PERIC1_PCLK_8>;
clock-names = "spi", "spi_busclk0", "spi_ioclk";
samsung,spi-src-clk = <0>;
dmas = <&pdma0 21>, <&pdma0 20>;
dma-names = "tx", "rx";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
hsi2c_20: i2c@10980000 {
compatible = "samsung,exynosautov9-hsi2c";
reg = <0x10980000 0xc0>;
interrupts = <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&hsi2c20_bus>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_8>,
<&cmu_peric1 CLK_GOUT_PERIC1_PCLK_8>;
clock-names = "hsi2c", "hsi2c_pclk";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
usi_i2c_10: usi@109900c0 {
compatible = "samsung,exynosautov9-usi",
"samsung,exynos850-usi";
reg = <0x109900c0 0x20>;
samsung,sysreg = <&syscon_peric1 0x1024>;
samsung,mode = <USI_V2_I2C>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_9>,
<&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_9>;
clock-names = "pclk", "ipclk";
status = "disabled";
hsi2c_21: i2c@10990000 {
compatible = "samsung,exynosautov9-hsi2c";
reg = <0x10990000 0xc0>;
interrupts = <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&hsi2c21_bus>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_9>,
<&cmu_peric1 CLK_GOUT_PERIC1_PCLK_9>;
clock-names = "hsi2c", "hsi2c_pclk";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
usi_11: usi@109a00c0 {
compatible = "samsung,exynosautov9-usi",
"samsung,exynos850-usi";
reg = <0x109a00c0 0x20>;
samsung,sysreg = <&syscon_peric1 0x1028>;
samsung,mode = <USI_V2_UART>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_10>,
<&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_10>;
clock-names = "pclk", "ipclk";
status = "disabled";
serial_11: serial@109a0000 {
compatible = "samsung,exynosautov9-uart",
"samsung,exynos850-uart";
reg = <0x109a0000 0xc0>;
interrupts = <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&uart11_bus>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_10>,
<&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_10>;
clock-names = "uart", "clk_uart_baud0";
samsung,uart-fifosize = <64>;
status = "disabled";
};
spi_11: spi@109a0000 {
compatible = "samsung,exynosautov9-spi";
reg = <0x109a0000 0x30>;
interrupts = <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&spi11_bus &spi11_cs_func>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_10>,
<&cmu_peric1 CLK_DOUT_PERIC1_USI11_USI>,
<&cmu_peric1 CLK_GOUT_PERIC1_PCLK_10>;
clock-names = "spi", "spi_busclk0", "spi_ioclk";
samsung,spi-src-clk = <0>;
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
hsi2c_22: i2c@109a0000 {
compatible = "samsung,exynosautov9-hsi2c";
reg = <0x109a0000 0xc0>;
pinctrl-names = "default";
pinctrl-0 = <&hsi2c22_bus>;
interrupts = <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_10>,
<&cmu_peric1 CLK_GOUT_PERIC1_PCLK_10>;
clock-names = "hsi2c", "hsi2c_pclk";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
usi_i2c_11: usi@109b00c0 {
compatible = "samsung,exynosautov9-usi",
"samsung,exynos850-usi";
reg = <0x109b00c0 0x20>;
samsung,sysreg = <&syscon_peric1 0x102c>;
samsung,mode = <USI_V2_I2C>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_11>,
<&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_11>;
clock-names = "pclk", "ipclk";
status = "disabled";
hsi2c_23: i2c@109b0000 {
compatible = "samsung,exynosautov9-hsi2c";
reg = <0x109b0000 0xc0>;
interrupts = <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&hsi2c23_bus>;
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_11>,
<&cmu_peric1 CLK_GOUT_PERIC1_PCLK_11>;
clock-names = "hsi2c", "hsi2c_pclk";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
ufs_0_phy: phy@17e04000 {
compatible = "samsung,exynosautov9-ufs-phy";
reg = <0x17e04000 0xc00>;
reg-names = "phy-pma";
samsung,pmu-syscon = <&pmu_system_controller>;
#phy-cells = <0>;
clocks = <&xtcxo>;
clock-names = "ref_clk";
status = "disabled";
};
ufs_0: ufs@17e00000 {
compatible = "samsung,exynosautov9-ufs";
reg = <0x17e00000 0x100>,
<0x17e01100 0x410>,
<0x17e80000 0x8000>,
<0x17dc0000 0x2200>;
reg-names = "hci", "vs_hci", "unipro", "ufsp";
interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu_fsys2 CLK_GOUT_FSYS2_UFS_EMBD0_ACLK>,
<&cmu_fsys2 CLK_GOUT_FSYS2_UFS_EMBD0_UNIPRO>;
clock-names = "core_clk", "sclk_unipro_main";
freq-table-hz = <0 0>, <0 0>;
pinctrl-names = "default";
pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>;
phys = <&ufs_0_phy>;
phy-names = "ufs-phy";
samsung,sysreg = <&syscon_fsys2 0x710>;
status = "disabled";
};
ufs_1_phy: phy@17f04000 {
compatible = "samsung,exynosautov9-ufs-phy";
reg = <0x17f04000 0xc00>;
reg-names = "phy-pma";
samsung,pmu-syscon = <&pmu_system_controller 0x72c>;
#phy-cells = <0>;
clocks = <&xtcxo>;
clock-names = "ref_clk";
status = "disabled";
};
ufs_1: ufs@17f00000 {
compatible = "samsung,exynosautov9-ufs";
reg = <0x17f00000 0x100>,
<0x17f01100 0x410>,
<0x17f80000 0x8000>,
<0x17de0000 0x2200>;
reg-names = "hci", "vs_hci", "unipro", "ufsp";
interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu_fsys2 CLK_GOUT_FSYS2_UFS_EMBD1_ACLK>,
<&cmu_fsys2 CLK_GOUT_FSYS2_UFS_EMBD1_UNIPRO>;
clock-names = "core_clk", "sclk_unipro_main";
freq-table-hz = <0 0>, <0 0>;
pinctrl-names = "default";
pinctrl-0 = <&ufs_rst_n_1 &ufs_refclk_out_1>;
phys = <&ufs_1_phy>;
phy-names = "ufs-phy";
samsung,sysreg = <&syscon_fsys2 0x714>;
status = "disabled";
};
watchdog_cl0: watchdog@10050000 {
compatible = "samsung,exynosautov9-wdt";
reg = <0x10050000 0x100>;
interrupts = <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu_peris CLK_GOUT_WDT_CLUSTER0>, <&xtcxo>;
clock-names = "watchdog", "watchdog_src";
samsung,syscon-phandle = <&pmu_system_controller>;
samsung,cluster-index = <0>;
};
watchdog_cl1: watchdog@10060000 {
compatible = "samsung,exynosautov9-wdt";
reg = <0x10060000 0x100>;
interrupts = <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu_peris CLK_GOUT_WDT_CLUSTER1>, <&xtcxo>;
clock-names = "watchdog", "watchdog_src";
samsung,syscon-phandle = <&pmu_system_controller>;
samsung,cluster-index = <1>;
};
};
};
#include "exynosautov9-pinctrl.dtsi"