67 lines
1.1 KiB
Plaintext
67 lines
1.1 KiB
Plaintext
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2021-2022, Intel Corporation
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*/
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#include "socfpga_agilex.dtsi"
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/ {
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model = "SoCFPGA Agilex n6000";
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compatible = "intel,socfpga-agilex-n6000", "intel,socfpga-agilex";
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aliases {
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serial0 = &uart1;
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serial1 = &uart0;
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ethernet0 = &gmac0;
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ethernet1 = &gmac1;
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ethernet2 = &gmac2;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory@0 {
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device_type = "memory";
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/* We expect the bootloader to fill in the reg */
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reg = <0 0 0 0>;
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};
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soc {
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bus@80000000 {
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compatible = "simple-bus";
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reg = <0x80000000 0x60000000>,
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<0xf9000000 0x00100000>;
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reg-names = "axi_h2f", "axi_h2f_lw";
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#address-cells = <2>;
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#size-cells = <1>;
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ranges = <0x00000000 0x00000000 0xf9000000 0x00001000>;
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dma-controller@0 {
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compatible = "intel,hps-copy-engine";
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reg = <0x00000000 0x00000000 0x00001000>;
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#dma-cells = <1>;
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};
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};
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};
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};
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&osc1 {
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clock-frequency = <25000000>;
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};
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&uart0 {
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status = "okay";
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};
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&uart1 {
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status = "okay";
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};
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&watchdog0 {
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status = "okay";
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};
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&fpga_mgr {
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status = "disabled";
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};
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