316 lines
6.0 KiB
Awk
316 lines
6.0 KiB
Awk
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#!/bin/awk -f
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# SPDX-License-Identifier: GPL-2.0
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# gen-sysreg.awk: arm64 sysreg header generator
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#
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# Usage: awk -f gen-sysreg.awk sysregs.txt
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# Log an error and terminate
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function fatal(msg) {
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print "Error at " NR ": " msg > "/dev/stderr"
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exit 1
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}
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# Sanity check that the start or end of a block makes sense at this point in
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# the file. If not, produce an error and terminate.
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#
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# @this - the $Block or $EndBlock
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# @prev - the only valid block to already be in (value of @block)
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# @new - the new value of @block
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function change_block(this, prev, new) {
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if (block != prev)
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fatal("unexpected " this " (inside " block ")")
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block = new
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}
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# Sanity check the number of records for a field makes sense. If not, produce
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# an error and terminate.
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function expect_fields(nf) {
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if (NF != nf)
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fatal(NF " fields found where " nf " expected")
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}
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# Print a CPP macro definition, padded with spaces so that the macro bodies
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# line up in a column
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function define(name, val) {
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printf "%-56s%s\n", "#define " name, val
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}
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# Print standard BITMASK/SHIFT/WIDTH CPP definitions for a field
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function define_field(reg, field, msb, lsb) {
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define(reg "_" field, "GENMASK(" msb ", " lsb ")")
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define(reg "_" field "_MASK", "GENMASK(" msb ", " lsb ")")
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define(reg "_" field "_SHIFT", lsb)
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define(reg "_" field "_WIDTH", msb - lsb + 1)
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}
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# Print a field _SIGNED definition for a field
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function define_field_sign(reg, field, sign) {
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define(reg "_" field "_SIGNED", sign)
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}
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# Parse a "<msb>[:<lsb>]" string into the global variables @msb and @lsb
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function parse_bitdef(reg, field, bitdef, _bits)
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{
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if (bitdef ~ /^[0-9]+$/) {
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msb = bitdef
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lsb = bitdef
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} else if (split(bitdef, _bits, ":") == 2) {
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msb = _bits[1]
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lsb = _bits[2]
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} else {
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fatal("invalid bit-range definition '" bitdef "'")
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}
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if (msb != next_bit)
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fatal(reg "." field " starts at " msb " not " next_bit)
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if (63 < msb || msb < 0)
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fatal(reg "." field " invalid high bit in '" bitdef "'")
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if (63 < lsb || lsb < 0)
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fatal(reg "." field " invalid low bit in '" bitdef "'")
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if (msb < lsb)
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fatal(reg "." field " invalid bit-range '" bitdef "'")
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if (low > high)
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fatal(reg "." field " has invalid range " high "-" low)
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next_bit = lsb - 1
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}
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BEGIN {
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print "#ifndef __ASM_SYSREG_DEFS_H"
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print "#define __ASM_SYSREG_DEFS_H"
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print ""
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print "/* Generated file - do not edit */"
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print ""
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block = "None"
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}
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END {
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print "#endif /* __ASM_SYSREG_DEFS_H */"
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}
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# skip blank lines and comment lines
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/^$/ { next }
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/^[\t ]*#/ { next }
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/^SysregFields/ {
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change_block("SysregFields", "None", "SysregFields")
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expect_fields(2)
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reg = $2
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res0 = "UL(0)"
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res1 = "UL(0)"
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unkn = "UL(0)"
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next_bit = 63
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next
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}
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/^EndSysregFields/ {
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if (next_bit > 0)
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fatal("Unspecified bits in " reg)
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change_block("EndSysregFields", "SysregFields", "None")
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define(reg "_RES0", "(" res0 ")")
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define(reg "_RES1", "(" res1 ")")
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define(reg "_UNKN", "(" unkn ")")
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print ""
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reg = null
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res0 = null
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res1 = null
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unkn = null
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next
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}
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/^Sysreg/ {
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change_block("Sysreg", "None", "Sysreg")
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expect_fields(7)
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reg = $2
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op0 = $3
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op1 = $4
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crn = $5
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crm = $6
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op2 = $7
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res0 = "UL(0)"
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res1 = "UL(0)"
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unkn = "UL(0)"
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define("REG_" reg, "S" op0 "_" op1 "_C" crn "_C" crm "_" op2)
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define("SYS_" reg, "sys_reg(" op0 ", " op1 ", " crn ", " crm ", " op2 ")")
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define("SYS_" reg "_Op0", op0)
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define("SYS_" reg "_Op1", op1)
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define("SYS_" reg "_CRn", crn)
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define("SYS_" reg "_CRm", crm)
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define("SYS_" reg "_Op2", op2)
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print ""
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next_bit = 63
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next
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}
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/^EndSysreg/ {
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if (next_bit > 0)
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fatal("Unspecified bits in " reg)
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change_block("EndSysreg", "Sysreg", "None")
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if (res0 != null)
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define(reg "_RES0", "(" res0 ")")
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if (res1 != null)
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define(reg "_RES1", "(" res1 ")")
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if (unkn != null)
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define(reg "_UNKN", "(" unkn ")")
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if (res0 != null || res1 != null || unkn != null)
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print ""
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reg = null
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op0 = null
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op1 = null
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crn = null
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crm = null
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op2 = null
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res0 = null
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res1 = null
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unkn = null
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next
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}
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# Currently this is effectivey a comment, in future we may want to emit
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# defines for the fields.
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/^Fields/ && (block == "Sysreg") {
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expect_fields(2)
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if (next_bit != 63)
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fatal("Some fields already defined for " reg)
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print "/* For " reg " fields see " $2 " */"
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print ""
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next_bit = 0
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res0 = null
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res1 = null
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unkn = null
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next
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}
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/^Res0/ && (block == "Sysreg" || block == "SysregFields") {
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expect_fields(2)
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parse_bitdef(reg, "RES0", $2)
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field = "RES0_" msb "_" lsb
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res0 = res0 " | GENMASK_ULL(" msb ", " lsb ")"
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next
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}
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/^Res1/ && (block == "Sysreg" || block == "SysregFields") {
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expect_fields(2)
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parse_bitdef(reg, "RES1", $2)
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field = "RES1_" msb "_" lsb
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res1 = res1 " | GENMASK_ULL(" msb ", " lsb ")"
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next
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}
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/^Unkn/ && (block == "Sysreg" || block == "SysregFields") {
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expect_fields(2)
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parse_bitdef(reg, "UNKN", $2)
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field = "UNKN_" msb "_" lsb
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unkn = unkn " | GENMASK_ULL(" msb ", " lsb ")"
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next
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}
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/^Field/ && (block == "Sysreg" || block == "SysregFields") {
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expect_fields(3)
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field = $3
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parse_bitdef(reg, field, $2)
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define_field(reg, field, msb, lsb)
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print ""
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next
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}
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/^Raz/ && (block == "Sysreg" || block == "SysregFields") {
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expect_fields(2)
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parse_bitdef(reg, field, $2)
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next
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}
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/^SignedEnum/ {
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change_block("Enum<", "Sysreg", "Enum")
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expect_fields(3)
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field = $3
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parse_bitdef(reg, field, $2)
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define_field(reg, field, msb, lsb)
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define_field_sign(reg, field, "true")
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next
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}
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/^UnsignedEnum/ {
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change_block("Enum<", "Sysreg", "Enum")
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expect_fields(3)
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field = $3
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parse_bitdef(reg, field, $2)
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define_field(reg, field, msb, lsb)
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define_field_sign(reg, field, "false")
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next
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}
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/^Enum/ {
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change_block("Enum", "Sysreg", "Enum")
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expect_fields(3)
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field = $3
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parse_bitdef(reg, field, $2)
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define_field(reg, field, msb, lsb)
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next
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}
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/^EndEnum/ {
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change_block("EndEnum", "Enum", "Sysreg")
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field = null
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msb = null
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lsb = null
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print ""
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next
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}
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/0b[01]+/ && block == "Enum" {
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expect_fields(2)
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val = $1
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name = $2
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define(reg "_" field "_" name, "UL(" val ")")
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next
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}
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# Any lines not handled by previous rules are unexpected
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{
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fatal("unhandled statement")
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}
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