202 lines
3.9 KiB
C
202 lines
3.9 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Some useful macros for LoongArch assembler code
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*
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* Copyright (C) 2020-2022 Loongson Technology Corporation Limited
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*
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* Derived from MIPS:
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* Copyright (C) 1995, 1996, 1997, 1999, 2001 by Ralf Baechle
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* Copyright (C) 1999 by Silicon Graphics, Inc.
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* Copyright (C) 2001 MIPS Technologies, Inc.
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* Copyright (C) 2002 Maciej W. Rozycki
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*/
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#ifndef __ASM_ASM_H
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#define __ASM_ASM_H
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/* LoongArch pref instruction. */
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#ifdef CONFIG_CPU_HAS_PREFETCH
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#define PREF(hint, addr, offs) \
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preld hint, addr, offs; \
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#define PREFX(hint, addr, index) \
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preldx hint, addr, index; \
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#else /* !CONFIG_CPU_HAS_PREFETCH */
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#define PREF(hint, addr, offs)
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#define PREFX(hint, addr, index)
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#endif /* !CONFIG_CPU_HAS_PREFETCH */
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/*
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* Stack alignment
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*/
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#define STACK_ALIGN ~(0xf)
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/*
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* Macros to handle different pointer/register sizes for 32/64-bit code
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*/
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/*
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* Size of a register
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*/
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#ifndef __loongarch64
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#define SZREG 4
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#else
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#define SZREG 8
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#endif
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/*
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* Use the following macros in assemblercode to load/store registers,
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* pointers etc.
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*/
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#if (SZREG == 4)
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#define REG_L ld.w
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#define REG_S st.w
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#define REG_ADD add.w
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#define REG_SUB sub.w
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#else /* SZREG == 8 */
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#define REG_L ld.d
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#define REG_S st.d
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#define REG_ADD add.d
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#define REG_SUB sub.d
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#endif
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/*
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* How to add/sub/load/store/shift C int variables.
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*/
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#if (__SIZEOF_INT__ == 4)
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#define INT_ADD add.w
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#define INT_ADDI addi.w
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#define INT_SUB sub.w
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#define INT_L ld.w
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#define INT_S st.w
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#define INT_SLL slli.w
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#define INT_SLLV sll.w
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#define INT_SRL srli.w
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#define INT_SRLV srl.w
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#define INT_SRA srai.w
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#define INT_SRAV sra.w
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#endif
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#if (__SIZEOF_INT__ == 8)
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#define INT_ADD add.d
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#define INT_ADDI addi.d
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#define INT_SUB sub.d
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#define INT_L ld.d
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#define INT_S st.d
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#define INT_SLL slli.d
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#define INT_SLLV sll.d
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#define INT_SRL srli.d
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#define INT_SRLV srl.d
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#define INT_SRA srai.d
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#define INT_SRAV sra.d
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#endif
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/*
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* How to add/sub/load/store/shift C long variables.
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*/
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#if (__SIZEOF_LONG__ == 4)
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#define LONG_ADD add.w
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#define LONG_ADDI addi.w
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#define LONG_SUB sub.w
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#define LONG_L ld.w
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#define LONG_S st.w
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#define LONG_SLL slli.w
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#define LONG_SLLV sll.w
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#define LONG_SRL srli.w
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#define LONG_SRLV srl.w
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#define LONG_SRA srai.w
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#define LONG_SRAV sra.w
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#ifdef __ASSEMBLY__
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#define LONG .word
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#endif
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#define LONGSIZE 4
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#define LONGMASK 3
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#define LONGLOG 2
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#endif
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#if (__SIZEOF_LONG__ == 8)
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#define LONG_ADD add.d
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#define LONG_ADDI addi.d
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#define LONG_SUB sub.d
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#define LONG_L ld.d
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#define LONG_S st.d
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#define LONG_SLL slli.d
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#define LONG_SLLV sll.d
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#define LONG_SRL srli.d
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#define LONG_SRLV srl.d
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#define LONG_SRA srai.d
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#define LONG_SRAV sra.d
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#ifdef __ASSEMBLY__
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#define LONG .dword
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#endif
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#define LONGSIZE 8
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#define LONGMASK 7
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#define LONGLOG 3
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#endif
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/*
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* How to add/sub/load/store/shift pointers.
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*/
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#if (__SIZEOF_POINTER__ == 4)
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#define PTR_ADD add.w
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#define PTR_ADDI addi.w
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#define PTR_SUB sub.w
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#define PTR_L ld.w
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#define PTR_S st.w
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#define PTR_LI li.w
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#define PTR_SLL slli.w
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#define PTR_SLLV sll.w
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#define PTR_SRL srli.w
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#define PTR_SRLV srl.w
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#define PTR_SRA srai.w
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#define PTR_SRAV sra.w
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#define PTR_SCALESHIFT 2
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#ifdef __ASSEMBLY__
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#define PTR .word
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#endif
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#define PTRSIZE 4
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#define PTRLOG 2
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#endif
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#if (__SIZEOF_POINTER__ == 8)
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#define PTR_ADD add.d
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#define PTR_ADDI addi.d
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#define PTR_SUB sub.d
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#define PTR_L ld.d
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#define PTR_S st.d
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#define PTR_LI li.d
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#define PTR_SLL slli.d
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#define PTR_SLLV sll.d
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#define PTR_SRL srli.d
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#define PTR_SRLV srl.d
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#define PTR_SRA srai.d
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#define PTR_SRAV sra.d
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#define PTR_SCALESHIFT 3
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#ifdef __ASSEMBLY__
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#define PTR .dword
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#endif
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#define PTRSIZE 8
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#define PTRLOG 3
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#endif
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/* Annotate a function as being unsuitable for kprobes. */
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#ifdef CONFIG_KPROBES
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#define _ASM_NOKPROBE(name) \
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.pushsection "_kprobe_blacklist", "aw"; \
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.quad name; \
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.popsection
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#else
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#define _ASM_NOKPROBE(name)
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#endif
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#endif /* __ASM_ASM_H */
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