241 lines
4.5 KiB
Plaintext
241 lines
4.5 KiB
Plaintext
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// SPDX-License-Identifier: GPL-2.0
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#include "dt-bindings/clock/bcm6328-clock.h"
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#include "dt-bindings/reset/bcm6328-reset.h"
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#include "dt-bindings/soc/bcm6328-pm.h"
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "brcm,bcm6328";
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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mips-hpt-frequency = <160000000>;
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cpu@0 {
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compatible = "brcm,bmips4350";
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device_type = "cpu";
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reg = <0>;
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};
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cpu@1 {
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compatible = "brcm,bmips4350";
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device_type = "cpu";
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reg = <1>;
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};
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};
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clocks {
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periph_osc: periph-osc {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <50000000>;
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clock-output-names = "periph";
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};
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hsspi_osc: hsspi-osc {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <133333333>;
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clock-output-names = "hsspi_osc";
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};
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};
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aliases {
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nflash = &nflash;
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serial0 = &uart0;
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serial1 = &uart1;
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spi1 = &hsspi;
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};
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cpu_intc: interrupt-controller {
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#address-cells = <0>;
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compatible = "mti,cpu-interrupt-controller";
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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ubus {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges;
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periph_clk: clock-controller@10000004 {
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compatible = "brcm,bcm6328-clocks";
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reg = <0x10000004 0x4>;
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#clock-cells = <1>;
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};
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periph_rst: reset-controller@10000010 {
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compatible = "brcm,bcm6345-reset";
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reg = <0x10000010 0x4>;
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#reset-cells = <1>;
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};
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periph_intc: interrupt-controller@10000020 {
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compatible = "brcm,bcm6345-l1-intc";
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reg = <0x10000020 0x10>,
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<0x10000030 0x10>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&cpu_intc>;
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interrupts = <2>, <3>;
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};
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wdt: watchdog@1000005c {
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compatible = "brcm,bcm7038-wdt";
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reg = <0x1000005c 0xc>;
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clocks = <&periph_osc>;
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clock-names = "refclk";
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timeout-sec = <30>;
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};
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soft_reset: syscon@10000068 {
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compatible = "syscon";
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reg = <0x10000068 0x4>;
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native-endian;
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reboot {
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compatible = "syscon-reboot";
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offset = <0x0>;
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mask = <0x1>;
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};
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};
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uart0: serial@10000100 {
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compatible = "brcm,bcm6345-uart";
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reg = <0x10000100 0x18>;
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interrupt-parent = <&periph_intc>;
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interrupts = <28>;
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clocks = <&periph_osc>;
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clock-names = "refclk";
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status = "disabled";
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};
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uart1: serial@10000120 {
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compatible = "brcm,bcm6345-uart";
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reg = <0x10000120 0x18>;
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interrupt-parent = <&periph_intc>;
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interrupts = <39>;
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clocks = <&periph_osc>;
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clock-names = "refclk";
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status = "disabled";
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};
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nflash: nand@10000200 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "brcm,nand-bcm6368",
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"brcm,brcmnand-v2.2",
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"brcm,brcmnand";
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reg = <0x10000200 0x180>,
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<0x10000400 0x200>,
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<0x10000070 0x10>;
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reg-names = "nand",
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"nand-cache",
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"nand-int-base";
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interrupt-parent = <&periph_intc>;
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interrupts = <0>;
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status = "disabled";
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};
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leds0: led-controller@10000800 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "brcm,bcm6328-leds";
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reg = <0x10000800 0x24>;
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status = "disabled";
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};
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hsspi: spi@10001000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "brcm,bcm6328-hsspi";
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reg = <0x10001000 0x600>;
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interrupt-parent = <&periph_intc>;
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interrupts = <29>;
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clocks = <&periph_clk BCM6328_CLK_HSSPI>,
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<&hsspi_osc>;
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clock-names = "hsspi",
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"pll";
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resets = <&periph_rst BCM6328_RST_SPI>;
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reset-names = "hsspi";
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status = "disabled";
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};
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periph_pwr: power-controller@10001848 {
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compatible = "brcm,bcm6328-power-controller";
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reg = <0x10001848 0x4>;
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#power-domain-cells = <1>;
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};
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ehci: usb@10002500 {
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compatible = "brcm,bcm6328-ehci", "generic-ehci";
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reg = <0x10002500 0x100>;
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big-endian;
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interrupt-parent = <&periph_intc>;
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interrupts = <42>;
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phys = <&usbh 0>;
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phy-names = "usb";
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status = "disabled";
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};
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ohci: usb@10002600 {
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compatible = "brcm,bcm6328-ohci", "generic-ohci";
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reg = <0x10002600 0x100>;
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big-endian;
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no-big-frame-no;
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interrupt-parent = <&periph_intc>;
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interrupts = <41>;
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phys = <&usbh 0>;
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phy-names = "usb";
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status = "disabled";
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};
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usbh: usb-phy@10002700 {
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compatible = "brcm,bcm6328-usbh-phy";
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reg = <0x10002700 0x38>;
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#phy-cells = <1>;
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clocks = <&periph_clk BCM6328_CLK_USBH>;
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clock-names = "usbh";
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power-domains = <&periph_pwr BCM6328_POWER_DOMAIN_USBH>;
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resets = <&periph_rst BCM6328_RST_USBH>;
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reset-names = "usbh";
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status = "disabled";
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};
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};
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};
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