170 lines
6.3 KiB
C
170 lines
6.3 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __CVMX_CONFIG_H__
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#define __CVMX_CONFIG_H__
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/************************* Config Specific Defines ************************/
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#define CVMX_LLM_NUM_PORTS 1
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#define CVMX_NULL_POINTER_PROTECT 1
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#define CVMX_ENABLE_DEBUG_PRINTS 1
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/* PKO queues per port for interface 0 (ports 0-15) */
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#define CVMX_PKO_QUEUES_PER_PORT_INTERFACE0 1
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/* PKO queues per port for interface 1 (ports 16-31) */
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#define CVMX_PKO_QUEUES_PER_PORT_INTERFACE1 1
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/* Limit on the number of PKO ports enabled for interface 0 */
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#define CVMX_PKO_MAX_PORTS_INTERFACE0 CVMX_HELPER_PKO_MAX_PORTS_INTERFACE0
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/* Limit on the number of PKO ports enabled for interface 1 */
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#define CVMX_PKO_MAX_PORTS_INTERFACE1 CVMX_HELPER_PKO_MAX_PORTS_INTERFACE1
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/* PKO queues per port for PCI (ports 32-35) */
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#define CVMX_PKO_QUEUES_PER_PORT_PCI 1
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/* PKO queues per port for Loop devices (ports 36-39) */
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#define CVMX_PKO_QUEUES_PER_PORT_LOOP 1
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/************************* FPA allocation *********************************/
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/* Pool sizes in bytes, must be multiple of a cache line */
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#define CVMX_FPA_POOL_0_SIZE (16 * CVMX_CACHE_LINE_SIZE)
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#define CVMX_FPA_POOL_1_SIZE (1 * CVMX_CACHE_LINE_SIZE)
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#define CVMX_FPA_POOL_2_SIZE (8 * CVMX_CACHE_LINE_SIZE)
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#define CVMX_FPA_POOL_3_SIZE (0 * CVMX_CACHE_LINE_SIZE)
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#define CVMX_FPA_POOL_4_SIZE (0 * CVMX_CACHE_LINE_SIZE)
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#define CVMX_FPA_POOL_5_SIZE (0 * CVMX_CACHE_LINE_SIZE)
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#define CVMX_FPA_POOL_6_SIZE (0 * CVMX_CACHE_LINE_SIZE)
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#define CVMX_FPA_POOL_7_SIZE (0 * CVMX_CACHE_LINE_SIZE)
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/* Pools in use */
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/* Packet buffers */
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#define CVMX_FPA_PACKET_POOL (0)
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#define CVMX_FPA_PACKET_POOL_SIZE CVMX_FPA_POOL_0_SIZE
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/* Work queue entries */
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#define CVMX_FPA_WQE_POOL (1)
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#define CVMX_FPA_WQE_POOL_SIZE CVMX_FPA_POOL_1_SIZE
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/* PKO queue command buffers */
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#define CVMX_FPA_OUTPUT_BUFFER_POOL (2)
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#define CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE CVMX_FPA_POOL_2_SIZE
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/************************* FAU allocation ********************************/
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/* The fetch and add registers are allocated here. They are arranged
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* in order of descending size so that all alignment constraints are
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* automatically met. The enums are linked so that the following enum
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* continues allocating where the previous one left off, so the
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* numbering within each enum always starts with zero. The macros
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* take care of the address increment size, so the values entered
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* always increase by 1. FAU registers are accessed with byte
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* addresses.
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*/
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#define CVMX_FAU_REG_64_ADDR(x) ((x << 3) + CVMX_FAU_REG_64_START)
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typedef enum {
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CVMX_FAU_REG_64_START = 0,
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CVMX_FAU_REG_64_END = CVMX_FAU_REG_64_ADDR(0),
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} cvmx_fau_reg_64_t;
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#define CVMX_FAU_REG_32_ADDR(x) ((x << 2) + CVMX_FAU_REG_32_START)
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typedef enum {
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CVMX_FAU_REG_32_START = CVMX_FAU_REG_64_END,
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CVMX_FAU_REG_32_END = CVMX_FAU_REG_32_ADDR(0),
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} cvmx_fau_reg_32_t;
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#define CVMX_FAU_REG_16_ADDR(x) ((x << 1) + CVMX_FAU_REG_16_START)
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typedef enum {
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CVMX_FAU_REG_16_START = CVMX_FAU_REG_32_END,
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CVMX_FAU_REG_16_END = CVMX_FAU_REG_16_ADDR(0),
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} cvmx_fau_reg_16_t;
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#define CVMX_FAU_REG_8_ADDR(x) ((x) + CVMX_FAU_REG_8_START)
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typedef enum {
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CVMX_FAU_REG_8_START = CVMX_FAU_REG_16_END,
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CVMX_FAU_REG_8_END = CVMX_FAU_REG_8_ADDR(0),
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} cvmx_fau_reg_8_t;
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/*
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* The name CVMX_FAU_REG_AVAIL_BASE is provided to indicate the first
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* available FAU address that is not allocated in cvmx-config.h. This
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* is 64 bit aligned.
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*/
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#define CVMX_FAU_REG_AVAIL_BASE ((CVMX_FAU_REG_8_END + 0x7) & (~0x7ULL))
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#define CVMX_FAU_REG_END (2048)
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/********************** scratch memory allocation *************************/
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/* Scratchpad memory allocation. Note that these are byte memory
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* addresses. Some uses of scratchpad (IOBDMA for example) require
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* the use of 8-byte aligned addresses, so proper alignment needs to
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* be taken into account.
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*/
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/* Generic scratch iobdma area */
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#define CVMX_SCR_SCRATCH (0)
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/* First location available after cvmx-config.h allocated region. */
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#define CVMX_SCR_REG_AVAIL_BASE (8)
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/*
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* CVMX_HELPER_FIRST_MBUFF_SKIP is the number of bytes to reserve
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* before the beginning of the packet. If necessary, override the
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* default here. See the IPD section of the hardware manual for MBUFF
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* SKIP details.
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*/
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#define CVMX_HELPER_FIRST_MBUFF_SKIP 184
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/*
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* CVMX_HELPER_NOT_FIRST_MBUFF_SKIP is the number of bytes to reserve
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* in each chained packet element. If necessary, override the default
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* here.
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*/
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#define CVMX_HELPER_NOT_FIRST_MBUFF_SKIP 0
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/*
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* CVMX_HELPER_ENABLE_BACK_PRESSURE controls whether back pressure is
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* enabled for all input ports. This controls if IPD sends
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* backpressure to all ports if Octeon's FPA pools don't have enough
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* packet or work queue entries. Even when this is off, it is still
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* possible to get backpressure from individual hardware ports. When
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* configuring backpressure, also check
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* CVMX_HELPER_DISABLE_*_BACKPRESSURE below. If necessary, override
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* the default here.
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*/
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#define CVMX_HELPER_ENABLE_BACK_PRESSURE 1
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/*
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* CVMX_HELPER_ENABLE_IPD controls if the IPD is enabled in the helper
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* function. Once it is enabled the hardware starts accepting
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* packets. You might want to skip the IPD enable if configuration
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* changes are need from the default helper setup. If necessary,
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* override the default here.
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*/
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#define CVMX_HELPER_ENABLE_IPD 0
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/*
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* CVMX_HELPER_INPUT_TAG_TYPE selects the type of tag that the IPD assigns
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* to incoming packets.
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*/
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#define CVMX_HELPER_INPUT_TAG_TYPE CVMX_POW_TAG_TYPE_ORDERED
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#define CVMX_ENABLE_PARAMETER_CHECKING 0
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/*
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* The following select which fields are used by the PIP to generate
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* the tag on INPUT
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* 0: don't include
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* 1: include
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*/
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#define CVMX_HELPER_INPUT_TAG_IPV6_SRC_IP 0
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#define CVMX_HELPER_INPUT_TAG_IPV6_DST_IP 0
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#define CVMX_HELPER_INPUT_TAG_IPV6_SRC_PORT 0
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#define CVMX_HELPER_INPUT_TAG_IPV6_DST_PORT 0
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#define CVMX_HELPER_INPUT_TAG_IPV6_NEXT_HEADER 0
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#define CVMX_HELPER_INPUT_TAG_IPV4_SRC_IP 0
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#define CVMX_HELPER_INPUT_TAG_IPV4_DST_IP 0
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#define CVMX_HELPER_INPUT_TAG_IPV4_SRC_PORT 0
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#define CVMX_HELPER_INPUT_TAG_IPV4_DST_PORT 0
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#define CVMX_HELPER_INPUT_TAG_IPV4_PROTOCOL 0
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#define CVMX_HELPER_INPUT_TAG_INPUT_PORT 1
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/* Select skip mode for input ports */
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#define CVMX_HELPER_INPUT_PORT_SKIP_MODE CVMX_PIP_PORT_CFG_MODE_SKIPL2
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/*
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* Force backpressure to be disabled. This overrides all other
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* backpressure configuration.
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*/
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#define CVMX_HELPER_DISABLE_RGMII_BACKPRESSURE 0
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#endif /* __CVMX_CONFIG_H__ */
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