236 lines
7.2 KiB
ArmAsm
236 lines
7.2 KiB
ArmAsm
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Fast MD5 implementation for PPC
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*
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* Copyright (c) 2015 Markus Stockhausen <stockhausen@collogia.de>
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*/
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#include <asm/ppc_asm.h>
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#include <asm/asm-offsets.h>
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#include <asm/asm-compat.h>
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#define rHP r3
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#define rWP r4
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#define rH0 r0
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#define rH1 r6
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#define rH2 r7
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#define rH3 r5
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#define rW00 r8
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#define rW01 r9
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#define rW02 r10
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#define rW03 r11
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#define rW04 r12
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#define rW05 r14
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#define rW06 r15
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#define rW07 r16
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#define rW08 r17
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#define rW09 r18
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#define rW10 r19
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#define rW11 r20
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#define rW12 r21
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#define rW13 r22
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#define rW14 r23
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#define rW15 r24
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#define rT0 r25
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#define rT1 r26
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#define INITIALIZE \
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PPC_STLU r1,-INT_FRAME_SIZE(r1); \
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SAVE_GPRS(14, 26, r1) /* push registers onto stack */
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#define FINALIZE \
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REST_GPRS(14, 26, r1); /* pop registers from stack */ \
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addi r1,r1,INT_FRAME_SIZE
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#ifdef __BIG_ENDIAN__
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#define LOAD_DATA(reg, off) \
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lwbrx reg,0,rWP; /* load data */
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#define INC_PTR \
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addi rWP,rWP,4; /* increment per word */
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#define NEXT_BLOCK /* nothing to do */
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#else
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#define LOAD_DATA(reg, off) \
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lwz reg,off(rWP); /* load data */
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#define INC_PTR /* nothing to do */
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#define NEXT_BLOCK \
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addi rWP,rWP,64; /* increment per block */
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#endif
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#define R_00_15(a, b, c, d, w0, w1, p, q, off, k0h, k0l, k1h, k1l) \
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LOAD_DATA(w0, off) /* W */ \
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and rT0,b,c; /* 1: f = b and c */ \
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INC_PTR /* ptr++ */ \
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andc rT1,d,b; /* 1: f' = ~b and d */ \
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LOAD_DATA(w1, off+4) /* W */ \
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or rT0,rT0,rT1; /* 1: f = f or f' */ \
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addi w0,w0,k0l; /* 1: wk = w + k */ \
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add a,a,rT0; /* 1: a = a + f */ \
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addis w0,w0,k0h; /* 1: wk = w + k' */ \
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addis w1,w1,k1h; /* 2: wk = w + k */ \
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add a,a,w0; /* 1: a = a + wk */ \
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addi w1,w1,k1l; /* 2: wk = w + k' */ \
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rotrwi a,a,p; /* 1: a = a rotl x */ \
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add d,d,w1; /* 2: a = a + wk */ \
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add a,a,b; /* 1: a = a + b */ \
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and rT0,a,b; /* 2: f = b and c */ \
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andc rT1,c,a; /* 2: f' = ~b and d */ \
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or rT0,rT0,rT1; /* 2: f = f or f' */ \
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add d,d,rT0; /* 2: a = a + f */ \
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INC_PTR /* ptr++ */ \
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rotrwi d,d,q; /* 2: a = a rotl x */ \
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add d,d,a; /* 2: a = a + b */
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#define R_16_31(a, b, c, d, w0, w1, p, q, k0h, k0l, k1h, k1l) \
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andc rT0,c,d; /* 1: f = c and ~d */ \
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and rT1,b,d; /* 1: f' = b and d */ \
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addi w0,w0,k0l; /* 1: wk = w + k */ \
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or rT0,rT0,rT1; /* 1: f = f or f' */ \
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addis w0,w0,k0h; /* 1: wk = w + k' */ \
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add a,a,rT0; /* 1: a = a + f */ \
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addi w1,w1,k1l; /* 2: wk = w + k */ \
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add a,a,w0; /* 1: a = a + wk */ \
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addis w1,w1,k1h; /* 2: wk = w + k' */ \
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andc rT0,b,c; /* 2: f = c and ~d */ \
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rotrwi a,a,p; /* 1: a = a rotl x */ \
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add a,a,b; /* 1: a = a + b */ \
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add d,d,w1; /* 2: a = a + wk */ \
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and rT1,a,c; /* 2: f' = b and d */ \
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or rT0,rT0,rT1; /* 2: f = f or f' */ \
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add d,d,rT0; /* 2: a = a + f */ \
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rotrwi d,d,q; /* 2: a = a rotl x */ \
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add d,d,a; /* 2: a = a +b */
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#define R_32_47(a, b, c, d, w0, w1, p, q, k0h, k0l, k1h, k1l) \
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xor rT0,b,c; /* 1: f' = b xor c */ \
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addi w0,w0,k0l; /* 1: wk = w + k */ \
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xor rT1,rT0,d; /* 1: f = f xor f' */ \
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addis w0,w0,k0h; /* 1: wk = w + k' */ \
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add a,a,rT1; /* 1: a = a + f */ \
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addi w1,w1,k1l; /* 2: wk = w + k */ \
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add a,a,w0; /* 1: a = a + wk */ \
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addis w1,w1,k1h; /* 2: wk = w + k' */ \
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rotrwi a,a,p; /* 1: a = a rotl x */ \
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add d,d,w1; /* 2: a = a + wk */ \
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add a,a,b; /* 1: a = a + b */ \
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xor rT1,rT0,a; /* 2: f = b xor f' */ \
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add d,d,rT1; /* 2: a = a + f */ \
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rotrwi d,d,q; /* 2: a = a rotl x */ \
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add d,d,a; /* 2: a = a + b */
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#define R_48_63(a, b, c, d, w0, w1, p, q, k0h, k0l, k1h, k1l) \
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addi w0,w0,k0l; /* 1: w = w + k */ \
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orc rT0,b,d; /* 1: f = b or ~d */ \
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addis w0,w0,k0h; /* 1: w = w + k' */ \
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xor rT0,rT0,c; /* 1: f = f xor c */ \
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add a,a,w0; /* 1: a = a + wk */ \
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addi w1,w1,k1l; /* 2: w = w + k */ \
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add a,a,rT0; /* 1: a = a + f */ \
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addis w1,w1,k1h; /* 2: w = w + k' */ \
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rotrwi a,a,p; /* 1: a = a rotl x */ \
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add a,a,b; /* 1: a = a + b */ \
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orc rT0,a,c; /* 2: f = b or ~d */ \
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add d,d,w1; /* 2: a = a + wk */ \
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xor rT0,rT0,b; /* 2: f = f xor c */ \
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add d,d,rT0; /* 2: a = a + f */ \
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rotrwi d,d,q; /* 2: a = a rotl x */ \
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add d,d,a; /* 2: a = a + b */
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_GLOBAL(ppc_md5_transform)
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INITIALIZE
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mtctr r5
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lwz rH0,0(rHP)
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lwz rH1,4(rHP)
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lwz rH2,8(rHP)
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lwz rH3,12(rHP)
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ppc_md5_main:
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R_00_15(rH0, rH1, rH2, rH3, rW00, rW01, 25, 20, 0,
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0xd76b, -23432, 0xe8c8, -18602)
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R_00_15(rH2, rH3, rH0, rH1, rW02, rW03, 15, 10, 8,
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0x2420, 0x70db, 0xc1be, -12562)
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R_00_15(rH0, rH1, rH2, rH3, rW04, rW05, 25, 20, 16,
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0xf57c, 0x0faf, 0x4788, -14806)
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R_00_15(rH2, rH3, rH0, rH1, rW06, rW07, 15, 10, 24,
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0xa830, 0x4613, 0xfd47, -27391)
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R_00_15(rH0, rH1, rH2, rH3, rW08, rW09, 25, 20, 32,
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0x6981, -26408, 0x8b45, -2129)
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R_00_15(rH2, rH3, rH0, rH1, rW10, rW11, 15, 10, 40,
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0xffff, 0x5bb1, 0x895d, -10306)
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R_00_15(rH0, rH1, rH2, rH3, rW12, rW13, 25, 20, 48,
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0x6b90, 0x1122, 0xfd98, 0x7193)
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R_00_15(rH2, rH3, rH0, rH1, rW14, rW15, 15, 10, 56,
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0xa679, 0x438e, 0x49b4, 0x0821)
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R_16_31(rH0, rH1, rH2, rH3, rW01, rW06, 27, 23,
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0x0d56, 0x6e0c, 0x1810, 0x6d2d)
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R_16_31(rH2, rH3, rH0, rH1, rW11, rW00, 18, 12,
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0x9d02, -32109, 0x124c, 0x2332)
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R_16_31(rH0, rH1, rH2, rH3, rW05, rW10, 27, 23,
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0x8ea7, 0x4a33, 0x0245, -18270)
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R_16_31(rH2, rH3, rH0, rH1, rW15, rW04, 18, 12,
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0x8eee, -8608, 0xf258, -5095)
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R_16_31(rH0, rH1, rH2, rH3, rW09, rW14, 27, 23,
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0x969d, -10697, 0x1cbe, -15288)
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R_16_31(rH2, rH3, rH0, rH1, rW03, rW08, 18, 12,
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0x3317, 0x3e99, 0xdbd9, 0x7c15)
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R_16_31(rH0, rH1, rH2, rH3, rW13, rW02, 27, 23,
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0xac4b, 0x7772, 0xd8cf, 0x331d)
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R_16_31(rH2, rH3, rH0, rH1, rW07, rW12, 18, 12,
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0x6a28, 0x6dd8, 0x219a, 0x3b68)
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R_32_47(rH0, rH1, rH2, rH3, rW05, rW08, 28, 21,
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0x29cb, 0x28e5, 0x4218, -7788)
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R_32_47(rH2, rH3, rH0, rH1, rW11, rW14, 16, 9,
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0x473f, 0x06d1, 0x3aae, 0x3036)
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R_32_47(rH0, rH1, rH2, rH3, rW01, rW04, 28, 21,
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0xaea1, -15134, 0x640b, -11295)
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R_32_47(rH2, rH3, rH0, rH1, rW07, rW10, 16, 9,
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0x8f4c, 0x4887, 0xbc7c, -22499)
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R_32_47(rH0, rH1, rH2, rH3, rW13, rW00, 28, 21,
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0x7eb8, -27199, 0x00ea, 0x6050)
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R_32_47(rH2, rH3, rH0, rH1, rW03, rW06, 16, 9,
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0xe01a, 0x22fe, 0x4447, 0x69c5)
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R_32_47(rH0, rH1, rH2, rH3, rW09, rW12, 28, 21,
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0xb7f3, 0x0253, 0x59b1, 0x4d5b)
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R_32_47(rH2, rH3, rH0, rH1, rW15, rW02, 16, 9,
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0x4701, -27017, 0xc7bd, -19859)
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R_48_63(rH0, rH1, rH2, rH3, rW00, rW07, 26, 22,
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0x0988, -1462, 0x4c70, -19401)
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R_48_63(rH2, rH3, rH0, rH1, rW14, rW05, 17, 11,
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0xadaf, -5221, 0xfc99, 0x66f7)
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R_48_63(rH0, rH1, rH2, rH3, rW12, rW03, 26, 22,
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0x7e80, -16418, 0xba1e, -25587)
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R_48_63(rH2, rH3, rH0, rH1, rW10, rW01, 17, 11,
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0x4130, 0x380d, 0xe0c5, 0x738d)
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lwz rW00,0(rHP)
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R_48_63(rH0, rH1, rH2, rH3, rW08, rW15, 26, 22,
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0xe837, -30770, 0xde8a, 0x69e8)
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lwz rW14,4(rHP)
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R_48_63(rH2, rH3, rH0, rH1, rW06, rW13, 17, 11,
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0x9e79, 0x260f, 0x256d, -27941)
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lwz rW12,8(rHP)
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R_48_63(rH0, rH1, rH2, rH3, rW04, rW11, 26, 22,
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0xab75, -20775, 0x4f9e, -28397)
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lwz rW10,12(rHP)
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R_48_63(rH2, rH3, rH0, rH1, rW02, rW09, 17, 11,
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0x662b, 0x7c56, 0x11b2, 0x0358)
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add rH0,rH0,rW00
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stw rH0,0(rHP)
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add rH1,rH1,rW14
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stw rH1,4(rHP)
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add rH2,rH2,rW12
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stw rH2,8(rHP)
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add rH3,rH3,rW10
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stw rH3,12(rHP)
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NEXT_BLOCK
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bdnz ppc_md5_main
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FINALIZE
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blr
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