387 lines
10 KiB
C
387 lines
10 KiB
C
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Derived from arch/i386/kernel/irq.c
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* Copyright (C) 1992 Linus Torvalds
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* Adapted from arch/i386 by Gary Thomas
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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* Updated and modified by Cort Dougan <cort@fsmlabs.com>
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* Copyright (C) 1996-2001 Cort Dougan
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* Adapted for Power Macintosh by Paul Mackerras
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* Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
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*
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* This file contains the code used by various IRQ handling routines:
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* asking for different IRQ's should be done through these routines
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* instead of just grabbing them. Thus setups with different IRQ numbers
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* shouldn't result in any weird surprises, and installing new handlers
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* should be easier.
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*
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* The MPC8xx has an interrupt mask in the SIU. If a bit is set, the
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* interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit
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* mask register (of which only 16 are defined), hence the weird shifting
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* and complement of the cached_irq_mask. I want to be able to stuff
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* this right into the SIU SMASK register.
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* Many of the prep/chrp functions are conditional compiled on CONFIG_PPC_8xx
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* to reduce code space and undefined function references.
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*/
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#undef DEBUG
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#include <linux/export.h>
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#include <linux/threads.h>
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#include <linux/kernel_stat.h>
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/ptrace.h>
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#include <linux/ioport.h>
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#include <linux/interrupt.h>
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#include <linux/timex.h>
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#include <linux/init.h>
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#include <linux/slab.h>
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#include <linux/delay.h>
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#include <linux/irq.h>
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#include <linux/seq_file.h>
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#include <linux/cpumask.h>
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#include <linux/profile.h>
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#include <linux/bitops.h>
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#include <linux/list.h>
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#include <linux/radix-tree.h>
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#include <linux/mutex.h>
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#include <linux/pci.h>
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#include <linux/debugfs.h>
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#include <linux/of.h>
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#include <linux/of_irq.h>
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#include <linux/vmalloc.h>
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#include <linux/pgtable.h>
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#include <linux/static_call.h>
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#include <linux/uaccess.h>
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#include <asm/interrupt.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/cache.h>
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#include <asm/ptrace.h>
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#include <asm/machdep.h>
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#include <asm/udbg.h>
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#include <asm/smp.h>
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#include <asm/hw_irq.h>
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#include <asm/softirq_stack.h>
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#include <asm/ppc_asm.h>
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#define CREATE_TRACE_POINTS
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#include <asm/trace.h>
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#include <asm/cpu_has_feature.h>
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DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);
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EXPORT_PER_CPU_SYMBOL(irq_stat);
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#ifdef CONFIG_PPC32
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atomic_t ppc_n_lost_interrupts;
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#ifdef CONFIG_TAU_INT
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extern int tau_initialized;
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u32 tau_interrupts(unsigned long cpu);
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#endif
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#endif /* CONFIG_PPC32 */
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int arch_show_interrupts(struct seq_file *p, int prec)
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{
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int j;
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#if defined(CONFIG_PPC32) && defined(CONFIG_TAU_INT)
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if (tau_initialized) {
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seq_printf(p, "%*s: ", prec, "TAU");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", tau_interrupts(j));
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seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n");
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}
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#endif /* CONFIG_PPC32 && CONFIG_TAU_INT */
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seq_printf(p, "%*s: ", prec, "LOC");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", per_cpu(irq_stat, j).timer_irqs_event);
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seq_printf(p, " Local timer interrupts for timer event device\n");
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seq_printf(p, "%*s: ", prec, "BCT");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", per_cpu(irq_stat, j).broadcast_irqs_event);
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seq_printf(p, " Broadcast timer interrupts for timer event device\n");
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seq_printf(p, "%*s: ", prec, "LOC");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", per_cpu(irq_stat, j).timer_irqs_others);
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seq_printf(p, " Local timer interrupts for others\n");
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seq_printf(p, "%*s: ", prec, "SPU");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", per_cpu(irq_stat, j).spurious_irqs);
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seq_printf(p, " Spurious interrupts\n");
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seq_printf(p, "%*s: ", prec, "PMI");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", per_cpu(irq_stat, j).pmu_irqs);
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seq_printf(p, " Performance monitoring interrupts\n");
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seq_printf(p, "%*s: ", prec, "MCE");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", per_cpu(irq_stat, j).mce_exceptions);
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seq_printf(p, " Machine check exceptions\n");
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#ifdef CONFIG_PPC_BOOK3S_64
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if (cpu_has_feature(CPU_FTR_HVMODE)) {
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seq_printf(p, "%*s: ", prec, "HMI");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", paca_ptrs[j]->hmi_irqs);
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seq_printf(p, " Hypervisor Maintenance Interrupts\n");
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}
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#endif
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seq_printf(p, "%*s: ", prec, "NMI");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", per_cpu(irq_stat, j).sreset_irqs);
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seq_printf(p, " System Reset interrupts\n");
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#ifdef CONFIG_PPC_WATCHDOG
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seq_printf(p, "%*s: ", prec, "WDG");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", per_cpu(irq_stat, j).soft_nmi_irqs);
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seq_printf(p, " Watchdog soft-NMI interrupts\n");
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#endif
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#ifdef CONFIG_PPC_DOORBELL
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if (cpu_has_feature(CPU_FTR_DBELL)) {
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seq_printf(p, "%*s: ", prec, "DBL");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", per_cpu(irq_stat, j).doorbell_irqs);
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seq_printf(p, " Doorbell interrupts\n");
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}
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#endif
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return 0;
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}
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/*
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* /proc/stat helpers
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*/
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u64 arch_irq_stat_cpu(unsigned int cpu)
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{
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u64 sum = per_cpu(irq_stat, cpu).timer_irqs_event;
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sum += per_cpu(irq_stat, cpu).broadcast_irqs_event;
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sum += per_cpu(irq_stat, cpu).pmu_irqs;
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sum += per_cpu(irq_stat, cpu).mce_exceptions;
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sum += per_cpu(irq_stat, cpu).spurious_irqs;
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sum += per_cpu(irq_stat, cpu).timer_irqs_others;
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#ifdef CONFIG_PPC_BOOK3S_64
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sum += paca_ptrs[cpu]->hmi_irqs;
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#endif
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sum += per_cpu(irq_stat, cpu).sreset_irqs;
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#ifdef CONFIG_PPC_WATCHDOG
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sum += per_cpu(irq_stat, cpu).soft_nmi_irqs;
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#endif
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#ifdef CONFIG_PPC_DOORBELL
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sum += per_cpu(irq_stat, cpu).doorbell_irqs;
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#endif
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return sum;
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}
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static inline void check_stack_overflow(unsigned long sp)
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{
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if (!IS_ENABLED(CONFIG_DEBUG_STACKOVERFLOW))
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return;
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sp &= THREAD_SIZE - 1;
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/* check for stack overflow: is there less than 1/4th free? */
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if (unlikely(sp < THREAD_SIZE / 4)) {
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pr_err("do_IRQ: stack overflow: %ld\n", sp);
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dump_stack();
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}
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}
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#ifdef CONFIG_SOFTIRQ_ON_OWN_STACK
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static __always_inline void call_do_softirq(const void *sp)
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{
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/* Temporarily switch r1 to sp, call __do_softirq() then restore r1. */
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asm volatile (
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PPC_STLU " %%r1, %[offset](%[sp]) ;"
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"mr %%r1, %[sp] ;"
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"bl %[callee] ;"
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PPC_LL " %%r1, 0(%%r1) ;"
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: // Outputs
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: // Inputs
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[sp] "b" (sp), [offset] "i" (THREAD_SIZE - STACK_FRAME_MIN_SIZE),
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[callee] "i" (__do_softirq)
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: // Clobbers
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"lr", "xer", "ctr", "memory", "cr0", "cr1", "cr5", "cr6",
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"cr7", "r0", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10",
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"r11", "r12"
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);
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}
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#endif
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DEFINE_STATIC_CALL_RET0(ppc_get_irq, *ppc_md.get_irq);
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static void __do_irq(struct pt_regs *regs, unsigned long oldsp)
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{
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unsigned int irq;
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trace_irq_entry(regs);
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check_stack_overflow(oldsp);
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/*
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* Query the platform PIC for the interrupt & ack it.
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*
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* This will typically lower the interrupt line to the CPU
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*/
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irq = static_call(ppc_get_irq)();
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/* We can hard enable interrupts now to allow perf interrupts */
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if (should_hard_irq_enable(regs))
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do_hard_irq_enable();
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/* And finally process it */
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if (unlikely(!irq))
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__this_cpu_inc(irq_stat.spurious_irqs);
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else
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generic_handle_irq(irq);
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trace_irq_exit(regs);
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}
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static __always_inline void call_do_irq(struct pt_regs *regs, void *sp)
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{
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register unsigned long r3 asm("r3") = (unsigned long)regs;
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/* Temporarily switch r1 to sp, call __do_irq() then restore r1. */
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asm volatile (
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PPC_STLU " %%r1, %[offset](%[sp]) ;"
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"mr %%r4, %%r1 ;"
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"mr %%r1, %[sp] ;"
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"bl %[callee] ;"
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PPC_LL " %%r1, 0(%%r1) ;"
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: // Outputs
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"+r" (r3)
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: // Inputs
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[sp] "b" (sp), [offset] "i" (THREAD_SIZE - STACK_FRAME_MIN_SIZE),
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[callee] "i" (__do_irq)
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: // Clobbers
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"lr", "xer", "ctr", "memory", "cr0", "cr1", "cr5", "cr6",
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"cr7", "r0", "r4", "r5", "r6", "r7", "r8", "r9", "r10",
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"r11", "r12"
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);
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}
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void __do_IRQ(struct pt_regs *regs)
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{
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struct pt_regs *old_regs = set_irq_regs(regs);
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void *cursp, *irqsp, *sirqsp;
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/* Switch to the irq stack to handle this */
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cursp = (void *)(current_stack_pointer & ~(THREAD_SIZE - 1));
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irqsp = hardirq_ctx[raw_smp_processor_id()];
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sirqsp = softirq_ctx[raw_smp_processor_id()];
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/* Already there ? If not switch stack and call */
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if (unlikely(cursp == irqsp || cursp == sirqsp))
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__do_irq(regs, current_stack_pointer);
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else
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call_do_irq(regs, irqsp);
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set_irq_regs(old_regs);
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}
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DEFINE_INTERRUPT_HANDLER_ASYNC(do_IRQ)
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{
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__do_IRQ(regs);
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}
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static void *__init alloc_vm_stack(void)
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{
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return __vmalloc_node(THREAD_SIZE, THREAD_ALIGN, THREADINFO_GFP,
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NUMA_NO_NODE, (void *)_RET_IP_);
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}
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static void __init vmap_irqstack_init(void)
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{
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int i;
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for_each_possible_cpu(i) {
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softirq_ctx[i] = alloc_vm_stack();
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hardirq_ctx[i] = alloc_vm_stack();
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}
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}
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void __init init_IRQ(void)
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{
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if (IS_ENABLED(CONFIG_VMAP_STACK))
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vmap_irqstack_init();
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if (ppc_md.init_IRQ)
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ppc_md.init_IRQ();
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if (!WARN_ON(!ppc_md.get_irq))
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static_call_update(ppc_get_irq, ppc_md.get_irq);
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}
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#ifdef CONFIG_BOOKE_OR_40x
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void *critirq_ctx[NR_CPUS] __read_mostly;
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void *dbgirq_ctx[NR_CPUS] __read_mostly;
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void *mcheckirq_ctx[NR_CPUS] __read_mostly;
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#endif
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void *softirq_ctx[NR_CPUS] __read_mostly;
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void *hardirq_ctx[NR_CPUS] __read_mostly;
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#ifdef CONFIG_SOFTIRQ_ON_OWN_STACK
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void do_softirq_own_stack(void)
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{
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call_do_softirq(softirq_ctx[smp_processor_id()]);
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}
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#endif
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irq_hw_number_t virq_to_hw(unsigned int virq)
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{
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struct irq_data *irq_data = irq_get_irq_data(virq);
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return WARN_ON(!irq_data) ? 0 : irq_data->hwirq;
|
||
|
|
}
|
||
|
|
EXPORT_SYMBOL_GPL(virq_to_hw);
|
||
|
|
|
||
|
|
#ifdef CONFIG_SMP
|
||
|
|
int irq_choose_cpu(const struct cpumask *mask)
|
||
|
|
{
|
||
|
|
int cpuid;
|
||
|
|
|
||
|
|
if (cpumask_equal(mask, cpu_online_mask)) {
|
||
|
|
static int irq_rover;
|
||
|
|
static DEFINE_RAW_SPINLOCK(irq_rover_lock);
|
||
|
|
unsigned long flags;
|
||
|
|
|
||
|
|
/* Round-robin distribution... */
|
||
|
|
do_round_robin:
|
||
|
|
raw_spin_lock_irqsave(&irq_rover_lock, flags);
|
||
|
|
|
||
|
|
irq_rover = cpumask_next(irq_rover, cpu_online_mask);
|
||
|
|
if (irq_rover >= nr_cpu_ids)
|
||
|
|
irq_rover = cpumask_first(cpu_online_mask);
|
||
|
|
|
||
|
|
cpuid = irq_rover;
|
||
|
|
|
||
|
|
raw_spin_unlock_irqrestore(&irq_rover_lock, flags);
|
||
|
|
} else {
|
||
|
|
cpuid = cpumask_first_and(mask, cpu_online_mask);
|
||
|
|
if (cpuid >= nr_cpu_ids)
|
||
|
|
goto do_round_robin;
|
||
|
|
}
|
||
|
|
|
||
|
|
return get_hard_smp_processor_id(cpuid);
|
||
|
|
}
|
||
|
|
#else
|
||
|
|
int irq_choose_cpu(const struct cpumask *mask)
|
||
|
|
{
|
||
|
|
return hard_smp_processor_id();
|
||
|
|
}
|
||
|
|
#endif
|