133 lines
2.8 KiB
C
133 lines
2.8 KiB
C
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Based on MPC8560 ADS and arch/ppc tqm85xx ports
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*
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* Maintained by Kumar Gala (see MAINTAINERS for contact information)
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*
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* Copyright 2008 Freescale Semiconductor Inc.
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*
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* Copyright (c) 2005-2006 DENX Software Engineering
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* Stefan Roese <sr@denx.de>
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*
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* Based on original work by
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* Kumar Gala <kumar.gala@freescale.com>
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* Copyright 2004 Freescale Semiconductor Inc.
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*/
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/kdev_t.h>
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#include <linux/delay.h>
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#include <linux/seq_file.h>
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#include <linux/of_platform.h>
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#include <asm/time.h>
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#include <asm/machdep.h>
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#include <asm/pci-bridge.h>
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#include <asm/mpic.h>
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#include <mm/mmu_decl.h>
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#include <asm/udbg.h>
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#include <sysdev/fsl_soc.h>
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#include <sysdev/fsl_pci.h>
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#include "mpc85xx.h"
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#ifdef CONFIG_CPM2
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#include <asm/cpm2.h>
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#endif /* CONFIG_CPM2 */
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static void __init tqm85xx_pic_init(void)
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{
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struct mpic *mpic = mpic_alloc(NULL, 0,
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MPIC_BIG_ENDIAN,
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0, 256, " OpenPIC ");
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BUG_ON(mpic == NULL);
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mpic_init(mpic);
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mpc85xx_cpm2_pic_init();
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}
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/*
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* Setup the architecture
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*/
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static void __init tqm85xx_setup_arch(void)
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{
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if (ppc_md.progress)
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ppc_md.progress("tqm85xx_setup_arch()", 0);
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#ifdef CONFIG_CPM2
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cpm2_reset();
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#endif
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fsl_pci_assign_primary();
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}
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static void tqm85xx_show_cpuinfo(struct seq_file *m)
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{
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uint pvid, svid, phid1;
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pvid = mfspr(SPRN_PVR);
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svid = mfspr(SPRN_SVR);
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seq_printf(m, "Vendor\t\t: TQ Components\n");
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seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
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seq_printf(m, "SVR\t\t: 0x%x\n", svid);
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/* Display cpu Pll setting */
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phid1 = mfspr(SPRN_HID1);
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seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
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}
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static void tqm85xx_ti1520_fixup(struct pci_dev *pdev)
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{
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unsigned int val;
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/* Do not do the fixup on other platforms! */
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if (!machine_is(tqm85xx))
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return;
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dev_info(&pdev->dev, "Using TI 1520 fixup on TQM85xx\n");
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/*
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* Enable P2CCLK bit in system control register
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* to enable CLOCK output to power chip
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*/
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pci_read_config_dword(pdev, 0x80, &val);
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pci_write_config_dword(pdev, 0x80, val | (1 << 27));
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520,
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tqm85xx_ti1520_fixup);
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machine_arch_initcall(tqm85xx, mpc85xx_common_publish_devices);
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static const char * const board[] __initconst = {
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"tqc,tqm8540",
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"tqc,tqm8541",
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"tqc,tqm8548",
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"tqc,tqm8555",
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"tqc,tqm8560",
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NULL
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};
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/*
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* Called very early, device-tree isn't unflattened
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*/
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static int __init tqm85xx_probe(void)
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{
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return of_device_compatible_match(of_root, board);
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}
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define_machine(tqm85xx) {
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.name = "TQM85xx",
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.probe = tqm85xx_probe,
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.setup_arch = tqm85xx_setup_arch,
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.init_IRQ = tqm85xx_pic_init,
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.show_cpuinfo = tqm85xx_show_cpuinfo,
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.get_irq = mpic_get_irq,
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.calibrate_decr = generic_calibrate_decr,
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.progress = udbg_progress,
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};
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