126 lines
3.7 KiB
ArmAsm
126 lines
3.7 KiB
ArmAsm
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2021 Western Digital Corporation or its affiliates.
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* Copyright (c) 2022 Ventana Micro Systems Inc.
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*/
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#include <linux/linkage.h>
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#include <asm/asm.h>
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#include <asm/asm-offsets.h>
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#include <asm/csr.h>
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#include <asm/xip_fixup.h>
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.text
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.altmacro
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.option norelax
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ENTRY(__cpu_suspend_enter)
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/* Save registers (except A0 and T0-T6) */
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REG_S ra, (SUSPEND_CONTEXT_REGS + PT_RA)(a0)
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REG_S sp, (SUSPEND_CONTEXT_REGS + PT_SP)(a0)
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REG_S gp, (SUSPEND_CONTEXT_REGS + PT_GP)(a0)
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REG_S tp, (SUSPEND_CONTEXT_REGS + PT_TP)(a0)
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REG_S s0, (SUSPEND_CONTEXT_REGS + PT_S0)(a0)
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REG_S s1, (SUSPEND_CONTEXT_REGS + PT_S1)(a0)
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REG_S a1, (SUSPEND_CONTEXT_REGS + PT_A1)(a0)
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REG_S a2, (SUSPEND_CONTEXT_REGS + PT_A2)(a0)
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REG_S a3, (SUSPEND_CONTEXT_REGS + PT_A3)(a0)
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REG_S a4, (SUSPEND_CONTEXT_REGS + PT_A4)(a0)
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REG_S a5, (SUSPEND_CONTEXT_REGS + PT_A5)(a0)
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REG_S a6, (SUSPEND_CONTEXT_REGS + PT_A6)(a0)
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REG_S a7, (SUSPEND_CONTEXT_REGS + PT_A7)(a0)
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REG_S s2, (SUSPEND_CONTEXT_REGS + PT_S2)(a0)
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REG_S s3, (SUSPEND_CONTEXT_REGS + PT_S3)(a0)
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REG_S s4, (SUSPEND_CONTEXT_REGS + PT_S4)(a0)
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REG_S s5, (SUSPEND_CONTEXT_REGS + PT_S5)(a0)
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REG_S s6, (SUSPEND_CONTEXT_REGS + PT_S6)(a0)
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REG_S s7, (SUSPEND_CONTEXT_REGS + PT_S7)(a0)
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REG_S s8, (SUSPEND_CONTEXT_REGS + PT_S8)(a0)
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REG_S s9, (SUSPEND_CONTEXT_REGS + PT_S9)(a0)
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REG_S s10, (SUSPEND_CONTEXT_REGS + PT_S10)(a0)
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REG_S s11, (SUSPEND_CONTEXT_REGS + PT_S11)(a0)
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/* Save CSRs */
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csrr t0, CSR_EPC
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REG_S t0, (SUSPEND_CONTEXT_REGS + PT_EPC)(a0)
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csrr t0, CSR_STATUS
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REG_S t0, (SUSPEND_CONTEXT_REGS + PT_STATUS)(a0)
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csrr t0, CSR_TVAL
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REG_S t0, (SUSPEND_CONTEXT_REGS + PT_BADADDR)(a0)
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csrr t0, CSR_CAUSE
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REG_S t0, (SUSPEND_CONTEXT_REGS + PT_CAUSE)(a0)
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/* Return non-zero value */
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li a0, 1
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/* Return to C code */
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ret
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END(__cpu_suspend_enter)
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ENTRY(__cpu_resume_enter)
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/* Load the global pointer */
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.option push
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.option norelax
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la gp, __global_pointer$
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.option pop
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#ifdef CONFIG_MMU
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/* Save A0 and A1 */
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add t0, a0, zero
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add t1, a1, zero
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/* Enable MMU */
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la a0, swapper_pg_dir
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XIP_FIXUP_OFFSET a0
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call relocate_enable_mmu
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/* Restore A0 and A1 */
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add a0, t0, zero
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add a1, t1, zero
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#endif
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/* Make A0 point to suspend context */
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add a0, a1, zero
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/* Restore CSRs */
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REG_L t0, (SUSPEND_CONTEXT_REGS + PT_EPC)(a0)
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csrw CSR_EPC, t0
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REG_L t0, (SUSPEND_CONTEXT_REGS + PT_STATUS)(a0)
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csrw CSR_STATUS, t0
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REG_L t0, (SUSPEND_CONTEXT_REGS + PT_BADADDR)(a0)
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csrw CSR_TVAL, t0
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REG_L t0, (SUSPEND_CONTEXT_REGS + PT_CAUSE)(a0)
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csrw CSR_CAUSE, t0
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/* Restore registers (except A0 and T0-T6) */
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REG_L ra, (SUSPEND_CONTEXT_REGS + PT_RA)(a0)
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REG_L sp, (SUSPEND_CONTEXT_REGS + PT_SP)(a0)
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REG_L gp, (SUSPEND_CONTEXT_REGS + PT_GP)(a0)
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REG_L tp, (SUSPEND_CONTEXT_REGS + PT_TP)(a0)
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REG_L s0, (SUSPEND_CONTEXT_REGS + PT_S0)(a0)
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REG_L s1, (SUSPEND_CONTEXT_REGS + PT_S1)(a0)
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REG_L a1, (SUSPEND_CONTEXT_REGS + PT_A1)(a0)
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REG_L a2, (SUSPEND_CONTEXT_REGS + PT_A2)(a0)
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REG_L a3, (SUSPEND_CONTEXT_REGS + PT_A3)(a0)
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REG_L a4, (SUSPEND_CONTEXT_REGS + PT_A4)(a0)
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REG_L a5, (SUSPEND_CONTEXT_REGS + PT_A5)(a0)
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REG_L a6, (SUSPEND_CONTEXT_REGS + PT_A6)(a0)
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REG_L a7, (SUSPEND_CONTEXT_REGS + PT_A7)(a0)
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REG_L s2, (SUSPEND_CONTEXT_REGS + PT_S2)(a0)
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REG_L s3, (SUSPEND_CONTEXT_REGS + PT_S3)(a0)
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REG_L s4, (SUSPEND_CONTEXT_REGS + PT_S4)(a0)
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REG_L s5, (SUSPEND_CONTEXT_REGS + PT_S5)(a0)
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REG_L s6, (SUSPEND_CONTEXT_REGS + PT_S6)(a0)
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REG_L s7, (SUSPEND_CONTEXT_REGS + PT_S7)(a0)
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REG_L s8, (SUSPEND_CONTEXT_REGS + PT_S8)(a0)
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REG_L s9, (SUSPEND_CONTEXT_REGS + PT_S9)(a0)
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REG_L s10, (SUSPEND_CONTEXT_REGS + PT_S10)(a0)
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REG_L s11, (SUSPEND_CONTEXT_REGS + PT_S11)(a0)
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/* Return zero value */
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add a0, zero, zero
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/* Return to C code */
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ret
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END(__cpu_resume_enter)
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