45 lines
1.1 KiB
C
45 lines
1.1 KiB
C
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Intel MID specific setup code
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*
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* (C) Copyright 2009, 2021 Intel Corporation
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*/
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#ifndef _ASM_X86_INTEL_MID_H
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#define _ASM_X86_INTEL_MID_H
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#include <linux/pci.h>
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extern int intel_mid_pci_init(void);
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extern int intel_mid_pci_set_power_state(struct pci_dev *pdev, pci_power_t state);
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extern pci_power_t intel_mid_pci_get_power_state(struct pci_dev *pdev);
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extern void intel_mid_pwr_power_off(void);
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#define INTEL_MID_PWR_LSS_OFFSET 4
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#define INTEL_MID_PWR_LSS_TYPE (1 << 7)
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extern int intel_mid_pwr_get_lss_id(struct pci_dev *pdev);
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#ifdef CONFIG_X86_INTEL_MID
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extern void intel_scu_devices_create(void);
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extern void intel_scu_devices_destroy(void);
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#else /* !CONFIG_X86_INTEL_MID */
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static inline void intel_scu_devices_create(void) { }
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static inline void intel_scu_devices_destroy(void) { }
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#endif /* !CONFIG_X86_INTEL_MID */
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/* Bus Select SoC Fuse value */
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#define BSEL_SOC_FUSE_MASK 0x7
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/* FSB 133MHz */
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#define BSEL_SOC_FUSE_001 0x1
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/* FSB 100MHz */
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#define BSEL_SOC_FUSE_101 0x5
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/* FSB 83MHz */
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#define BSEL_SOC_FUSE_111 0x7
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#endif /* _ASM_X86_INTEL_MID_H */
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