563 lines
13 KiB
C
563 lines
13 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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#ifndef _ASM_X86_KVM_H
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#define _ASM_X86_KVM_H
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/*
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* KVM x86 specific structures and definitions
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*
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*/
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#include <linux/types.h>
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#include <linux/ioctl.h>
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#include <linux/stddef.h>
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#define KVM_PIO_PAGE_OFFSET 1
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#define KVM_COALESCED_MMIO_PAGE_OFFSET 2
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#define KVM_DIRTY_LOG_PAGE_OFFSET 64
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#define DE_VECTOR 0
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#define DB_VECTOR 1
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#define BP_VECTOR 3
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#define OF_VECTOR 4
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#define BR_VECTOR 5
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#define UD_VECTOR 6
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#define NM_VECTOR 7
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#define DF_VECTOR 8
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#define TS_VECTOR 10
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#define NP_VECTOR 11
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#define SS_VECTOR 12
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#define GP_VECTOR 13
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#define PF_VECTOR 14
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#define MF_VECTOR 16
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#define AC_VECTOR 17
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#define MC_VECTOR 18
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#define XM_VECTOR 19
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#define VE_VECTOR 20
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/* Select x86 specific features in <linux/kvm.h> */
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#define __KVM_HAVE_PIT
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#define __KVM_HAVE_IOAPIC
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#define __KVM_HAVE_IRQ_LINE
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#define __KVM_HAVE_MSI
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#define __KVM_HAVE_USER_NMI
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#define __KVM_HAVE_GUEST_DEBUG
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#define __KVM_HAVE_MSIX
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#define __KVM_HAVE_MCE
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#define __KVM_HAVE_PIT_STATE2
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#define __KVM_HAVE_XEN_HVM
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#define __KVM_HAVE_VCPU_EVENTS
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#define __KVM_HAVE_DEBUGREGS
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#define __KVM_HAVE_XSAVE
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#define __KVM_HAVE_XCRS
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#define __KVM_HAVE_READONLY_MEM
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/* Architectural interrupt line count. */
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#define KVM_NR_INTERRUPTS 256
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/* for KVM_GET_IRQCHIP and KVM_SET_IRQCHIP */
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struct kvm_pic_state {
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__u8 last_irr; /* edge detection */
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__u8 irr; /* interrupt request register */
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__u8 imr; /* interrupt mask register */
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__u8 isr; /* interrupt service register */
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__u8 priority_add; /* highest irq priority */
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__u8 irq_base;
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__u8 read_reg_select;
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__u8 poll;
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__u8 special_mask;
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__u8 init_state;
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__u8 auto_eoi;
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__u8 rotate_on_auto_eoi;
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__u8 special_fully_nested_mode;
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__u8 init4; /* true if 4 byte init */
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__u8 elcr; /* PIIX edge/trigger selection */
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__u8 elcr_mask;
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};
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#define KVM_IOAPIC_NUM_PINS 24
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struct kvm_ioapic_state {
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__u64 base_address;
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__u32 ioregsel;
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__u32 id;
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__u32 irr;
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__u32 pad;
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union {
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__u64 bits;
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struct {
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__u8 vector;
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__u8 delivery_mode:3;
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__u8 dest_mode:1;
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__u8 delivery_status:1;
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__u8 polarity:1;
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__u8 remote_irr:1;
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__u8 trig_mode:1;
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__u8 mask:1;
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__u8 reserve:7;
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__u8 reserved[4];
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__u8 dest_id;
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} fields;
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} redirtbl[KVM_IOAPIC_NUM_PINS];
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};
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#define KVM_IRQCHIP_PIC_MASTER 0
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#define KVM_IRQCHIP_PIC_SLAVE 1
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#define KVM_IRQCHIP_IOAPIC 2
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#define KVM_NR_IRQCHIPS 3
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#define KVM_RUN_X86_SMM (1 << 0)
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#define KVM_RUN_X86_BUS_LOCK (1 << 1)
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/* for KVM_GET_REGS and KVM_SET_REGS */
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struct kvm_regs {
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/* out (KVM_GET_REGS) / in (KVM_SET_REGS) */
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__u64 rax, rbx, rcx, rdx;
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__u64 rsi, rdi, rsp, rbp;
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__u64 r8, r9, r10, r11;
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__u64 r12, r13, r14, r15;
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__u64 rip, rflags;
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};
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/* for KVM_GET_LAPIC and KVM_SET_LAPIC */
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#define KVM_APIC_REG_SIZE 0x400
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struct kvm_lapic_state {
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char regs[KVM_APIC_REG_SIZE];
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};
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struct kvm_segment {
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__u64 base;
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__u32 limit;
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__u16 selector;
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__u8 type;
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__u8 present, dpl, db, s, l, g, avl;
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__u8 unusable;
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__u8 padding;
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};
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struct kvm_dtable {
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__u64 base;
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__u16 limit;
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__u16 padding[3];
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};
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/* for KVM_GET_SREGS and KVM_SET_SREGS */
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struct kvm_sregs {
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/* out (KVM_GET_SREGS) / in (KVM_SET_SREGS) */
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struct kvm_segment cs, ds, es, fs, gs, ss;
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struct kvm_segment tr, ldt;
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struct kvm_dtable gdt, idt;
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__u64 cr0, cr2, cr3, cr4, cr8;
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__u64 efer;
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__u64 apic_base;
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__u64 interrupt_bitmap[(KVM_NR_INTERRUPTS + 63) / 64];
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};
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struct kvm_sregs2 {
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/* out (KVM_GET_SREGS2) / in (KVM_SET_SREGS2) */
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struct kvm_segment cs, ds, es, fs, gs, ss;
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struct kvm_segment tr, ldt;
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struct kvm_dtable gdt, idt;
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__u64 cr0, cr2, cr3, cr4, cr8;
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__u64 efer;
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__u64 apic_base;
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__u64 flags;
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__u64 pdptrs[4];
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};
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#define KVM_SREGS2_FLAGS_PDPTRS_VALID 1
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/* for KVM_GET_FPU and KVM_SET_FPU */
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struct kvm_fpu {
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__u8 fpr[8][16];
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__u16 fcw;
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__u16 fsw;
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__u8 ftwx; /* in fxsave format */
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__u8 pad1;
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__u16 last_opcode;
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__u64 last_ip;
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__u64 last_dp;
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__u8 xmm[16][16];
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__u32 mxcsr;
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__u32 pad2;
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};
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struct kvm_msr_entry {
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__u32 index;
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__u32 reserved;
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__u64 data;
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};
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/* for KVM_GET_MSRS and KVM_SET_MSRS */
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struct kvm_msrs {
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__u32 nmsrs; /* number of msrs in entries */
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__u32 pad;
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struct kvm_msr_entry entries[];
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};
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/* for KVM_GET_MSR_INDEX_LIST */
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struct kvm_msr_list {
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__u32 nmsrs; /* number of msrs in entries */
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__u32 indices[];
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};
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/* Maximum size of any access bitmap in bytes */
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#define KVM_MSR_FILTER_MAX_BITMAP_SIZE 0x600
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/* for KVM_X86_SET_MSR_FILTER */
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struct kvm_msr_filter_range {
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#define KVM_MSR_FILTER_READ (1 << 0)
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#define KVM_MSR_FILTER_WRITE (1 << 1)
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#define KVM_MSR_FILTER_RANGE_VALID_MASK (KVM_MSR_FILTER_READ | \
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KVM_MSR_FILTER_WRITE)
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__u32 flags;
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__u32 nmsrs; /* number of msrs in bitmap */
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__u32 base; /* MSR index the bitmap starts at */
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__u8 *bitmap; /* a 1 bit allows the operations in flags, 0 denies */
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};
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#define KVM_MSR_FILTER_MAX_RANGES 16
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struct kvm_msr_filter {
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#ifndef __KERNEL__
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#define KVM_MSR_FILTER_DEFAULT_ALLOW (0 << 0)
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#endif
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#define KVM_MSR_FILTER_DEFAULT_DENY (1 << 0)
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#define KVM_MSR_FILTER_VALID_MASK (KVM_MSR_FILTER_DEFAULT_DENY)
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__u32 flags;
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struct kvm_msr_filter_range ranges[KVM_MSR_FILTER_MAX_RANGES];
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};
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struct kvm_cpuid_entry {
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__u32 function;
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__u32 eax;
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__u32 ebx;
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__u32 ecx;
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__u32 edx;
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__u32 padding;
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};
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/* for KVM_SET_CPUID */
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struct kvm_cpuid {
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__u32 nent;
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__u32 padding;
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struct kvm_cpuid_entry entries[];
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};
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struct kvm_cpuid_entry2 {
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__u32 function;
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__u32 index;
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__u32 flags;
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__u32 eax;
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__u32 ebx;
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__u32 ecx;
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__u32 edx;
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__u32 padding[3];
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};
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#define KVM_CPUID_FLAG_SIGNIFCANT_INDEX (1 << 0)
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#define KVM_CPUID_FLAG_STATEFUL_FUNC (1 << 1)
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#define KVM_CPUID_FLAG_STATE_READ_NEXT (1 << 2)
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/* for KVM_SET_CPUID2 */
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struct kvm_cpuid2 {
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__u32 nent;
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__u32 padding;
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struct kvm_cpuid_entry2 entries[];
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};
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/* for KVM_GET_PIT and KVM_SET_PIT */
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struct kvm_pit_channel_state {
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__u32 count; /* can be 65536 */
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__u16 latched_count;
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__u8 count_latched;
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__u8 status_latched;
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__u8 status;
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__u8 read_state;
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__u8 write_state;
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__u8 write_latch;
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__u8 rw_mode;
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__u8 mode;
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__u8 bcd;
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__u8 gate;
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__s64 count_load_time;
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};
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struct kvm_debug_exit_arch {
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__u32 exception;
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__u32 pad;
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__u64 pc;
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__u64 dr6;
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__u64 dr7;
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};
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#define KVM_GUESTDBG_USE_SW_BP 0x00010000
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#define KVM_GUESTDBG_USE_HW_BP 0x00020000
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#define KVM_GUESTDBG_INJECT_DB 0x00040000
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#define KVM_GUESTDBG_INJECT_BP 0x00080000
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#define KVM_GUESTDBG_BLOCKIRQ 0x00100000
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/* for KVM_SET_GUEST_DEBUG */
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struct kvm_guest_debug_arch {
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__u64 debugreg[8];
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};
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struct kvm_pit_state {
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struct kvm_pit_channel_state channels[3];
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};
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#define KVM_PIT_FLAGS_HPET_LEGACY 0x00000001
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#define KVM_PIT_FLAGS_SPEAKER_DATA_ON 0x00000002
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struct kvm_pit_state2 {
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struct kvm_pit_channel_state channels[3];
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__u32 flags;
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__u32 reserved[9];
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};
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struct kvm_reinject_control {
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__u8 pit_reinject;
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__u8 reserved[31];
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};
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/* When set in flags, include corresponding fields on KVM_SET_VCPU_EVENTS */
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#define KVM_VCPUEVENT_VALID_NMI_PENDING 0x00000001
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#define KVM_VCPUEVENT_VALID_SIPI_VECTOR 0x00000002
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#define KVM_VCPUEVENT_VALID_SHADOW 0x00000004
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#define KVM_VCPUEVENT_VALID_SMM 0x00000008
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#define KVM_VCPUEVENT_VALID_PAYLOAD 0x00000010
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#define KVM_VCPUEVENT_VALID_TRIPLE_FAULT 0x00000020
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/* Interrupt shadow states */
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#define KVM_X86_SHADOW_INT_MOV_SS 0x01
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#define KVM_X86_SHADOW_INT_STI 0x02
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/* for KVM_GET/SET_VCPU_EVENTS */
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struct kvm_vcpu_events {
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struct {
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__u8 injected;
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__u8 nr;
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__u8 has_error_code;
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__u8 pending;
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__u32 error_code;
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} exception;
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struct {
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__u8 injected;
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__u8 nr;
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__u8 soft;
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__u8 shadow;
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} interrupt;
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struct {
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__u8 injected;
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__u8 pending;
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__u8 masked;
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__u8 pad;
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} nmi;
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__u32 sipi_vector;
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__u32 flags;
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struct {
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__u8 smm;
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__u8 pending;
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__u8 smm_inside_nmi;
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__u8 latched_init;
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} smi;
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struct {
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__u8 pending;
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} triple_fault;
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__u8 reserved[26];
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__u8 exception_has_payload;
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__u64 exception_payload;
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};
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/* for KVM_GET/SET_DEBUGREGS */
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|
|
struct kvm_debugregs {
|
||
|
|
__u64 db[4];
|
||
|
|
__u64 dr6;
|
||
|
|
__u64 dr7;
|
||
|
|
__u64 flags;
|
||
|
|
__u64 reserved[9];
|
||
|
|
};
|
||
|
|
|
||
|
|
/* for KVM_CAP_XSAVE and KVM_CAP_XSAVE2 */
|
||
|
|
struct kvm_xsave {
|
||
|
|
/*
|
||
|
|
* KVM_GET_XSAVE2 and KVM_SET_XSAVE write and read as many bytes
|
||
|
|
* as are returned by KVM_CHECK_EXTENSION(KVM_CAP_XSAVE2)
|
||
|
|
* respectively, when invoked on the vm file descriptor.
|
||
|
|
*
|
||
|
|
* The size value returned by KVM_CHECK_EXTENSION(KVM_CAP_XSAVE2)
|
||
|
|
* will always be at least 4096. Currently, it is only greater
|
||
|
|
* than 4096 if a dynamic feature has been enabled with
|
||
|
|
* ``arch_prctl()``, but this may change in the future.
|
||
|
|
*
|
||
|
|
* The offsets of the state save areas in struct kvm_xsave follow
|
||
|
|
* the contents of CPUID leaf 0xD on the host.
|
||
|
|
*/
|
||
|
|
__u32 region[1024];
|
||
|
|
__u32 extra[];
|
||
|
|
};
|
||
|
|
|
||
|
|
#define KVM_MAX_XCRS 16
|
||
|
|
|
||
|
|
struct kvm_xcr {
|
||
|
|
__u32 xcr;
|
||
|
|
__u32 reserved;
|
||
|
|
__u64 value;
|
||
|
|
};
|
||
|
|
|
||
|
|
struct kvm_xcrs {
|
||
|
|
__u32 nr_xcrs;
|
||
|
|
__u32 flags;
|
||
|
|
struct kvm_xcr xcrs[KVM_MAX_XCRS];
|
||
|
|
__u64 padding[16];
|
||
|
|
};
|
||
|
|
|
||
|
|
#define KVM_SYNC_X86_REGS (1UL << 0)
|
||
|
|
#define KVM_SYNC_X86_SREGS (1UL << 1)
|
||
|
|
#define KVM_SYNC_X86_EVENTS (1UL << 2)
|
||
|
|
|
||
|
|
#define KVM_SYNC_X86_VALID_FIELDS \
|
||
|
|
(KVM_SYNC_X86_REGS| \
|
||
|
|
KVM_SYNC_X86_SREGS| \
|
||
|
|
KVM_SYNC_X86_EVENTS)
|
||
|
|
|
||
|
|
/* kvm_sync_regs struct included by kvm_run struct */
|
||
|
|
struct kvm_sync_regs {
|
||
|
|
/* Members of this structure are potentially malicious.
|
||
|
|
* Care must be taken by code reading, esp. interpreting,
|
||
|
|
* data fields from them inside KVM to prevent TOCTOU and
|
||
|
|
* double-fetch types of vulnerabilities.
|
||
|
|
*/
|
||
|
|
struct kvm_regs regs;
|
||
|
|
struct kvm_sregs sregs;
|
||
|
|
struct kvm_vcpu_events events;
|
||
|
|
};
|
||
|
|
|
||
|
|
#define KVM_X86_QUIRK_LINT0_REENABLED (1 << 0)
|
||
|
|
#define KVM_X86_QUIRK_CD_NW_CLEARED (1 << 1)
|
||
|
|
#define KVM_X86_QUIRK_LAPIC_MMIO_HOLE (1 << 2)
|
||
|
|
#define KVM_X86_QUIRK_OUT_7E_INC_RIP (1 << 3)
|
||
|
|
#define KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT (1 << 4)
|
||
|
|
#define KVM_X86_QUIRK_FIX_HYPERCALL_INSN (1 << 5)
|
||
|
|
#define KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS (1 << 6)
|
||
|
|
|
||
|
|
#define KVM_STATE_NESTED_FORMAT_VMX 0
|
||
|
|
#define KVM_STATE_NESTED_FORMAT_SVM 1
|
||
|
|
|
||
|
|
#define KVM_STATE_NESTED_GUEST_MODE 0x00000001
|
||
|
|
#define KVM_STATE_NESTED_RUN_PENDING 0x00000002
|
||
|
|
#define KVM_STATE_NESTED_EVMCS 0x00000004
|
||
|
|
#define KVM_STATE_NESTED_MTF_PENDING 0x00000008
|
||
|
|
#define KVM_STATE_NESTED_GIF_SET 0x00000100
|
||
|
|
|
||
|
|
#define KVM_STATE_NESTED_SMM_GUEST_MODE 0x00000001
|
||
|
|
#define KVM_STATE_NESTED_SMM_VMXON 0x00000002
|
||
|
|
|
||
|
|
#define KVM_STATE_NESTED_VMX_VMCS_SIZE 0x1000
|
||
|
|
|
||
|
|
#define KVM_STATE_NESTED_SVM_VMCB_SIZE 0x1000
|
||
|
|
|
||
|
|
#define KVM_STATE_VMX_PREEMPTION_TIMER_DEADLINE 0x00000001
|
||
|
|
|
||
|
|
/* attributes for system fd (group 0) */
|
||
|
|
#define KVM_X86_XCOMP_GUEST_SUPP 0
|
||
|
|
|
||
|
|
struct kvm_vmx_nested_state_data {
|
||
|
|
__u8 vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];
|
||
|
|
__u8 shadow_vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];
|
||
|
|
};
|
||
|
|
|
||
|
|
struct kvm_vmx_nested_state_hdr {
|
||
|
|
__u64 vmxon_pa;
|
||
|
|
__u64 vmcs12_pa;
|
||
|
|
|
||
|
|
struct {
|
||
|
|
__u16 flags;
|
||
|
|
} smm;
|
||
|
|
|
||
|
|
__u16 pad;
|
||
|
|
|
||
|
|
__u32 flags;
|
||
|
|
__u64 preemption_timer_deadline;
|
||
|
|
};
|
||
|
|
|
||
|
|
struct kvm_svm_nested_state_data {
|
||
|
|
/* Save area only used if KVM_STATE_NESTED_RUN_PENDING. */
|
||
|
|
__u8 vmcb12[KVM_STATE_NESTED_SVM_VMCB_SIZE];
|
||
|
|
};
|
||
|
|
|
||
|
|
struct kvm_svm_nested_state_hdr {
|
||
|
|
__u64 vmcb_pa;
|
||
|
|
};
|
||
|
|
|
||
|
|
/* for KVM_CAP_NESTED_STATE */
|
||
|
|
struct kvm_nested_state {
|
||
|
|
__u16 flags;
|
||
|
|
__u16 format;
|
||
|
|
__u32 size;
|
||
|
|
|
||
|
|
union {
|
||
|
|
struct kvm_vmx_nested_state_hdr vmx;
|
||
|
|
struct kvm_svm_nested_state_hdr svm;
|
||
|
|
|
||
|
|
/* Pad the header to 128 bytes. */
|
||
|
|
__u8 pad[120];
|
||
|
|
} hdr;
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Define data region as 0 bytes to preserve backwards-compatability
|
||
|
|
* to old definition of kvm_nested_state in order to avoid changing
|
||
|
|
* KVM_{GET,PUT}_NESTED_STATE ioctl values.
|
||
|
|
*/
|
||
|
|
union {
|
||
|
|
__DECLARE_FLEX_ARRAY(struct kvm_vmx_nested_state_data, vmx);
|
||
|
|
__DECLARE_FLEX_ARRAY(struct kvm_svm_nested_state_data, svm);
|
||
|
|
} data;
|
||
|
|
};
|
||
|
|
|
||
|
|
/* for KVM_CAP_PMU_EVENT_FILTER */
|
||
|
|
struct kvm_pmu_event_filter {
|
||
|
|
__u32 action;
|
||
|
|
__u32 nevents;
|
||
|
|
__u32 fixed_counter_bitmap;
|
||
|
|
__u32 flags;
|
||
|
|
__u32 pad[4];
|
||
|
|
__u64 events[];
|
||
|
|
};
|
||
|
|
|
||
|
|
#define KVM_PMU_EVENT_ALLOW 0
|
||
|
|
#define KVM_PMU_EVENT_DENY 1
|
||
|
|
|
||
|
|
#define KVM_PMU_EVENT_FLAG_MASKED_EVENTS BIT(0)
|
||
|
|
#define KVM_PMU_EVENT_FLAGS_VALID_MASK (KVM_PMU_EVENT_FLAG_MASKED_EVENTS)
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Masked event layout.
|
||
|
|
* Bits Description
|
||
|
|
* ---- -----------
|
||
|
|
* 7:0 event select (low bits)
|
||
|
|
* 15:8 umask match
|
||
|
|
* 31:16 unused
|
||
|
|
* 35:32 event select (high bits)
|
||
|
|
* 36:54 unused
|
||
|
|
* 55 exclude bit
|
||
|
|
* 63:56 umask mask
|
||
|
|
*/
|
||
|
|
|
||
|
|
#define KVM_PMU_ENCODE_MASKED_ENTRY(event_select, mask, match, exclude) \
|
||
|
|
(((event_select) & 0xFFULL) | (((event_select) & 0XF00ULL) << 24) | \
|
||
|
|
(((mask) & 0xFFULL) << 56) | \
|
||
|
|
(((match) & 0xFFULL) << 8) | \
|
||
|
|
((__u64)(!!(exclude)) << 55))
|
||
|
|
|
||
|
|
#define KVM_PMU_MASKED_ENTRY_EVENT_SELECT \
|
||
|
|
(GENMASK_ULL(7, 0) | GENMASK_ULL(35, 32))
|
||
|
|
#define KVM_PMU_MASKED_ENTRY_UMASK_MASK (GENMASK_ULL(63, 56))
|
||
|
|
#define KVM_PMU_MASKED_ENTRY_UMASK_MATCH (GENMASK_ULL(15, 8))
|
||
|
|
#define KVM_PMU_MASKED_ENTRY_EXCLUDE (BIT_ULL(55))
|
||
|
|
#define KVM_PMU_MASKED_ENTRY_UMASK_MASK_SHIFT (56)
|
||
|
|
|
||
|
|
/* for KVM_{GET,SET,HAS}_DEVICE_ATTR */
|
||
|
|
#define KVM_VCPU_TSC_CTRL 0 /* control group for the timestamp counter (TSC) */
|
||
|
|
#define KVM_VCPU_TSC_OFFSET 0 /* attribute for the TSC offset */
|
||
|
|
|
||
|
|
#endif /* _ASM_X86_KVM_H */
|