512 lines
12 KiB
ArmAsm
512 lines
12 KiB
ArmAsm
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* ld script for the x86 kernel
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*
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* Historic 32-bit version written by Martin Mares <mj@atrey.karlin.mff.cuni.cz>
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*
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* Modernisation, unification and other changes and fixes:
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* Copyright (C) 2007-2009 Sam Ravnborg <sam@ravnborg.org>
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*
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*
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* Don't define absolute symbols until and unless you know that symbol
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* value is should remain constant even if kernel image is relocated
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* at run time. Absolute symbols are not relocated. If symbol value should
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* change if kernel is relocated, make the symbol section relative and
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* put it inside the section definition.
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*/
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#ifdef CONFIG_X86_32
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#define LOAD_OFFSET __PAGE_OFFSET
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#else
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#define LOAD_OFFSET __START_KERNEL_map
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#endif
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#define RUNTIME_DISCARD_EXIT
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#define EMITS_PT_NOTE
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#define RO_EXCEPTION_TABLE_ALIGN 16
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#include <asm-generic/vmlinux.lds.h>
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#include <asm/asm-offsets.h>
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#include <asm/thread_info.h>
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#include <asm/page_types.h>
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#include <asm/orc_lookup.h>
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#include <asm/cache.h>
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#include <asm/boot.h>
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#undef i386 /* in case the preprocessor is a 32bit one */
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OUTPUT_FORMAT(CONFIG_OUTPUT_FORMAT)
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#ifdef CONFIG_X86_32
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OUTPUT_ARCH(i386)
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ENTRY(phys_startup_32)
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#else
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OUTPUT_ARCH(i386:x86-64)
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ENTRY(phys_startup_64)
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#endif
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jiffies = jiffies_64;
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#if defined(CONFIG_X86_64)
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/*
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* On 64-bit, align RODATA to 2MB so we retain large page mappings for
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* boundaries spanning kernel text, rodata and data sections.
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*
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* However, kernel identity mappings will have different RWX permissions
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* to the pages mapping to text and to the pages padding (which are freed) the
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* text section. Hence kernel identity mappings will be broken to smaller
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* pages. For 64-bit, kernel text and kernel identity mappings are different,
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* so we can enable protection checks as well as retain 2MB large page
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* mappings for kernel text.
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*/
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#define X86_ALIGN_RODATA_BEGIN . = ALIGN(HPAGE_SIZE);
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#define X86_ALIGN_RODATA_END \
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. = ALIGN(HPAGE_SIZE); \
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__end_rodata_hpage_align = .; \
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__end_rodata_aligned = .;
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#define ALIGN_ENTRY_TEXT_BEGIN . = ALIGN(PMD_SIZE);
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#define ALIGN_ENTRY_TEXT_END . = ALIGN(PMD_SIZE);
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/*
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* This section contains data which will be mapped as decrypted. Memory
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* encryption operates on a page basis. Make this section PMD-aligned
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* to avoid splitting the pages while mapping the section early.
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*
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* Note: We use a separate section so that only this section gets
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* decrypted to avoid exposing more than we wish.
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*/
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#define BSS_DECRYPTED \
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. = ALIGN(PMD_SIZE); \
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__start_bss_decrypted = .; \
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*(.bss..decrypted); \
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. = ALIGN(PAGE_SIZE); \
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__start_bss_decrypted_unused = .; \
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. = ALIGN(PMD_SIZE); \
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__end_bss_decrypted = .; \
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#else
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#define X86_ALIGN_RODATA_BEGIN
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#define X86_ALIGN_RODATA_END \
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. = ALIGN(PAGE_SIZE); \
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__end_rodata_aligned = .;
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#define ALIGN_ENTRY_TEXT_BEGIN
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#define ALIGN_ENTRY_TEXT_END
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#define BSS_DECRYPTED
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#endif
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PHDRS {
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text PT_LOAD FLAGS(5); /* R_E */
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data PT_LOAD FLAGS(6); /* RW_ */
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#ifdef CONFIG_X86_64
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#ifdef CONFIG_SMP
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percpu PT_LOAD FLAGS(6); /* RW_ */
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#endif
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init PT_LOAD FLAGS(7); /* RWE */
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#endif
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note PT_NOTE FLAGS(0); /* ___ */
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}
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SECTIONS
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{
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#ifdef CONFIG_X86_32
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. = LOAD_OFFSET + LOAD_PHYSICAL_ADDR;
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phys_startup_32 = ABSOLUTE(startup_32 - LOAD_OFFSET);
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#else
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. = __START_KERNEL;
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phys_startup_64 = ABSOLUTE(startup_64 - LOAD_OFFSET);
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#endif
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/* Text and read-only data */
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.text : AT(ADDR(.text) - LOAD_OFFSET) {
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_text = .;
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_stext = .;
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/* bootstrapping code */
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HEAD_TEXT
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TEXT_TEXT
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SCHED_TEXT
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LOCK_TEXT
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KPROBES_TEXT
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SOFTIRQENTRY_TEXT
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#ifdef CONFIG_RETPOLINE
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__indirect_thunk_start = .;
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*(.text.__x86.*)
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__indirect_thunk_end = .;
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#endif
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STATIC_CALL_TEXT
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ALIGN_ENTRY_TEXT_BEGIN
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ENTRY_TEXT
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ALIGN_ENTRY_TEXT_END
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*(.gnu.warning)
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} :text =0xcccc
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/* End of text section, which should occupy whole number of pages */
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_etext = .;
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. = ALIGN(PAGE_SIZE);
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X86_ALIGN_RODATA_BEGIN
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RO_DATA(PAGE_SIZE)
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X86_ALIGN_RODATA_END
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/* Data */
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.data : AT(ADDR(.data) - LOAD_OFFSET) {
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/* Start of data section */
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_sdata = .;
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/* init_task */
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INIT_TASK_DATA(THREAD_SIZE)
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#ifdef CONFIG_X86_32
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/* 32 bit has nosave before _edata */
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NOSAVE_DATA
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#endif
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PAGE_ALIGNED_DATA(PAGE_SIZE)
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CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)
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DATA_DATA
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CONSTRUCTORS
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/* rarely changed data like cpu maps */
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READ_MOSTLY_DATA(INTERNODE_CACHE_BYTES)
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/* End of data section */
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_edata = .;
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} :data
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BUG_TABLE
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ORC_UNWIND_TABLE
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. = ALIGN(PAGE_SIZE);
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__vvar_page = .;
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.vvar : AT(ADDR(.vvar) - LOAD_OFFSET) {
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/* work around gold bug 13023 */
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__vvar_beginning_hack = .;
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/* Place all vvars at the offsets in asm/vvar.h. */
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#define EMIT_VVAR(name, offset) \
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. = __vvar_beginning_hack + offset; \
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*(.vvar_ ## name)
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#include <asm/vvar.h>
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#undef EMIT_VVAR
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/*
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* Pad the rest of the page with zeros. Otherwise the loader
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* can leave garbage here.
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*/
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. = __vvar_beginning_hack + PAGE_SIZE;
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} :data
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. = ALIGN(__vvar_page + PAGE_SIZE, PAGE_SIZE);
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/* Init code and data - will be freed after init */
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. = ALIGN(PAGE_SIZE);
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.init.begin : AT(ADDR(.init.begin) - LOAD_OFFSET) {
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__init_begin = .; /* paired with __init_end */
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}
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#if defined(CONFIG_X86_64) && defined(CONFIG_SMP)
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/*
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* percpu offsets are zero-based on SMP. PERCPU_VADDR() changes the
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* output PHDR, so the next output section - .init.text - should
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* start another segment - init.
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*/
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PERCPU_VADDR(INTERNODE_CACHE_BYTES, 0, :percpu)
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ASSERT(SIZEOF(.data..percpu) < CONFIG_PHYSICAL_START,
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"per-CPU data too large - increase CONFIG_PHYSICAL_START")
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#endif
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INIT_TEXT_SECTION(PAGE_SIZE)
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#ifdef CONFIG_X86_64
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:init
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#endif
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/*
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* Section for code used exclusively before alternatives are run. All
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* references to such code must be patched out by alternatives, normally
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* by using X86_FEATURE_ALWAYS CPU feature bit.
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*
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* See static_cpu_has() for an example.
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*/
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.altinstr_aux : AT(ADDR(.altinstr_aux) - LOAD_OFFSET) {
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*(.altinstr_aux)
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}
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INIT_DATA_SECTION(16)
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.x86_cpu_dev.init : AT(ADDR(.x86_cpu_dev.init) - LOAD_OFFSET) {
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__x86_cpu_dev_start = .;
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*(.x86_cpu_dev.init)
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__x86_cpu_dev_end = .;
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}
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#ifdef CONFIG_X86_INTEL_MID
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.x86_intel_mid_dev.init : AT(ADDR(.x86_intel_mid_dev.init) - \
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LOAD_OFFSET) {
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__x86_intel_mid_dev_start = .;
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*(.x86_intel_mid_dev.init)
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__x86_intel_mid_dev_end = .;
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}
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#endif
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/*
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* start address and size of operations which during runtime
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* can be patched with virtualization friendly instructions or
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* baremetal native ones. Think page table operations.
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* Details in paravirt_types.h
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*/
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. = ALIGN(8);
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.parainstructions : AT(ADDR(.parainstructions) - LOAD_OFFSET) {
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__parainstructions = .;
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*(.parainstructions)
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__parainstructions_end = .;
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}
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#ifdef CONFIG_RETPOLINE
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/*
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* List of instructions that call/jmp/jcc to retpoline thunks
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* __x86_indirect_thunk_*(). These instructions can be patched along
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* with alternatives, after which the section can be freed.
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*/
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. = ALIGN(8);
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.retpoline_sites : AT(ADDR(.retpoline_sites) - LOAD_OFFSET) {
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__retpoline_sites = .;
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*(.retpoline_sites)
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__retpoline_sites_end = .;
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}
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. = ALIGN(8);
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.return_sites : AT(ADDR(.return_sites) - LOAD_OFFSET) {
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__return_sites = .;
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*(.return_sites)
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__return_sites_end = .;
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}
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. = ALIGN(8);
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.call_sites : AT(ADDR(.call_sites) - LOAD_OFFSET) {
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__call_sites = .;
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*(.call_sites)
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__call_sites_end = .;
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}
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#endif
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#ifdef CONFIG_X86_KERNEL_IBT
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. = ALIGN(8);
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.ibt_endbr_seal : AT(ADDR(.ibt_endbr_seal) - LOAD_OFFSET) {
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__ibt_endbr_seal = .;
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*(.ibt_endbr_seal)
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__ibt_endbr_seal_end = .;
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}
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#endif
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#ifdef CONFIG_FINEIBT
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. = ALIGN(8);
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.cfi_sites : AT(ADDR(.cfi_sites) - LOAD_OFFSET) {
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__cfi_sites = .;
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*(.cfi_sites)
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__cfi_sites_end = .;
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}
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#endif
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/*
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* struct alt_inst entries. From the header (alternative.h):
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* "Alternative instructions for different CPU types or capabilities"
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* Think locking instructions on spinlocks.
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*/
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. = ALIGN(8);
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.altinstructions : AT(ADDR(.altinstructions) - LOAD_OFFSET) {
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__alt_instructions = .;
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*(.altinstructions)
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__alt_instructions_end = .;
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}
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/*
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* And here are the replacement instructions. The linker sticks
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* them as binary blobs. The .altinstructions has enough data to
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* get the address and the length of them to patch the kernel safely.
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*/
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.altinstr_replacement : AT(ADDR(.altinstr_replacement) - LOAD_OFFSET) {
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*(.altinstr_replacement)
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}
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. = ALIGN(8);
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.apicdrivers : AT(ADDR(.apicdrivers) - LOAD_OFFSET) {
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__apicdrivers = .;
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*(.apicdrivers);
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__apicdrivers_end = .;
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}
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. = ALIGN(8);
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/*
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* .exit.text is discarded at runtime, not link time, to deal with
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* references from .altinstructions
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*/
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.exit.text : AT(ADDR(.exit.text) - LOAD_OFFSET) {
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EXIT_TEXT
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}
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.exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) {
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EXIT_DATA
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}
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#if !defined(CONFIG_X86_64) || !defined(CONFIG_SMP)
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PERCPU_SECTION(INTERNODE_CACHE_BYTES)
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#endif
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. = ALIGN(PAGE_SIZE);
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/* freed after init ends here */
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.init.end : AT(ADDR(.init.end) - LOAD_OFFSET) {
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__init_end = .;
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}
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/*
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* smp_locks might be freed after init
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* start/end must be page aligned
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*/
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. = ALIGN(PAGE_SIZE);
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.smp_locks : AT(ADDR(.smp_locks) - LOAD_OFFSET) {
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__smp_locks = .;
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*(.smp_locks)
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. = ALIGN(PAGE_SIZE);
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__smp_locks_end = .;
|
||
|
|
}
|
||
|
|
|
||
|
|
#ifdef CONFIG_X86_64
|
||
|
|
.data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) {
|
||
|
|
NOSAVE_DATA
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
/* BSS */
|
||
|
|
. = ALIGN(PAGE_SIZE);
|
||
|
|
.bss : AT(ADDR(.bss) - LOAD_OFFSET) {
|
||
|
|
__bss_start = .;
|
||
|
|
*(.bss..page_aligned)
|
||
|
|
. = ALIGN(PAGE_SIZE);
|
||
|
|
*(BSS_MAIN)
|
||
|
|
BSS_DECRYPTED
|
||
|
|
. = ALIGN(PAGE_SIZE);
|
||
|
|
__bss_stop = .;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*
|
||
|
|
* The memory occupied from _text to here, __end_of_kernel_reserve, is
|
||
|
|
* automatically reserved in setup_arch(). Anything after here must be
|
||
|
|
* explicitly reserved using memblock_reserve() or it will be discarded
|
||
|
|
* and treated as available memory.
|
||
|
|
*/
|
||
|
|
__end_of_kernel_reserve = .;
|
||
|
|
|
||
|
|
. = ALIGN(PAGE_SIZE);
|
||
|
|
.brk : AT(ADDR(.brk) - LOAD_OFFSET) {
|
||
|
|
__brk_base = .;
|
||
|
|
. += 64 * 1024; /* 64k alignment slop space */
|
||
|
|
*(.bss..brk) /* areas brk users have reserved */
|
||
|
|
__brk_limit = .;
|
||
|
|
}
|
||
|
|
|
||
|
|
. = ALIGN(PAGE_SIZE); /* keep VO_INIT_SIZE page aligned */
|
||
|
|
_end = .;
|
||
|
|
|
||
|
|
#ifdef CONFIG_AMD_MEM_ENCRYPT
|
||
|
|
/*
|
||
|
|
* Early scratch/workarea section: Lives outside of the kernel proper
|
||
|
|
* (_text - _end).
|
||
|
|
*
|
||
|
|
* Resides after _end because even though the .brk section is after
|
||
|
|
* __end_of_kernel_reserve, the .brk section is later reserved as a
|
||
|
|
* part of the kernel. Since it is located after __end_of_kernel_reserve
|
||
|
|
* it will be discarded and become part of the available memory. As
|
||
|
|
* such, it can only be used by very early boot code and must not be
|
||
|
|
* needed afterwards.
|
||
|
|
*
|
||
|
|
* Currently used by SME for performing in-place encryption of the
|
||
|
|
* kernel during boot. Resides on a 2MB boundary to simplify the
|
||
|
|
* pagetable setup used for SME in-place encryption.
|
||
|
|
*/
|
||
|
|
. = ALIGN(HPAGE_SIZE);
|
||
|
|
.init.scratch : AT(ADDR(.init.scratch) - LOAD_OFFSET) {
|
||
|
|
__init_scratch_begin = .;
|
||
|
|
*(.init.scratch)
|
||
|
|
. = ALIGN(HPAGE_SIZE);
|
||
|
|
__init_scratch_end = .;
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
STABS_DEBUG
|
||
|
|
DWARF_DEBUG
|
||
|
|
ELF_DETAILS
|
||
|
|
|
||
|
|
DISCARDS
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Make sure that the .got.plt is either completely empty or it
|
||
|
|
* contains only the lazy dispatch entries.
|
||
|
|
*/
|
||
|
|
.got.plt (INFO) : { *(.got.plt) }
|
||
|
|
ASSERT(SIZEOF(.got.plt) == 0 ||
|
||
|
|
#ifdef CONFIG_X86_64
|
||
|
|
SIZEOF(.got.plt) == 0x18,
|
||
|
|
#else
|
||
|
|
SIZEOF(.got.plt) == 0xc,
|
||
|
|
#endif
|
||
|
|
"Unexpected GOT/PLT entries detected!")
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Sections that should stay zero sized, which is safer to
|
||
|
|
* explicitly check instead of blindly discarding.
|
||
|
|
*/
|
||
|
|
.got : {
|
||
|
|
*(.got) *(.igot.*)
|
||
|
|
}
|
||
|
|
ASSERT(SIZEOF(.got) == 0, "Unexpected GOT entries detected!")
|
||
|
|
|
||
|
|
.plt : {
|
||
|
|
*(.plt) *(.plt.*) *(.iplt)
|
||
|
|
}
|
||
|
|
ASSERT(SIZEOF(.plt) == 0, "Unexpected run-time procedure linkages detected!")
|
||
|
|
|
||
|
|
.rel.dyn : {
|
||
|
|
*(.rel.*) *(.rel_*)
|
||
|
|
}
|
||
|
|
ASSERT(SIZEOF(.rel.dyn) == 0, "Unexpected run-time relocations (.rel) detected!")
|
||
|
|
|
||
|
|
.rela.dyn : {
|
||
|
|
*(.rela.*) *(.rela_*)
|
||
|
|
}
|
||
|
|
ASSERT(SIZEOF(.rela.dyn) == 0, "Unexpected run-time relocations (.rela) detected!")
|
||
|
|
}
|
||
|
|
|
||
|
|
/*
|
||
|
|
* The ASSERT() sink to . is intentional, for binutils 2.14 compatibility:
|
||
|
|
*/
|
||
|
|
. = ASSERT((_end - LOAD_OFFSET <= KERNEL_IMAGE_SIZE),
|
||
|
|
"kernel image bigger than KERNEL_IMAGE_SIZE");
|
||
|
|
|
||
|
|
#ifdef CONFIG_X86_64
|
||
|
|
/*
|
||
|
|
* Per-cpu symbols which need to be offset from __per_cpu_load
|
||
|
|
* for the boot processor.
|
||
|
|
*/
|
||
|
|
#define INIT_PER_CPU(x) init_per_cpu__##x = ABSOLUTE(x) + __per_cpu_load
|
||
|
|
INIT_PER_CPU(gdt_page);
|
||
|
|
INIT_PER_CPU(fixed_percpu_data);
|
||
|
|
INIT_PER_CPU(irq_stack_backing_store);
|
||
|
|
|
||
|
|
#ifdef CONFIG_SMP
|
||
|
|
. = ASSERT((fixed_percpu_data == 0),
|
||
|
|
"fixed_percpu_data is not at start of per-cpu area");
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#endif /* CONFIG_X86_64 */
|