718 lines
20 KiB
C
718 lines
20 KiB
C
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// SPDX-License-Identifier: GPL-2.0
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/*---------------------------------------------------------------------------+
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| fpu_entry.c |
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| The entry functions for wm-FPU-emu |
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| Copyright (C) 1992,1993,1994,1996,1997 |
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| W. Metzenthen, 22 Parker St, Ormond, Vic 3163, Australia |
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| E-mail billm@suburbia.net |
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| See the files "README" and "COPYING" for further copyright and warranty |
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| information. |
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+---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------+
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| Note: |
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| The file contains code which accesses user memory. |
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| Emulator static data may change when user memory is accessed, due to |
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| other processes using the emulator while swapping is in progress. |
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+---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------+
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| math_emulate(), restore_i387_soft() and save_i387_soft() are the only |
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| entry points for wm-FPU-emu. |
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+---------------------------------------------------------------------------*/
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#include <linux/signal.h>
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#include <linux/regset.h>
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#include <linux/uaccess.h>
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#include <asm/traps.h>
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#include <asm/user.h>
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#include <asm/fpu/api.h>
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#include "fpu_system.h"
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#include "fpu_emu.h"
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#include "exception.h"
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#include "control_w.h"
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#include "status_w.h"
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#define __BAD__ FPU_illegal /* Illegal on an 80486, causes SIGILL */
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/* fcmovCC and f(u)comi(p) are enabled if CPUID(1).EDX(15) "cmov" is set */
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/* WARNING: "u" entries are not documented by Intel in their 80486 manual
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and may not work on FPU clones or later Intel FPUs.
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Changes to support them provided by Linus Torvalds. */
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static FUNC const st_instr_table[64] = {
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/* Opcode: d8 d9 da db */
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/* dc dd de df */
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/* c0..7 */ fadd__, fld_i_, fcmovb, fcmovnb,
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/* c0..7 */ fadd_i, ffree_, faddp_, ffreep,/*u*/
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/* c8..f */ fmul__, fxch_i, fcmove, fcmovne,
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/* c8..f */ fmul_i, fxch_i,/*u*/ fmulp_, fxch_i,/*u*/
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/* d0..7 */ fcom_st, fp_nop, fcmovbe, fcmovnbe,
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/* d0..7 */ fcom_st,/*u*/ fst_i_, fcompst,/*u*/ fstp_i,/*u*/
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/* d8..f */ fcompst, fstp_i,/*u*/ fcmovu, fcmovnu,
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/* d8..f */ fcompst,/*u*/ fstp_i, fcompp, fstp_i,/*u*/
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/* e0..7 */ fsub__, FPU_etc, __BAD__, finit_,
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/* e0..7 */ fsubri, fucom_, fsubrp, fstsw_,
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/* e8..f */ fsubr_, fconst, fucompp, fucomi_,
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/* e8..f */ fsub_i, fucomp, fsubp_, fucomip,
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/* f0..7 */ fdiv__, FPU_triga, __BAD__, fcomi_,
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/* f0..7 */ fdivri, __BAD__, fdivrp, fcomip,
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/* f8..f */ fdivr_, FPU_trigb, __BAD__, __BAD__,
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/* f8..f */ fdiv_i, __BAD__, fdivp_, __BAD__,
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};
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#define _NONE_ 0 /* Take no special action */
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#define _REG0_ 1 /* Need to check for not empty st(0) */
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#define _REGI_ 2 /* Need to check for not empty st(0) and st(rm) */
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#define _REGi_ 0 /* Uses st(rm) */
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#define _PUSH_ 3 /* Need to check for space to push onto stack */
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#define _null_ 4 /* Function illegal or not implemented */
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#define _REGIi 5 /* Uses st(0) and st(rm), result to st(rm) */
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#define _REGIp 6 /* Uses st(0) and st(rm), result to st(rm) then pop */
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#define _REGIc 0 /* Compare st(0) and st(rm) */
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#define _REGIn 0 /* Uses st(0) and st(rm), but handle checks later */
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static u_char const type_table[64] = {
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/* Opcode: d8 d9 da db dc dd de df */
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/* c0..7 */ _REGI_, _NONE_, _REGIn, _REGIn, _REGIi, _REGi_, _REGIp, _REGi_,
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/* c8..f */ _REGI_, _REGIn, _REGIn, _REGIn, _REGIi, _REGI_, _REGIp, _REGI_,
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/* d0..7 */ _REGIc, _NONE_, _REGIn, _REGIn, _REGIc, _REG0_, _REGIc, _REG0_,
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/* d8..f */ _REGIc, _REG0_, _REGIn, _REGIn, _REGIc, _REG0_, _REGIc, _REG0_,
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/* e0..7 */ _REGI_, _NONE_, _null_, _NONE_, _REGIi, _REGIc, _REGIp, _NONE_,
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/* e8..f */ _REGI_, _NONE_, _REGIc, _REGIc, _REGIi, _REGIc, _REGIp, _REGIc,
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/* f0..7 */ _REGI_, _NONE_, _null_, _REGIc, _REGIi, _null_, _REGIp, _REGIc,
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/* f8..f */ _REGI_, _NONE_, _null_, _null_, _REGIi, _null_, _REGIp, _null_,
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};
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#ifdef RE_ENTRANT_CHECKING
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u_char emulating = 0;
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#endif /* RE_ENTRANT_CHECKING */
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static int valid_prefix(u_char *Byte, u_char __user ** fpu_eip,
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overrides * override);
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void math_emulate(struct math_emu_info *info)
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{
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u_char FPU_modrm, byte1;
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unsigned short code;
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fpu_addr_modes addr_modes;
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int unmasked;
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FPU_REG loaded_data;
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FPU_REG *st0_ptr;
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u_char loaded_tag, st0_tag;
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void __user *data_address;
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struct address data_sel_off;
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struct address entry_sel_off;
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unsigned long code_base = 0;
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unsigned long code_limit = 0; /* Initialized to stop compiler warnings */
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struct desc_struct code_descriptor;
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#ifdef RE_ENTRANT_CHECKING
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if (emulating) {
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printk("ERROR: wm-FPU-emu is not RE-ENTRANT!\n");
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}
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RE_ENTRANT_CHECK_ON;
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#endif /* RE_ENTRANT_CHECKING */
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FPU_info = info;
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FPU_ORIG_EIP = FPU_EIP;
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if ((FPU_EFLAGS & 0x00020000) != 0) {
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/* Virtual 8086 mode */
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addr_modes.default_mode = VM86;
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FPU_EIP += code_base = FPU_CS << 4;
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code_limit = code_base + 0xffff; /* Assumes code_base <= 0xffff0000 */
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} else if (FPU_CS == __USER_CS && FPU_DS == __USER_DS) {
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addr_modes.default_mode = 0;
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} else if (FPU_CS == __KERNEL_CS) {
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printk("math_emulate: %04x:%08lx\n", FPU_CS, FPU_EIP);
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panic("Math emulation needed in kernel");
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} else {
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if ((FPU_CS & 4) != 4) { /* Must be in the LDT */
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/* Can only handle segmented addressing via the LDT
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for now, and it must be 16 bit */
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printk("FPU emulator: Unsupported addressing mode\n");
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math_abort(FPU_info, SIGILL);
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}
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code_descriptor = FPU_get_ldt_descriptor(FPU_CS);
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if (code_descriptor.d) {
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/* The above test may be wrong, the book is not clear */
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/* Segmented 32 bit protected mode */
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addr_modes.default_mode = SEG32;
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} else {
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/* 16 bit protected mode */
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addr_modes.default_mode = PM16;
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}
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FPU_EIP += code_base = seg_get_base(&code_descriptor);
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code_limit = seg_get_limit(&code_descriptor) + 1;
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code_limit *= seg_get_granularity(&code_descriptor);
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code_limit += code_base - 1;
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if (code_limit < code_base)
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code_limit = 0xffffffff;
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}
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FPU_lookahead = !(FPU_EFLAGS & X86_EFLAGS_TF);
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if (!valid_prefix(&byte1, (u_char __user **) & FPU_EIP,
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&addr_modes.override)) {
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RE_ENTRANT_CHECK_OFF;
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printk
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("FPU emulator: Unknown prefix byte 0x%02x, probably due to\n"
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"FPU emulator: self-modifying code! (emulation impossible)\n",
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byte1);
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RE_ENTRANT_CHECK_ON;
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EXCEPTION(EX_INTERNAL | 0x126);
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math_abort(FPU_info, SIGILL);
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}
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do_another_FPU_instruction:
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no_ip_update = 0;
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FPU_EIP++; /* We have fetched the prefix and first code bytes. */
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if (addr_modes.default_mode) {
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/* This checks for the minimum instruction bytes.
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We also need to check any extra (address mode) code access. */
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if (FPU_EIP > code_limit)
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math_abort(FPU_info, SIGSEGV);
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}
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if ((byte1 & 0xf8) != 0xd8) {
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if (byte1 == FWAIT_OPCODE) {
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if (partial_status & SW_Summary)
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goto do_the_FPU_interrupt;
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else
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goto FPU_fwait_done;
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}
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#ifdef PARANOID
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EXCEPTION(EX_INTERNAL | 0x128);
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math_abort(FPU_info, SIGILL);
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#endif /* PARANOID */
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}
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RE_ENTRANT_CHECK_OFF;
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FPU_code_access_ok(1);
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FPU_get_user(FPU_modrm, (u_char __user *) FPU_EIP);
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RE_ENTRANT_CHECK_ON;
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FPU_EIP++;
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if (partial_status & SW_Summary) {
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/* Ignore the error for now if the current instruction is a no-wait
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control instruction */
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/* The 80486 manual contradicts itself on this topic,
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but a real 80486 uses the following instructions:
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fninit, fnstenv, fnsave, fnstsw, fnstenv, fnclex.
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*/
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code = (FPU_modrm << 8) | byte1;
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if (!((((code & 0xf803) == 0xe003) || /* fnclex, fninit, fnstsw */
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(((code & 0x3003) == 0x3001) && /* fnsave, fnstcw, fnstenv,
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fnstsw */
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((code & 0xc000) != 0xc000))))) {
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/*
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* We need to simulate the action of the kernel to FPU
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* interrupts here.
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*/
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do_the_FPU_interrupt:
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FPU_EIP = FPU_ORIG_EIP; /* Point to current FPU instruction. */
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RE_ENTRANT_CHECK_OFF;
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current->thread.trap_nr = X86_TRAP_MF;
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current->thread.error_code = 0;
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send_sig(SIGFPE, current, 1);
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return;
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}
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}
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entry_sel_off.offset = FPU_ORIG_EIP;
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entry_sel_off.selector = FPU_CS;
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entry_sel_off.opcode = (byte1 << 8) | FPU_modrm;
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entry_sel_off.empty = 0;
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FPU_rm = FPU_modrm & 7;
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if (FPU_modrm < 0300) {
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/* All of these instructions use the mod/rm byte to get a data address */
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if ((addr_modes.default_mode & SIXTEEN)
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^ (addr_modes.override.address_size == ADDR_SIZE_PREFIX))
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data_address =
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FPU_get_address_16(FPU_modrm, &FPU_EIP,
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&data_sel_off, addr_modes);
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else
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data_address =
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FPU_get_address(FPU_modrm, &FPU_EIP, &data_sel_off,
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addr_modes);
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if (addr_modes.default_mode) {
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if (FPU_EIP - 1 > code_limit)
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math_abort(FPU_info, SIGSEGV);
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}
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if (!(byte1 & 1)) {
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unsigned short status1 = partial_status;
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st0_ptr = &st(0);
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st0_tag = FPU_gettag0();
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/* Stack underflow has priority */
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if (NOT_EMPTY_ST0) {
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if (addr_modes.default_mode & PROTECTED) {
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/* This table works for 16 and 32 bit protected mode */
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if (access_limit <
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data_sizes_16[(byte1 >> 1) & 3])
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math_abort(FPU_info, SIGSEGV);
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}
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unmasked = 0; /* Do this here to stop compiler warnings. */
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switch ((byte1 >> 1) & 3) {
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case 0:
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unmasked =
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FPU_load_single((float __user *)
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data_address,
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&loaded_data);
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loaded_tag = unmasked & 0xff;
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unmasked &= ~0xff;
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break;
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case 1:
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loaded_tag =
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FPU_load_int32((long __user *)
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data_address,
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&loaded_data);
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break;
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case 2:
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unmasked =
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FPU_load_double((double __user *)
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data_address,
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&loaded_data);
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loaded_tag = unmasked & 0xff;
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unmasked &= ~0xff;
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break;
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case 3:
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default: /* Used here to suppress gcc warnings. */
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loaded_tag =
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FPU_load_int16((short __user *)
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data_address,
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&loaded_data);
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break;
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}
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/* No more access to user memory, it is safe
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to use static data now */
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/* NaN operands have the next priority. */
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/* We have to delay looking at st(0) until after
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loading the data, because that data might contain an SNaN */
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if (((st0_tag == TAG_Special) && isNaN(st0_ptr))
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|| ((loaded_tag == TAG_Special)
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&& isNaN(&loaded_data))) {
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/* Restore the status word; we might have loaded a
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denormal. */
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partial_status = status1;
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if ((FPU_modrm & 0x30) == 0x10) {
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/* fcom or fcomp */
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EXCEPTION(EX_Invalid);
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setcc(SW_C3 | SW_C2 | SW_C0);
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if ((FPU_modrm & 0x08)
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&& (control_word &
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CW_Invalid))
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FPU_pop(); /* fcomp, masked, so we pop. */
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} else {
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if (loaded_tag == TAG_Special)
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loaded_tag =
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FPU_Special
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(&loaded_data);
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#ifdef PECULIAR_486
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||
|
|
/* This is not really needed, but gives behaviour
|
||
|
|
identical to an 80486 */
|
||
|
|
if ((FPU_modrm & 0x28) == 0x20)
|
||
|
|
/* fdiv or fsub */
|
||
|
|
real_2op_NaN
|
||
|
|
(&loaded_data,
|
||
|
|
loaded_tag, 0,
|
||
|
|
&loaded_data);
|
||
|
|
else
|
||
|
|
#endif /* PECULIAR_486 */
|
||
|
|
/* fadd, fdivr, fmul, or fsubr */
|
||
|
|
real_2op_NaN
|
||
|
|
(&loaded_data,
|
||
|
|
loaded_tag, 0,
|
||
|
|
st0_ptr);
|
||
|
|
}
|
||
|
|
goto reg_mem_instr_done;
|
||
|
|
}
|
||
|
|
|
||
|
|
if (unmasked && !((FPU_modrm & 0x30) == 0x10)) {
|
||
|
|
/* Is not a comparison instruction. */
|
||
|
|
if ((FPU_modrm & 0x38) == 0x38) {
|
||
|
|
/* fdivr */
|
||
|
|
if ((st0_tag == TAG_Zero) &&
|
||
|
|
((loaded_tag == TAG_Valid)
|
||
|
|
|| (loaded_tag ==
|
||
|
|
TAG_Special
|
||
|
|
&&
|
||
|
|
isdenormal
|
||
|
|
(&loaded_data)))) {
|
||
|
|
if (FPU_divide_by_zero
|
||
|
|
(0,
|
||
|
|
getsign
|
||
|
|
(&loaded_data))
|
||
|
|
< 0) {
|
||
|
|
/* We use the fact here that the unmasked
|
||
|
|
exception in the loaded data was for a
|
||
|
|
denormal operand */
|
||
|
|
/* Restore the state of the denormal op bit */
|
||
|
|
partial_status
|
||
|
|
&=
|
||
|
|
~SW_Denorm_Op;
|
||
|
|
partial_status
|
||
|
|
|=
|
||
|
|
status1 &
|
||
|
|
SW_Denorm_Op;
|
||
|
|
} else
|
||
|
|
setsign(st0_ptr,
|
||
|
|
getsign
|
||
|
|
(&loaded_data));
|
||
|
|
}
|
||
|
|
}
|
||
|
|
goto reg_mem_instr_done;
|
||
|
|
}
|
||
|
|
|
||
|
|
switch ((FPU_modrm >> 3) & 7) {
|
||
|
|
case 0: /* fadd */
|
||
|
|
clear_C1();
|
||
|
|
FPU_add(&loaded_data, loaded_tag, 0,
|
||
|
|
control_word);
|
||
|
|
break;
|
||
|
|
case 1: /* fmul */
|
||
|
|
clear_C1();
|
||
|
|
FPU_mul(&loaded_data, loaded_tag, 0,
|
||
|
|
control_word);
|
||
|
|
break;
|
||
|
|
case 2: /* fcom */
|
||
|
|
FPU_compare_st_data(&loaded_data,
|
||
|
|
loaded_tag);
|
||
|
|
break;
|
||
|
|
case 3: /* fcomp */
|
||
|
|
if (!FPU_compare_st_data
|
||
|
|
(&loaded_data, loaded_tag)
|
||
|
|
&& !unmasked)
|
||
|
|
FPU_pop();
|
||
|
|
break;
|
||
|
|
case 4: /* fsub */
|
||
|
|
clear_C1();
|
||
|
|
FPU_sub(LOADED | loaded_tag,
|
||
|
|
(int)&loaded_data,
|
||
|
|
control_word);
|
||
|
|
break;
|
||
|
|
case 5: /* fsubr */
|
||
|
|
clear_C1();
|
||
|
|
FPU_sub(REV | LOADED | loaded_tag,
|
||
|
|
(int)&loaded_data,
|
||
|
|
control_word);
|
||
|
|
break;
|
||
|
|
case 6: /* fdiv */
|
||
|
|
clear_C1();
|
||
|
|
FPU_div(LOADED | loaded_tag,
|
||
|
|
(int)&loaded_data,
|
||
|
|
control_word);
|
||
|
|
break;
|
||
|
|
case 7: /* fdivr */
|
||
|
|
clear_C1();
|
||
|
|
if (st0_tag == TAG_Zero)
|
||
|
|
partial_status = status1; /* Undo any denorm tag,
|
||
|
|
zero-divide has priority. */
|
||
|
|
FPU_div(REV | LOADED | loaded_tag,
|
||
|
|
(int)&loaded_data,
|
||
|
|
control_word);
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
} else {
|
||
|
|
if ((FPU_modrm & 0x30) == 0x10) {
|
||
|
|
/* The instruction is fcom or fcomp */
|
||
|
|
EXCEPTION(EX_StackUnder);
|
||
|
|
setcc(SW_C3 | SW_C2 | SW_C0);
|
||
|
|
if ((FPU_modrm & 0x08)
|
||
|
|
&& (control_word & CW_Invalid))
|
||
|
|
FPU_pop(); /* fcomp */
|
||
|
|
} else
|
||
|
|
FPU_stack_underflow();
|
||
|
|
}
|
||
|
|
reg_mem_instr_done:
|
||
|
|
operand_address = data_sel_off;
|
||
|
|
} else {
|
||
|
|
if (!(no_ip_update =
|
||
|
|
FPU_load_store(((FPU_modrm & 0x38) | (byte1 & 6))
|
||
|
|
>> 1, addr_modes, data_address))) {
|
||
|
|
operand_address = data_sel_off;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
} else {
|
||
|
|
/* None of these instructions access user memory */
|
||
|
|
u_char instr_index = (FPU_modrm & 0x38) | (byte1 & 7);
|
||
|
|
|
||
|
|
#ifdef PECULIAR_486
|
||
|
|
/* This is supposed to be undefined, but a real 80486 seems
|
||
|
|
to do this: */
|
||
|
|
operand_address.offset = 0;
|
||
|
|
operand_address.selector = FPU_DS;
|
||
|
|
#endif /* PECULIAR_486 */
|
||
|
|
|
||
|
|
st0_ptr = &st(0);
|
||
|
|
st0_tag = FPU_gettag0();
|
||
|
|
switch (type_table[(int)instr_index]) {
|
||
|
|
case _NONE_: /* also _REGIc: _REGIn */
|
||
|
|
break;
|
||
|
|
case _REG0_:
|
||
|
|
if (!NOT_EMPTY_ST0) {
|
||
|
|
FPU_stack_underflow();
|
||
|
|
goto FPU_instruction_done;
|
||
|
|
}
|
||
|
|
break;
|
||
|
|
case _REGIi:
|
||
|
|
if (!NOT_EMPTY_ST0 || !NOT_EMPTY(FPU_rm)) {
|
||
|
|
FPU_stack_underflow_i(FPU_rm);
|
||
|
|
goto FPU_instruction_done;
|
||
|
|
}
|
||
|
|
break;
|
||
|
|
case _REGIp:
|
||
|
|
if (!NOT_EMPTY_ST0 || !NOT_EMPTY(FPU_rm)) {
|
||
|
|
FPU_stack_underflow_pop(FPU_rm);
|
||
|
|
goto FPU_instruction_done;
|
||
|
|
}
|
||
|
|
break;
|
||
|
|
case _REGI_:
|
||
|
|
if (!NOT_EMPTY_ST0 || !NOT_EMPTY(FPU_rm)) {
|
||
|
|
FPU_stack_underflow();
|
||
|
|
goto FPU_instruction_done;
|
||
|
|
}
|
||
|
|
break;
|
||
|
|
case _PUSH_: /* Only used by the fld st(i) instruction */
|
||
|
|
break;
|
||
|
|
case _null_:
|
||
|
|
FPU_illegal();
|
||
|
|
goto FPU_instruction_done;
|
||
|
|
default:
|
||
|
|
EXCEPTION(EX_INTERNAL | 0x111);
|
||
|
|
goto FPU_instruction_done;
|
||
|
|
}
|
||
|
|
(*st_instr_table[(int)instr_index]) ();
|
||
|
|
|
||
|
|
FPU_instruction_done:
|
||
|
|
;
|
||
|
|
}
|
||
|
|
|
||
|
|
if (!no_ip_update)
|
||
|
|
instruction_address = entry_sel_off;
|
||
|
|
|
||
|
|
FPU_fwait_done:
|
||
|
|
|
||
|
|
#ifdef DEBUG
|
||
|
|
RE_ENTRANT_CHECK_OFF;
|
||
|
|
FPU_printall();
|
||
|
|
RE_ENTRANT_CHECK_ON;
|
||
|
|
#endif /* DEBUG */
|
||
|
|
|
||
|
|
if (FPU_lookahead && !need_resched()) {
|
||
|
|
FPU_ORIG_EIP = FPU_EIP - code_base;
|
||
|
|
if (valid_prefix(&byte1, (u_char __user **) & FPU_EIP,
|
||
|
|
&addr_modes.override))
|
||
|
|
goto do_another_FPU_instruction;
|
||
|
|
}
|
||
|
|
|
||
|
|
if (addr_modes.default_mode)
|
||
|
|
FPU_EIP -= code_base;
|
||
|
|
|
||
|
|
RE_ENTRANT_CHECK_OFF;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Support for prefix bytes is not yet complete. To properly handle
|
||
|
|
all prefix bytes, further changes are needed in the emulator code
|
||
|
|
which accesses user address space. Access to separate segments is
|
||
|
|
important for msdos emulation. */
|
||
|
|
static int valid_prefix(u_char *Byte, u_char __user **fpu_eip,
|
||
|
|
overrides * override)
|
||
|
|
{
|
||
|
|
u_char byte;
|
||
|
|
u_char __user *ip = *fpu_eip;
|
||
|
|
|
||
|
|
*override = (overrides) {
|
||
|
|
0, 0, PREFIX_DEFAULT}; /* defaults */
|
||
|
|
|
||
|
|
RE_ENTRANT_CHECK_OFF;
|
||
|
|
FPU_code_access_ok(1);
|
||
|
|
FPU_get_user(byte, ip);
|
||
|
|
RE_ENTRANT_CHECK_ON;
|
||
|
|
|
||
|
|
while (1) {
|
||
|
|
switch (byte) {
|
||
|
|
case ADDR_SIZE_PREFIX:
|
||
|
|
override->address_size = ADDR_SIZE_PREFIX;
|
||
|
|
goto do_next_byte;
|
||
|
|
|
||
|
|
case OP_SIZE_PREFIX:
|
||
|
|
override->operand_size = OP_SIZE_PREFIX;
|
||
|
|
goto do_next_byte;
|
||
|
|
|
||
|
|
case PREFIX_CS:
|
||
|
|
override->segment = PREFIX_CS_;
|
||
|
|
goto do_next_byte;
|
||
|
|
case PREFIX_ES:
|
||
|
|
override->segment = PREFIX_ES_;
|
||
|
|
goto do_next_byte;
|
||
|
|
case PREFIX_SS:
|
||
|
|
override->segment = PREFIX_SS_;
|
||
|
|
goto do_next_byte;
|
||
|
|
case PREFIX_FS:
|
||
|
|
override->segment = PREFIX_FS_;
|
||
|
|
goto do_next_byte;
|
||
|
|
case PREFIX_GS:
|
||
|
|
override->segment = PREFIX_GS_;
|
||
|
|
goto do_next_byte;
|
||
|
|
case PREFIX_DS:
|
||
|
|
override->segment = PREFIX_DS_;
|
||
|
|
goto do_next_byte;
|
||
|
|
|
||
|
|
/* lock is not a valid prefix for FPU instructions,
|
||
|
|
let the cpu handle it to generate a SIGILL. */
|
||
|
|
/* case PREFIX_LOCK: */
|
||
|
|
|
||
|
|
/* rep.. prefixes have no meaning for FPU instructions */
|
||
|
|
case PREFIX_REPE:
|
||
|
|
case PREFIX_REPNE:
|
||
|
|
|
||
|
|
do_next_byte:
|
||
|
|
ip++;
|
||
|
|
RE_ENTRANT_CHECK_OFF;
|
||
|
|
FPU_code_access_ok(1);
|
||
|
|
FPU_get_user(byte, ip);
|
||
|
|
RE_ENTRANT_CHECK_ON;
|
||
|
|
break;
|
||
|
|
case FWAIT_OPCODE:
|
||
|
|
*Byte = byte;
|
||
|
|
return 1;
|
||
|
|
default:
|
||
|
|
if ((byte & 0xf8) == 0xd8) {
|
||
|
|
*Byte = byte;
|
||
|
|
*fpu_eip = ip;
|
||
|
|
return 1;
|
||
|
|
} else {
|
||
|
|
/* Not a valid sequence of prefix bytes followed by
|
||
|
|
an FPU instruction. */
|
||
|
|
*Byte = byte; /* Needed for error message. */
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
void math_abort(struct math_emu_info *info, unsigned int signal)
|
||
|
|
{
|
||
|
|
FPU_EIP = FPU_ORIG_EIP;
|
||
|
|
current->thread.trap_nr = X86_TRAP_MF;
|
||
|
|
current->thread.error_code = 0;
|
||
|
|
send_sig(signal, current, 1);
|
||
|
|
RE_ENTRANT_CHECK_OFF;
|
||
|
|
__asm__("movl %0,%%esp ; ret": :"g"(((long)info) - 4));
|
||
|
|
#ifdef PARANOID
|
||
|
|
printk("ERROR: wm-FPU-emu math_abort failed!\n");
|
||
|
|
#endif /* PARANOID */
|
||
|
|
}
|
||
|
|
|
||
|
|
#define S387 ((struct swregs_state *)s387)
|
||
|
|
#define sstatus_word() \
|
||
|
|
((S387->swd & ~SW_Top & 0xffff) | ((S387->ftop << SW_Top_Shift) & SW_Top))
|
||
|
|
|
||
|
|
int fpregs_soft_set(struct task_struct *target,
|
||
|
|
const struct user_regset *regset,
|
||
|
|
unsigned int pos, unsigned int count,
|
||
|
|
const void *kbuf, const void __user *ubuf)
|
||
|
|
{
|
||
|
|
struct swregs_state *s387 = &target->thread.fpu.fpstate->regs.soft;
|
||
|
|
void *space = s387->st_space;
|
||
|
|
int ret;
|
||
|
|
int offset, other, i, tags, regnr, tag, newtop;
|
||
|
|
|
||
|
|
RE_ENTRANT_CHECK_OFF;
|
||
|
|
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, s387, 0,
|
||
|
|
offsetof(struct swregs_state, st_space));
|
||
|
|
RE_ENTRANT_CHECK_ON;
|
||
|
|
|
||
|
|
if (ret)
|
||
|
|
return ret;
|
||
|
|
|
||
|
|
S387->ftop = (S387->swd >> SW_Top_Shift) & 7;
|
||
|
|
offset = (S387->ftop & 7) * 10;
|
||
|
|
other = 80 - offset;
|
||
|
|
|
||
|
|
RE_ENTRANT_CHECK_OFF;
|
||
|
|
|
||
|
|
/* Copy all registers in stack order. */
|
||
|
|
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
|
||
|
|
space + offset, 0, other);
|
||
|
|
if (!ret && offset)
|
||
|
|
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
|
||
|
|
space, 0, offset);
|
||
|
|
|
||
|
|
RE_ENTRANT_CHECK_ON;
|
||
|
|
|
||
|
|
/* The tags may need to be corrected now. */
|
||
|
|
tags = S387->twd;
|
||
|
|
newtop = S387->ftop;
|
||
|
|
for (i = 0; i < 8; i++) {
|
||
|
|
regnr = (i + newtop) & 7;
|
||
|
|
if (((tags >> ((regnr & 7) * 2)) & 3) != TAG_Empty) {
|
||
|
|
/* The loaded data over-rides all other cases. */
|
||
|
|
tag =
|
||
|
|
FPU_tagof((FPU_REG *) ((u_char *) S387->st_space +
|
||
|
|
10 * regnr));
|
||
|
|
tags &= ~(3 << (regnr * 2));
|
||
|
|
tags |= (tag & 3) << (regnr * 2);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
S387->twd = tags;
|
||
|
|
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
int fpregs_soft_get(struct task_struct *target,
|
||
|
|
const struct user_regset *regset,
|
||
|
|
struct membuf to)
|
||
|
|
{
|
||
|
|
struct swregs_state *s387 = &target->thread.fpu.fpstate->regs.soft;
|
||
|
|
const void *space = s387->st_space;
|
||
|
|
int offset = (S387->ftop & 7) * 10, other = 80 - offset;
|
||
|
|
|
||
|
|
RE_ENTRANT_CHECK_OFF;
|
||
|
|
|
||
|
|
#ifdef PECULIAR_486
|
||
|
|
S387->cwd &= ~0xe080;
|
||
|
|
/* An 80486 sets nearly all of the reserved bits to 1. */
|
||
|
|
S387->cwd |= 0xffff0040;
|
||
|
|
S387->swd = sstatus_word() | 0xffff0000;
|
||
|
|
S387->twd |= 0xffff0000;
|
||
|
|
S387->fcs &= ~0xf8000000;
|
||
|
|
S387->fos |= 0xffff0000;
|
||
|
|
#endif /* PECULIAR_486 */
|
||
|
|
|
||
|
|
membuf_write(&to, s387, offsetof(struct swregs_state, st_space));
|
||
|
|
membuf_write(&to, space + offset, other);
|
||
|
|
membuf_write(&to, space, offset);
|
||
|
|
|
||
|
|
RE_ENTRANT_CHECK_ON;
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|