231 lines
5.1 KiB
ArmAsm
231 lines
5.1 KiB
ArmAsm
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/* SPDX-License-Identifier: GPL-2.0-or-later WITH GCC-exception-2.0 */
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#include <linux/linkage.h>
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#include <asm/asmmacro.h>
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#include <asm/core.h>
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#if !XCHAL_HAVE_MUL16 && !XCHAL_HAVE_MUL32 && !XCHAL_HAVE_MAC16
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#define XCHAL_NO_MUL 1
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#endif
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ENTRY(__umulsidi3)
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#ifdef __XTENSA_CALL0_ABI__
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abi_entry(32)
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s32i a12, sp, 16
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s32i a13, sp, 20
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s32i a14, sp, 24
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s32i a15, sp, 28
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#elif XCHAL_NO_MUL
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/* This is not really a leaf function; allocate enough stack space
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to allow CALL12s to a helper function. */
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abi_entry(32)
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#else
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abi_entry_default
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#endif
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#ifdef __XTENSA_EB__
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#define wh a2
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#define wl a3
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#else
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#define wh a3
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#define wl a2
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#endif /* __XTENSA_EB__ */
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/* This code is taken from the mulsf3 routine in ieee754-sf.S.
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See more comments there. */
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#if XCHAL_HAVE_MUL32_HIGH
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mull a6, a2, a3
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muluh wh, a2, a3
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mov wl, a6
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#else /* ! MUL32_HIGH */
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#if defined(__XTENSA_CALL0_ABI__) && XCHAL_NO_MUL
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/* a0 and a8 will be clobbered by calling the multiply function
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but a8 is not used here and need not be saved. */
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s32i a0, sp, 0
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#endif
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#if XCHAL_HAVE_MUL16 || XCHAL_HAVE_MUL32
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#define a2h a4
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#define a3h a5
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/* Get the high halves of the inputs into registers. */
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srli a2h, a2, 16
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srli a3h, a3, 16
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#define a2l a2
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#define a3l a3
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#if XCHAL_HAVE_MUL32 && !XCHAL_HAVE_MUL16
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/* Clear the high halves of the inputs. This does not matter
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for MUL16 because the high bits are ignored. */
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extui a2, a2, 0, 16
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extui a3, a3, 0, 16
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#endif
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#endif /* MUL16 || MUL32 */
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#if XCHAL_HAVE_MUL16
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#define do_mul(dst, xreg, xhalf, yreg, yhalf) \
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mul16u dst, xreg ## xhalf, yreg ## yhalf
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#elif XCHAL_HAVE_MUL32
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#define do_mul(dst, xreg, xhalf, yreg, yhalf) \
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mull dst, xreg ## xhalf, yreg ## yhalf
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#elif XCHAL_HAVE_MAC16
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/* The preprocessor insists on inserting a space when concatenating after
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a period in the definition of do_mul below. These macros are a workaround
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using underscores instead of periods when doing the concatenation. */
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#define umul_aa_ll umul.aa.ll
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#define umul_aa_lh umul.aa.lh
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#define umul_aa_hl umul.aa.hl
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#define umul_aa_hh umul.aa.hh
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#define do_mul(dst, xreg, xhalf, yreg, yhalf) \
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umul_aa_ ## xhalf ## yhalf xreg, yreg; \
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rsr dst, ACCLO
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#else /* no multiply hardware */
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#define set_arg_l(dst, src) \
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extui dst, src, 0, 16
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#define set_arg_h(dst, src) \
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srli dst, src, 16
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#ifdef __XTENSA_CALL0_ABI__
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#define do_mul(dst, xreg, xhalf, yreg, yhalf) \
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set_arg_ ## xhalf (a13, xreg); \
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set_arg_ ## yhalf (a14, yreg); \
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call0 .Lmul_mulsi3; \
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mov dst, a12
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#else
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#define do_mul(dst, xreg, xhalf, yreg, yhalf) \
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set_arg_ ## xhalf (a14, xreg); \
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set_arg_ ## yhalf (a15, yreg); \
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call12 .Lmul_mulsi3; \
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mov dst, a14
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#endif /* __XTENSA_CALL0_ABI__ */
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#endif /* no multiply hardware */
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/* Add pp1 and pp2 into a6 with carry-out in a9. */
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do_mul(a6, a2, l, a3, h) /* pp 1 */
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do_mul(a11, a2, h, a3, l) /* pp 2 */
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movi a9, 0
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add a6, a6, a11
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bgeu a6, a11, 1f
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addi a9, a9, 1
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1:
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/* Shift the high half of a9/a6 into position in a9. Note that
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this value can be safely incremented without any carry-outs. */
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ssai 16
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src a9, a9, a6
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/* Compute the low word into a6. */
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do_mul(a11, a2, l, a3, l) /* pp 0 */
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sll a6, a6
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add a6, a6, a11
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bgeu a6, a11, 1f
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addi a9, a9, 1
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1:
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/* Compute the high word into wh. */
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do_mul(wh, a2, h, a3, h) /* pp 3 */
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add wh, wh, a9
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mov wl, a6
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#endif /* !MUL32_HIGH */
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#if defined(__XTENSA_CALL0_ABI__) && XCHAL_NO_MUL
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/* Restore the original return address. */
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l32i a0, sp, 0
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#endif
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#ifdef __XTENSA_CALL0_ABI__
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l32i a12, sp, 16
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l32i a13, sp, 20
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l32i a14, sp, 24
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l32i a15, sp, 28
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abi_ret(32)
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#else
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abi_ret_default
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#endif
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#if XCHAL_NO_MUL
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.macro do_addx2 dst, as, at, tmp
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#if XCHAL_HAVE_ADDX
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addx2 \dst, \as, \at
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#else
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slli \tmp, \as, 1
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add \dst, \tmp, \at
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#endif
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.endm
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.macro do_addx4 dst, as, at, tmp
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#if XCHAL_HAVE_ADDX
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addx4 \dst, \as, \at
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#else
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slli \tmp, \as, 2
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add \dst, \tmp, \at
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#endif
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.endm
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.macro do_addx8 dst, as, at, tmp
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#if XCHAL_HAVE_ADDX
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addx8 \dst, \as, \at
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#else
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slli \tmp, \as, 3
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add \dst, \tmp, \at
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#endif
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.endm
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/* For Xtensa processors with no multiply hardware, this simplified
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version of _mulsi3 is used for multiplying 16-bit chunks of
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the floating-point mantissas. When using CALL0, this function
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uses a custom ABI: the inputs are passed in a13 and a14, the
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result is returned in a12, and a8 and a15 are clobbered. */
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.align 4
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.Lmul_mulsi3:
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abi_entry_default
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.macro mul_mulsi3_body dst, src1, src2, tmp1, tmp2
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movi \dst, 0
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1: add \tmp1, \src2, \dst
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extui \tmp2, \src1, 0, 1
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movnez \dst, \tmp1, \tmp2
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do_addx2 \tmp1, \src2, \dst, \tmp1
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extui \tmp2, \src1, 1, 1
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movnez \dst, \tmp1, \tmp2
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do_addx4 \tmp1, \src2, \dst, \tmp1
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extui \tmp2, \src1, 2, 1
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movnez \dst, \tmp1, \tmp2
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do_addx8 \tmp1, \src2, \dst, \tmp1
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extui \tmp2, \src1, 3, 1
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movnez \dst, \tmp1, \tmp2
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srli \src1, \src1, 4
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slli \src2, \src2, 4
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bnez \src1, 1b
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.endm
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#ifdef __XTENSA_CALL0_ABI__
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mul_mulsi3_body a12, a13, a14, a15, a8
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#else
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/* The result will be written into a2, so save that argument in a4. */
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mov a4, a2
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mul_mulsi3_body a2, a4, a3, a5, a6
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#endif
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abi_ret_default
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#endif /* XCHAL_NO_MUL */
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ENDPROC(__umulsidi3)
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