368 lines
11 KiB
C
368 lines
11 KiB
C
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/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) */
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/* Copyright(c) 2014 - 2020 Intel Corporation */
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#ifndef _ICP_QAT_FW_LA_H_
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#define _ICP_QAT_FW_LA_H_
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#include "icp_qat_fw.h"
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enum icp_qat_fw_la_cmd_id {
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ICP_QAT_FW_LA_CMD_CIPHER = 0,
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ICP_QAT_FW_LA_CMD_AUTH = 1,
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ICP_QAT_FW_LA_CMD_CIPHER_HASH = 2,
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ICP_QAT_FW_LA_CMD_HASH_CIPHER = 3,
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ICP_QAT_FW_LA_CMD_TRNG_GET_RANDOM = 4,
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ICP_QAT_FW_LA_CMD_TRNG_TEST = 5,
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ICP_QAT_FW_LA_CMD_SSL3_KEY_DERIVE = 6,
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ICP_QAT_FW_LA_CMD_TLS_V1_1_KEY_DERIVE = 7,
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ICP_QAT_FW_LA_CMD_TLS_V1_2_KEY_DERIVE = 8,
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ICP_QAT_FW_LA_CMD_MGF1 = 9,
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ICP_QAT_FW_LA_CMD_AUTH_PRE_COMP = 10,
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ICP_QAT_FW_LA_CMD_CIPHER_PRE_COMP = 11,
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ICP_QAT_FW_LA_CMD_DELIMITER = 12
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};
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#define ICP_QAT_FW_LA_ICV_VER_STATUS_PASS ICP_QAT_FW_COMN_STATUS_FLAG_OK
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#define ICP_QAT_FW_LA_ICV_VER_STATUS_FAIL ICP_QAT_FW_COMN_STATUS_FLAG_ERROR
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#define ICP_QAT_FW_LA_TRNG_STATUS_PASS ICP_QAT_FW_COMN_STATUS_FLAG_OK
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#define ICP_QAT_FW_LA_TRNG_STATUS_FAIL ICP_QAT_FW_COMN_STATUS_FLAG_ERROR
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struct icp_qat_fw_la_bulk_req {
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struct icp_qat_fw_comn_req_hdr comn_hdr;
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struct icp_qat_fw_comn_req_hdr_cd_pars cd_pars;
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struct icp_qat_fw_comn_req_mid comn_mid;
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struct icp_qat_fw_comn_req_rqpars serv_specif_rqpars;
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struct icp_qat_fw_comn_req_cd_ctrl cd_ctrl;
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};
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#define ICP_QAT_FW_LA_USE_UCS_SLICE_TYPE 1
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#define QAT_LA_SLICE_TYPE_BITPOS 14
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#define QAT_LA_SLICE_TYPE_MASK 0x3
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#define ICP_QAT_FW_LA_GCM_IV_LEN_12_OCTETS 1
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#define ICP_QAT_FW_LA_GCM_IV_LEN_NOT_12_OCTETS 0
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#define QAT_FW_LA_ZUC_3G_PROTO_FLAG_BITPOS 12
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#define ICP_QAT_FW_LA_ZUC_3G_PROTO 1
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#define QAT_FW_LA_ZUC_3G_PROTO_FLAG_MASK 0x1
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#define QAT_LA_GCM_IV_LEN_FLAG_BITPOS 11
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#define QAT_LA_GCM_IV_LEN_FLAG_MASK 0x1
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#define ICP_QAT_FW_LA_DIGEST_IN_BUFFER 1
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#define ICP_QAT_FW_LA_NO_DIGEST_IN_BUFFER 0
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#define QAT_LA_DIGEST_IN_BUFFER_BITPOS 10
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#define QAT_LA_DIGEST_IN_BUFFER_MASK 0x1
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#define ICP_QAT_FW_LA_SNOW_3G_PROTO 4
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#define ICP_QAT_FW_LA_GCM_PROTO 2
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#define ICP_QAT_FW_LA_CCM_PROTO 1
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#define ICP_QAT_FW_LA_NO_PROTO 0
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#define QAT_LA_PROTO_BITPOS 7
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#define QAT_LA_PROTO_MASK 0x7
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#define ICP_QAT_FW_LA_CMP_AUTH_RES 1
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#define ICP_QAT_FW_LA_NO_CMP_AUTH_RES 0
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#define QAT_LA_CMP_AUTH_RES_BITPOS 6
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#define QAT_LA_CMP_AUTH_RES_MASK 0x1
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#define ICP_QAT_FW_LA_RET_AUTH_RES 1
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#define ICP_QAT_FW_LA_NO_RET_AUTH_RES 0
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#define QAT_LA_RET_AUTH_RES_BITPOS 5
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#define QAT_LA_RET_AUTH_RES_MASK 0x1
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#define ICP_QAT_FW_LA_UPDATE_STATE 1
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#define ICP_QAT_FW_LA_NO_UPDATE_STATE 0
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#define QAT_LA_UPDATE_STATE_BITPOS 4
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#define QAT_LA_UPDATE_STATE_MASK 0x1
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#define ICP_QAT_FW_CIPH_AUTH_CFG_OFFSET_IN_CD_SETUP 0
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#define ICP_QAT_FW_CIPH_AUTH_CFG_OFFSET_IN_SHRAM_CP 1
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#define QAT_LA_CIPH_AUTH_CFG_OFFSET_BITPOS 3
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#define QAT_LA_CIPH_AUTH_CFG_OFFSET_MASK 0x1
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#define ICP_QAT_FW_CIPH_IV_64BIT_PTR 0
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#define ICP_QAT_FW_CIPH_IV_16BYTE_DATA 1
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#define QAT_LA_CIPH_IV_FLD_BITPOS 2
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#define QAT_LA_CIPH_IV_FLD_MASK 0x1
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#define ICP_QAT_FW_LA_PARTIAL_NONE 0
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#define ICP_QAT_FW_LA_PARTIAL_START 1
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#define ICP_QAT_FW_LA_PARTIAL_MID 3
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#define ICP_QAT_FW_LA_PARTIAL_END 2
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#define QAT_LA_PARTIAL_BITPOS 0
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#define QAT_LA_PARTIAL_MASK 0x3
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#define ICP_QAT_FW_LA_FLAGS_BUILD(zuc_proto, gcm_iv_len, auth_rslt, proto, \
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cmp_auth, ret_auth, update_state, \
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ciph_iv, ciphcfg, partial) \
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(((zuc_proto & QAT_FW_LA_ZUC_3G_PROTO_FLAG_MASK) << \
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QAT_FW_LA_ZUC_3G_PROTO_FLAG_BITPOS) | \
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((gcm_iv_len & QAT_LA_GCM_IV_LEN_FLAG_MASK) << \
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QAT_LA_GCM_IV_LEN_FLAG_BITPOS) | \
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((auth_rslt & QAT_LA_DIGEST_IN_BUFFER_MASK) << \
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QAT_LA_DIGEST_IN_BUFFER_BITPOS) | \
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((proto & QAT_LA_PROTO_MASK) << \
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QAT_LA_PROTO_BITPOS) | \
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((cmp_auth & QAT_LA_CMP_AUTH_RES_MASK) << \
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QAT_LA_CMP_AUTH_RES_BITPOS) | \
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((ret_auth & QAT_LA_RET_AUTH_RES_MASK) << \
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QAT_LA_RET_AUTH_RES_BITPOS) | \
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((update_state & QAT_LA_UPDATE_STATE_MASK) << \
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QAT_LA_UPDATE_STATE_BITPOS) | \
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((ciph_iv & QAT_LA_CIPH_IV_FLD_MASK) << \
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QAT_LA_CIPH_IV_FLD_BITPOS) | \
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((ciphcfg & QAT_LA_CIPH_AUTH_CFG_OFFSET_MASK) << \
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QAT_LA_CIPH_AUTH_CFG_OFFSET_BITPOS) | \
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((partial & QAT_LA_PARTIAL_MASK) << \
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QAT_LA_PARTIAL_BITPOS))
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#define ICP_QAT_FW_LA_CIPH_IV_FLD_FLAG_GET(flags) \
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QAT_FIELD_GET(flags, QAT_LA_CIPH_IV_FLD_BITPOS, \
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QAT_LA_CIPH_IV_FLD_MASK)
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#define ICP_QAT_FW_LA_CIPH_AUTH_CFG_OFFSET_FLAG_GET(flags) \
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QAT_FIELD_GET(flags, QAT_LA_CIPH_AUTH_CFG_OFFSET_BITPOS, \
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QAT_LA_CIPH_AUTH_CFG_OFFSET_MASK)
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#define ICP_QAT_FW_LA_ZUC_3G_PROTO_FLAG_GET(flags) \
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QAT_FIELD_GET(flags, QAT_FW_LA_ZUC_3G_PROTO_FLAG_BITPOS, \
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QAT_FW_LA_ZUC_3G_PROTO_FLAG_MASK)
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#define ICP_QAT_FW_LA_GCM_IV_LEN_FLAG_GET(flags) \
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QAT_FIELD_GET(flags, QAT_LA_GCM_IV_LEN_FLAG_BITPOS, \
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QAT_LA_GCM_IV_LEN_FLAG_MASK)
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#define ICP_QAT_FW_LA_PROTO_GET(flags) \
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QAT_FIELD_GET(flags, QAT_LA_PROTO_BITPOS, QAT_LA_PROTO_MASK)
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#define ICP_QAT_FW_LA_CMP_AUTH_GET(flags) \
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QAT_FIELD_GET(flags, QAT_LA_CMP_AUTH_RES_BITPOS, \
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QAT_LA_CMP_AUTH_RES_MASK)
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#define ICP_QAT_FW_LA_RET_AUTH_GET(flags) \
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QAT_FIELD_GET(flags, QAT_LA_RET_AUTH_RES_BITPOS, \
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QAT_LA_RET_AUTH_RES_MASK)
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#define ICP_QAT_FW_LA_DIGEST_IN_BUFFER_GET(flags) \
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QAT_FIELD_GET(flags, QAT_LA_DIGEST_IN_BUFFER_BITPOS, \
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QAT_LA_DIGEST_IN_BUFFER_MASK)
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#define ICP_QAT_FW_LA_UPDATE_STATE_GET(flags) \
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QAT_FIELD_GET(flags, QAT_LA_UPDATE_STATE_BITPOS, \
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QAT_LA_UPDATE_STATE_MASK)
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#define ICP_QAT_FW_LA_PARTIAL_GET(flags) \
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QAT_FIELD_GET(flags, QAT_LA_PARTIAL_BITPOS, \
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QAT_LA_PARTIAL_MASK)
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#define ICP_QAT_FW_LA_CIPH_IV_FLD_FLAG_SET(flags, val) \
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QAT_FIELD_SET(flags, val, QAT_LA_CIPH_IV_FLD_BITPOS, \
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QAT_LA_CIPH_IV_FLD_MASK)
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#define ICP_QAT_FW_LA_CIPH_AUTH_CFG_OFFSET_FLAG_SET(flags, val) \
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QAT_FIELD_SET(flags, val, QAT_LA_CIPH_AUTH_CFG_OFFSET_BITPOS, \
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QAT_LA_CIPH_AUTH_CFG_OFFSET_MASK)
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#define ICP_QAT_FW_LA_ZUC_3G_PROTO_FLAG_SET(flags, val) \
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QAT_FIELD_SET(flags, val, QAT_FW_LA_ZUC_3G_PROTO_FLAG_BITPOS, \
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QAT_FW_LA_ZUC_3G_PROTO_FLAG_MASK)
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#define ICP_QAT_FW_LA_GCM_IV_LEN_FLAG_SET(flags, val) \
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QAT_FIELD_SET(flags, val, QAT_LA_GCM_IV_LEN_FLAG_BITPOS, \
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QAT_LA_GCM_IV_LEN_FLAG_MASK)
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#define ICP_QAT_FW_LA_PROTO_SET(flags, val) \
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QAT_FIELD_SET(flags, val, QAT_LA_PROTO_BITPOS, \
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QAT_LA_PROTO_MASK)
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#define ICP_QAT_FW_LA_CMP_AUTH_SET(flags, val) \
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QAT_FIELD_SET(flags, val, QAT_LA_CMP_AUTH_RES_BITPOS, \
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QAT_LA_CMP_AUTH_RES_MASK)
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#define ICP_QAT_FW_LA_RET_AUTH_SET(flags, val) \
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QAT_FIELD_SET(flags, val, QAT_LA_RET_AUTH_RES_BITPOS, \
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QAT_LA_RET_AUTH_RES_MASK)
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#define ICP_QAT_FW_LA_DIGEST_IN_BUFFER_SET(flags, val) \
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QAT_FIELD_SET(flags, val, QAT_LA_DIGEST_IN_BUFFER_BITPOS, \
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QAT_LA_DIGEST_IN_BUFFER_MASK)
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#define ICP_QAT_FW_LA_UPDATE_STATE_SET(flags, val) \
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QAT_FIELD_SET(flags, val, QAT_LA_UPDATE_STATE_BITPOS, \
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QAT_LA_UPDATE_STATE_MASK)
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#define ICP_QAT_FW_LA_PARTIAL_SET(flags, val) \
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QAT_FIELD_SET(flags, val, QAT_LA_PARTIAL_BITPOS, \
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QAT_LA_PARTIAL_MASK)
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#define ICP_QAT_FW_LA_SLICE_TYPE_SET(flags, val) \
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QAT_FIELD_SET(flags, val, QAT_LA_SLICE_TYPE_BITPOS, \
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QAT_LA_SLICE_TYPE_MASK)
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struct icp_qat_fw_cipher_req_hdr_cd_pars {
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union {
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struct {
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__u64 content_desc_addr;
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__u16 content_desc_resrvd1;
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__u8 content_desc_params_sz;
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__u8 content_desc_hdr_resrvd2;
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__u32 content_desc_resrvd3;
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} s;
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struct {
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__u32 cipher_key_array[ICP_QAT_FW_NUM_LONGWORDS_4];
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} s1;
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} u;
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};
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struct icp_qat_fw_cipher_auth_req_hdr_cd_pars {
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union {
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struct {
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__u64 content_desc_addr;
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__u16 content_desc_resrvd1;
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__u8 content_desc_params_sz;
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__u8 content_desc_hdr_resrvd2;
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__u32 content_desc_resrvd3;
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} s;
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struct {
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__u32 cipher_key_array[ICP_QAT_FW_NUM_LONGWORDS_4];
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} sl;
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} u;
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};
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struct icp_qat_fw_cipher_cd_ctrl_hdr {
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__u8 cipher_state_sz;
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__u8 cipher_key_sz;
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__u8 cipher_cfg_offset;
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__u8 next_curr_id;
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__u8 cipher_padding_sz;
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__u8 resrvd1;
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__u16 resrvd2;
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__u32 resrvd3[ICP_QAT_FW_NUM_LONGWORDS_3];
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};
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struct icp_qat_fw_auth_cd_ctrl_hdr {
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__u32 resrvd1;
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__u8 resrvd2;
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__u8 hash_flags;
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__u8 hash_cfg_offset;
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__u8 next_curr_id;
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__u8 resrvd3;
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__u8 outer_prefix_sz;
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__u8 final_sz;
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__u8 inner_res_sz;
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__u8 resrvd4;
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__u8 inner_state1_sz;
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__u8 inner_state2_offset;
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__u8 inner_state2_sz;
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__u8 outer_config_offset;
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__u8 outer_state1_sz;
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__u8 outer_res_sz;
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__u8 outer_prefix_offset;
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};
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struct icp_qat_fw_cipher_auth_cd_ctrl_hdr {
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__u8 cipher_state_sz;
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__u8 cipher_key_sz;
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__u8 cipher_cfg_offset;
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__u8 next_curr_id_cipher;
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__u8 cipher_padding_sz;
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__u8 hash_flags;
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__u8 hash_cfg_offset;
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__u8 next_curr_id_auth;
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__u8 resrvd1;
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__u8 outer_prefix_sz;
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__u8 final_sz;
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__u8 inner_res_sz;
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__u8 resrvd2;
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__u8 inner_state1_sz;
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__u8 inner_state2_offset;
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__u8 inner_state2_sz;
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__u8 outer_config_offset;
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__u8 outer_state1_sz;
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__u8 outer_res_sz;
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__u8 outer_prefix_offset;
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};
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#define ICP_QAT_FW_AUTH_HDR_FLAG_DO_NESTED 1
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#define ICP_QAT_FW_AUTH_HDR_FLAG_NO_NESTED 0
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#define ICP_QAT_FW_CCM_GCM_AAD_SZ_MAX 240
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#define ICP_QAT_FW_HASH_REQUEST_PARAMETERS_OFFSET \
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(sizeof(struct icp_qat_fw_la_cipher_req_params_t))
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#define ICP_QAT_FW_CIPHER_REQUEST_PARAMETERS_OFFSET (0)
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struct icp_qat_fw_la_cipher_req_params {
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__u32 cipher_offset;
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__u32 cipher_length;
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union {
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__u32 cipher_IV_array[ICP_QAT_FW_NUM_LONGWORDS_4];
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struct {
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__u64 cipher_IV_ptr;
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__u64 resrvd1;
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} s;
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} u;
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};
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struct icp_qat_fw_la_auth_req_params {
|
||
|
|
__u32 auth_off;
|
||
|
|
__u32 auth_len;
|
||
|
|
union {
|
||
|
|
__u64 auth_partial_st_prefix;
|
||
|
|
__u64 aad_adr;
|
||
|
|
} u1;
|
||
|
|
__u64 auth_res_addr;
|
||
|
|
union {
|
||
|
|
__u8 inner_prefix_sz;
|
||
|
|
__u8 aad_sz;
|
||
|
|
} u2;
|
||
|
|
__u8 resrvd1;
|
||
|
|
__u8 hash_state_sz;
|
||
|
|
__u8 auth_res_sz;
|
||
|
|
} __packed;
|
||
|
|
|
||
|
|
struct icp_qat_fw_la_auth_req_params_resrvd_flds {
|
||
|
|
__u32 resrvd[ICP_QAT_FW_NUM_LONGWORDS_6];
|
||
|
|
union {
|
||
|
|
__u8 inner_prefix_sz;
|
||
|
|
__u8 aad_sz;
|
||
|
|
} u2;
|
||
|
|
__u8 resrvd1;
|
||
|
|
__u16 resrvd2;
|
||
|
|
};
|
||
|
|
|
||
|
|
struct icp_qat_fw_la_resp {
|
||
|
|
struct icp_qat_fw_comn_resp_hdr comn_resp;
|
||
|
|
__u64 opaque_data;
|
||
|
|
__u32 resrvd[ICP_QAT_FW_NUM_LONGWORDS_4];
|
||
|
|
};
|
||
|
|
|
||
|
|
#define ICP_QAT_FW_CIPHER_NEXT_ID_GET(cd_ctrl_hdr_t) \
|
||
|
|
((((cd_ctrl_hdr_t)->next_curr_id_cipher) & \
|
||
|
|
ICP_QAT_FW_COMN_NEXT_ID_MASK) >> (ICP_QAT_FW_COMN_NEXT_ID_BITPOS))
|
||
|
|
|
||
|
|
#define ICP_QAT_FW_CIPHER_NEXT_ID_SET(cd_ctrl_hdr_t, val) \
|
||
|
|
{ (cd_ctrl_hdr_t)->next_curr_id_cipher = \
|
||
|
|
((((cd_ctrl_hdr_t)->next_curr_id_cipher) \
|
||
|
|
& ICP_QAT_FW_COMN_CURR_ID_MASK) | \
|
||
|
|
((val << ICP_QAT_FW_COMN_NEXT_ID_BITPOS) \
|
||
|
|
& ICP_QAT_FW_COMN_NEXT_ID_MASK)) }
|
||
|
|
|
||
|
|
#define ICP_QAT_FW_CIPHER_CURR_ID_GET(cd_ctrl_hdr_t) \
|
||
|
|
(((cd_ctrl_hdr_t)->next_curr_id_cipher) \
|
||
|
|
& ICP_QAT_FW_COMN_CURR_ID_MASK)
|
||
|
|
|
||
|
|
#define ICP_QAT_FW_CIPHER_CURR_ID_SET(cd_ctrl_hdr_t, val) \
|
||
|
|
{ (cd_ctrl_hdr_t)->next_curr_id_cipher = \
|
||
|
|
((((cd_ctrl_hdr_t)->next_curr_id_cipher) \
|
||
|
|
& ICP_QAT_FW_COMN_NEXT_ID_MASK) | \
|
||
|
|
((val) & ICP_QAT_FW_COMN_CURR_ID_MASK)) }
|
||
|
|
|
||
|
|
#define ICP_QAT_FW_AUTH_NEXT_ID_GET(cd_ctrl_hdr_t) \
|
||
|
|
((((cd_ctrl_hdr_t)->next_curr_id_auth) & ICP_QAT_FW_COMN_NEXT_ID_MASK) \
|
||
|
|
>> (ICP_QAT_FW_COMN_NEXT_ID_BITPOS))
|
||
|
|
|
||
|
|
#define ICP_QAT_FW_AUTH_NEXT_ID_SET(cd_ctrl_hdr_t, val) \
|
||
|
|
{ (cd_ctrl_hdr_t)->next_curr_id_auth = \
|
||
|
|
((((cd_ctrl_hdr_t)->next_curr_id_auth) \
|
||
|
|
& ICP_QAT_FW_COMN_CURR_ID_MASK) | \
|
||
|
|
((val << ICP_QAT_FW_COMN_NEXT_ID_BITPOS) \
|
||
|
|
& ICP_QAT_FW_COMN_NEXT_ID_MASK)) }
|
||
|
|
|
||
|
|
#define ICP_QAT_FW_AUTH_CURR_ID_GET(cd_ctrl_hdr_t) \
|
||
|
|
(((cd_ctrl_hdr_t)->next_curr_id_auth) \
|
||
|
|
& ICP_QAT_FW_COMN_CURR_ID_MASK)
|
||
|
|
|
||
|
|
#define ICP_QAT_FW_AUTH_CURR_ID_SET(cd_ctrl_hdr_t, val) \
|
||
|
|
{ (cd_ctrl_hdr_t)->next_curr_id_auth = \
|
||
|
|
((((cd_ctrl_hdr_t)->next_curr_id_auth) \
|
||
|
|
& ICP_QAT_FW_COMN_NEXT_ID_MASK) | \
|
||
|
|
((val) & ICP_QAT_FW_COMN_CURR_ID_MASK)) }
|
||
|
|
|
||
|
|
#endif
|