484 lines
13 KiB
C
484 lines
13 KiB
C
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// SPDX-License-Identifier: GPL-2.0 OR MIT
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/*
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* Copyright 2014-2022 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include <linux/printk.h>
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#include <linux/slab.h>
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#include <linux/mm_types.h>
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#include "kfd_priv.h"
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#include "kfd_mqd_manager.h"
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#include "cik_regs.h"
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#include "cik_structs.h"
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#include "oss/oss_2_4_sh_mask.h"
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static inline struct cik_mqd *get_mqd(void *mqd)
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{
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return (struct cik_mqd *)mqd;
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}
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static inline struct cik_sdma_rlc_registers *get_sdma_mqd(void *mqd)
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{
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return (struct cik_sdma_rlc_registers *)mqd;
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}
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static void update_cu_mask(struct mqd_manager *mm, void *mqd,
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struct mqd_update_info *minfo)
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{
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struct cik_mqd *m;
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uint32_t se_mask[4] = {0}; /* 4 is the max # of SEs */
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if (!minfo || (minfo->update_flag != UPDATE_FLAG_CU_MASK) ||
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!minfo->cu_mask.ptr)
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return;
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mqd_symmetrically_map_cu_mask(mm,
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minfo->cu_mask.ptr, minfo->cu_mask.count, se_mask);
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m = get_mqd(mqd);
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m->compute_static_thread_mgmt_se0 = se_mask[0];
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m->compute_static_thread_mgmt_se1 = se_mask[1];
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m->compute_static_thread_mgmt_se2 = se_mask[2];
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m->compute_static_thread_mgmt_se3 = se_mask[3];
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pr_debug("Update cu mask to %#x %#x %#x %#x\n",
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m->compute_static_thread_mgmt_se0,
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m->compute_static_thread_mgmt_se1,
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m->compute_static_thread_mgmt_se2,
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m->compute_static_thread_mgmt_se3);
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}
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static void set_priority(struct cik_mqd *m, struct queue_properties *q)
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{
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m->cp_hqd_pipe_priority = pipe_priority_map[q->priority];
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m->cp_hqd_queue_priority = q->priority;
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}
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static struct kfd_mem_obj *allocate_mqd(struct kfd_dev *kfd,
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struct queue_properties *q)
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{
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struct kfd_mem_obj *mqd_mem_obj;
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if (kfd_gtt_sa_allocate(kfd, sizeof(struct cik_mqd),
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&mqd_mem_obj))
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return NULL;
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return mqd_mem_obj;
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}
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static void init_mqd(struct mqd_manager *mm, void **mqd,
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struct kfd_mem_obj *mqd_mem_obj, uint64_t *gart_addr,
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struct queue_properties *q)
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{
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uint64_t addr;
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struct cik_mqd *m;
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m = (struct cik_mqd *) mqd_mem_obj->cpu_ptr;
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addr = mqd_mem_obj->gpu_addr;
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memset(m, 0, ALIGN(sizeof(struct cik_mqd), 256));
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m->header = 0xC0310800;
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m->compute_pipelinestat_enable = 1;
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m->compute_static_thread_mgmt_se0 = 0xFFFFFFFF;
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m->compute_static_thread_mgmt_se1 = 0xFFFFFFFF;
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m->compute_static_thread_mgmt_se2 = 0xFFFFFFFF;
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m->compute_static_thread_mgmt_se3 = 0xFFFFFFFF;
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/*
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* Make sure to use the last queue state saved on mqd when the cp
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* reassigns the queue, so when queue is switched on/off (e.g over
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* subscription or quantum timeout) the context will be consistent
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*/
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m->cp_hqd_persistent_state =
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DEFAULT_CP_HQD_PERSISTENT_STATE | PRELOAD_REQ;
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m->cp_mqd_control = MQD_CONTROL_PRIV_STATE_EN;
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m->cp_mqd_base_addr_lo = lower_32_bits(addr);
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m->cp_mqd_base_addr_hi = upper_32_bits(addr);
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m->cp_hqd_quantum = QUANTUM_EN | QUANTUM_SCALE_1MS |
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QUANTUM_DURATION(10);
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/*
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* Pipe Priority
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* Identifies the pipe relative priority when this queue is connected
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* to the pipeline. The pipe priority is against the GFX pipe and HP3D.
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* In KFD we are using a fixed pipe priority set to CS_MEDIUM.
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* 0 = CS_LOW (typically below GFX)
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* 1 = CS_MEDIUM (typically between HP3D and GFX
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* 2 = CS_HIGH (typically above HP3D)
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*/
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set_priority(m, q);
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if (q->format == KFD_QUEUE_FORMAT_AQL)
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m->cp_hqd_iq_rptr = AQL_ENABLE;
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*mqd = m;
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if (gart_addr)
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*gart_addr = addr;
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mm->update_mqd(mm, m, q, NULL);
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}
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static void init_mqd_sdma(struct mqd_manager *mm, void **mqd,
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struct kfd_mem_obj *mqd_mem_obj, uint64_t *gart_addr,
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struct queue_properties *q)
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{
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struct cik_sdma_rlc_registers *m;
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m = (struct cik_sdma_rlc_registers *) mqd_mem_obj->cpu_ptr;
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memset(m, 0, sizeof(struct cik_sdma_rlc_registers));
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*mqd = m;
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if (gart_addr)
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*gart_addr = mqd_mem_obj->gpu_addr;
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mm->update_mqd(mm, m, q, NULL);
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}
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static int load_mqd(struct mqd_manager *mm, void *mqd, uint32_t pipe_id,
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uint32_t queue_id, struct queue_properties *p,
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struct mm_struct *mms)
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{
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/* AQL write pointer counts in 64B packets, PM4/CP counts in dwords. */
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uint32_t wptr_shift = (p->format == KFD_QUEUE_FORMAT_AQL ? 4 : 0);
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uint32_t wptr_mask = (uint32_t)((p->queue_size / 4) - 1);
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return mm->dev->kfd2kgd->hqd_load(mm->dev->adev, mqd, pipe_id, queue_id,
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(uint32_t __user *)p->write_ptr,
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wptr_shift, wptr_mask, mms);
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}
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static void __update_mqd(struct mqd_manager *mm, void *mqd,
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struct queue_properties *q, struct mqd_update_info *minfo,
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unsigned int atc_bit)
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{
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struct cik_mqd *m;
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m = get_mqd(mqd);
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m->cp_hqd_pq_control = DEFAULT_RPTR_BLOCK_SIZE |
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DEFAULT_MIN_AVAIL_SIZE;
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m->cp_hqd_ib_control = DEFAULT_MIN_IB_AVAIL_SIZE;
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if (atc_bit) {
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m->cp_hqd_pq_control |= PQ_ATC_EN;
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m->cp_hqd_ib_control |= IB_ATC_EN;
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}
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/*
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* Calculating queue size which is log base 2 of actual queue size -1
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* dwords and another -1 for ffs
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*/
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m->cp_hqd_pq_control |= order_base_2(q->queue_size / 4) - 1;
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m->cp_hqd_pq_base_lo = lower_32_bits((uint64_t)q->queue_address >> 8);
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m->cp_hqd_pq_base_hi = upper_32_bits((uint64_t)q->queue_address >> 8);
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m->cp_hqd_pq_rptr_report_addr_lo = lower_32_bits((uint64_t)q->read_ptr);
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m->cp_hqd_pq_rptr_report_addr_hi = upper_32_bits((uint64_t)q->read_ptr);
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m->cp_hqd_pq_doorbell_control = DOORBELL_OFFSET(q->doorbell_off);
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m->cp_hqd_vmid = q->vmid;
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if (q->format == KFD_QUEUE_FORMAT_AQL)
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m->cp_hqd_pq_control |= NO_UPDATE_RPTR;
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update_cu_mask(mm, mqd, minfo);
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set_priority(m, q);
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q->is_active = QUEUE_IS_ACTIVE(*q);
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}
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static void update_mqd(struct mqd_manager *mm, void *mqd,
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struct queue_properties *q,
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struct mqd_update_info *minfo)
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{
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__update_mqd(mm, mqd, q, minfo, 1);
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}
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static uint32_t read_doorbell_id(void *mqd)
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{
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struct cik_mqd *m = (struct cik_mqd *)mqd;
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return m->queue_doorbell_id0;
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}
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static void update_mqd_hawaii(struct mqd_manager *mm, void *mqd,
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struct queue_properties *q,
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struct mqd_update_info *minfo)
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{
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__update_mqd(mm, mqd, q, minfo, 0);
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}
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static void update_mqd_sdma(struct mqd_manager *mm, void *mqd,
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struct queue_properties *q,
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struct mqd_update_info *minfo)
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{
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struct cik_sdma_rlc_registers *m;
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m = get_sdma_mqd(mqd);
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m->sdma_rlc_rb_cntl = order_base_2(q->queue_size / 4)
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<< SDMA0_RLC0_RB_CNTL__RB_SIZE__SHIFT |
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q->vmid << SDMA0_RLC0_RB_CNTL__RB_VMID__SHIFT |
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1 << SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_ENABLE__SHIFT |
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6 << SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT;
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m->sdma_rlc_rb_base = lower_32_bits(q->queue_address >> 8);
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m->sdma_rlc_rb_base_hi = upper_32_bits(q->queue_address >> 8);
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m->sdma_rlc_rb_rptr_addr_lo = lower_32_bits((uint64_t)q->read_ptr);
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m->sdma_rlc_rb_rptr_addr_hi = upper_32_bits((uint64_t)q->read_ptr);
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m->sdma_rlc_doorbell =
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q->doorbell_off << SDMA0_RLC0_DOORBELL__OFFSET__SHIFT;
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m->sdma_rlc_virtual_addr = q->sdma_vm_addr;
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m->sdma_engine_id = q->sdma_engine_id;
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m->sdma_queue_id = q->sdma_queue_id;
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q->is_active = QUEUE_IS_ACTIVE(*q);
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}
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static void checkpoint_mqd(struct mqd_manager *mm, void *mqd, void *mqd_dst, void *ctl_stack_dst)
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{
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struct cik_mqd *m;
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m = get_mqd(mqd);
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memcpy(mqd_dst, m, sizeof(struct cik_mqd));
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}
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static void restore_mqd(struct mqd_manager *mm, void **mqd,
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struct kfd_mem_obj *mqd_mem_obj, uint64_t *gart_addr,
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struct queue_properties *qp,
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const void *mqd_src,
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const void *ctl_stack_src, const u32 ctl_stack_size)
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{
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uint64_t addr;
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struct cik_mqd *m;
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m = (struct cik_mqd *) mqd_mem_obj->cpu_ptr;
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addr = mqd_mem_obj->gpu_addr;
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memcpy(m, mqd_src, sizeof(*m));
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*mqd = m;
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if (gart_addr)
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*gart_addr = addr;
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m->cp_hqd_pq_doorbell_control = DOORBELL_OFFSET(qp->doorbell_off);
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pr_debug("cp_hqd_pq_doorbell_control 0x%x\n",
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m->cp_hqd_pq_doorbell_control);
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qp->is_active = 0;
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}
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static void checkpoint_mqd_sdma(struct mqd_manager *mm,
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void *mqd,
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void *mqd_dst,
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void *ctl_stack_dst)
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{
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struct cik_sdma_rlc_registers *m;
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m = get_sdma_mqd(mqd);
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memcpy(mqd_dst, m, sizeof(struct cik_sdma_rlc_registers));
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}
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static void restore_mqd_sdma(struct mqd_manager *mm, void **mqd,
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struct kfd_mem_obj *mqd_mem_obj, uint64_t *gart_addr,
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struct queue_properties *qp,
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const void *mqd_src,
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const void *ctl_stack_src, const u32 ctl_stack_size)
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{
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uint64_t addr;
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struct cik_sdma_rlc_registers *m;
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m = (struct cik_sdma_rlc_registers *) mqd_mem_obj->cpu_ptr;
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addr = mqd_mem_obj->gpu_addr;
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memcpy(m, mqd_src, sizeof(*m));
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m->sdma_rlc_doorbell =
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qp->doorbell_off << SDMA0_RLC0_DOORBELL__OFFSET__SHIFT;
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*mqd = m;
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if (gart_addr)
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*gart_addr = addr;
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qp->is_active = 0;
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}
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/*
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* HIQ MQD Implementation, concrete implementation for HIQ MQD implementation.
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* The HIQ queue in Kaveri is using the same MQD structure as all the user mode
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* queues but with different initial values.
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*/
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static void init_mqd_hiq(struct mqd_manager *mm, void **mqd,
|
||
|
|
struct kfd_mem_obj *mqd_mem_obj, uint64_t *gart_addr,
|
||
|
|
struct queue_properties *q)
|
||
|
|
{
|
||
|
|
init_mqd(mm, mqd, mqd_mem_obj, gart_addr, q);
|
||
|
|
}
|
||
|
|
|
||
|
|
static void update_mqd_hiq(struct mqd_manager *mm, void *mqd,
|
||
|
|
struct queue_properties *q,
|
||
|
|
struct mqd_update_info *minfo)
|
||
|
|
{
|
||
|
|
struct cik_mqd *m;
|
||
|
|
|
||
|
|
m = get_mqd(mqd);
|
||
|
|
m->cp_hqd_pq_control = DEFAULT_RPTR_BLOCK_SIZE |
|
||
|
|
DEFAULT_MIN_AVAIL_SIZE |
|
||
|
|
PRIV_STATE |
|
||
|
|
KMD_QUEUE;
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Calculating queue size which is log base 2 of actual queue
|
||
|
|
* size -1 dwords
|
||
|
|
*/
|
||
|
|
m->cp_hqd_pq_control |= order_base_2(q->queue_size / 4) - 1;
|
||
|
|
m->cp_hqd_pq_base_lo = lower_32_bits((uint64_t)q->queue_address >> 8);
|
||
|
|
m->cp_hqd_pq_base_hi = upper_32_bits((uint64_t)q->queue_address >> 8);
|
||
|
|
m->cp_hqd_pq_rptr_report_addr_lo = lower_32_bits((uint64_t)q->read_ptr);
|
||
|
|
m->cp_hqd_pq_rptr_report_addr_hi = upper_32_bits((uint64_t)q->read_ptr);
|
||
|
|
m->cp_hqd_pq_doorbell_control = DOORBELL_OFFSET(q->doorbell_off);
|
||
|
|
|
||
|
|
m->cp_hqd_vmid = q->vmid;
|
||
|
|
|
||
|
|
q->is_active = QUEUE_IS_ACTIVE(*q);
|
||
|
|
|
||
|
|
set_priority(m, q);
|
||
|
|
}
|
||
|
|
|
||
|
|
#if defined(CONFIG_DEBUG_FS)
|
||
|
|
|
||
|
|
static int debugfs_show_mqd(struct seq_file *m, void *data)
|
||
|
|
{
|
||
|
|
seq_hex_dump(m, " ", DUMP_PREFIX_OFFSET, 32, 4,
|
||
|
|
data, sizeof(struct cik_mqd), false);
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int debugfs_show_mqd_sdma(struct seq_file *m, void *data)
|
||
|
|
{
|
||
|
|
seq_hex_dump(m, " ", DUMP_PREFIX_OFFSET, 32, 4,
|
||
|
|
data, sizeof(struct cik_sdma_rlc_registers), false);
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
#endif
|
||
|
|
|
||
|
|
|
||
|
|
struct mqd_manager *mqd_manager_init_cik(enum KFD_MQD_TYPE type,
|
||
|
|
struct kfd_dev *dev)
|
||
|
|
{
|
||
|
|
struct mqd_manager *mqd;
|
||
|
|
|
||
|
|
if (WARN_ON(type >= KFD_MQD_TYPE_MAX))
|
||
|
|
return NULL;
|
||
|
|
|
||
|
|
mqd = kzalloc(sizeof(*mqd), GFP_KERNEL);
|
||
|
|
if (!mqd)
|
||
|
|
return NULL;
|
||
|
|
|
||
|
|
mqd->dev = dev;
|
||
|
|
|
||
|
|
switch (type) {
|
||
|
|
case KFD_MQD_TYPE_CP:
|
||
|
|
mqd->allocate_mqd = allocate_mqd;
|
||
|
|
mqd->init_mqd = init_mqd;
|
||
|
|
mqd->free_mqd = kfd_free_mqd_cp;
|
||
|
|
mqd->load_mqd = load_mqd;
|
||
|
|
mqd->update_mqd = update_mqd;
|
||
|
|
mqd->destroy_mqd = kfd_destroy_mqd_cp;
|
||
|
|
mqd->is_occupied = kfd_is_occupied_cp;
|
||
|
|
mqd->checkpoint_mqd = checkpoint_mqd;
|
||
|
|
mqd->restore_mqd = restore_mqd;
|
||
|
|
mqd->mqd_size = sizeof(struct cik_mqd);
|
||
|
|
#if defined(CONFIG_DEBUG_FS)
|
||
|
|
mqd->debugfs_show_mqd = debugfs_show_mqd;
|
||
|
|
#endif
|
||
|
|
break;
|
||
|
|
case KFD_MQD_TYPE_HIQ:
|
||
|
|
mqd->allocate_mqd = allocate_hiq_mqd;
|
||
|
|
mqd->init_mqd = init_mqd_hiq;
|
||
|
|
mqd->free_mqd = free_mqd_hiq_sdma;
|
||
|
|
mqd->load_mqd = load_mqd;
|
||
|
|
mqd->update_mqd = update_mqd_hiq;
|
||
|
|
mqd->destroy_mqd = kfd_destroy_mqd_cp;
|
||
|
|
mqd->is_occupied = kfd_is_occupied_cp;
|
||
|
|
mqd->mqd_size = sizeof(struct cik_mqd);
|
||
|
|
#if defined(CONFIG_DEBUG_FS)
|
||
|
|
mqd->debugfs_show_mqd = debugfs_show_mqd;
|
||
|
|
#endif
|
||
|
|
mqd->read_doorbell_id = read_doorbell_id;
|
||
|
|
break;
|
||
|
|
case KFD_MQD_TYPE_DIQ:
|
||
|
|
mqd->allocate_mqd = allocate_mqd;
|
||
|
|
mqd->init_mqd = init_mqd_hiq;
|
||
|
|
mqd->free_mqd = kfd_free_mqd_cp;
|
||
|
|
mqd->load_mqd = load_mqd;
|
||
|
|
mqd->update_mqd = update_mqd_hiq;
|
||
|
|
mqd->destroy_mqd = kfd_destroy_mqd_cp;
|
||
|
|
mqd->is_occupied = kfd_is_occupied_cp;
|
||
|
|
mqd->mqd_size = sizeof(struct cik_mqd);
|
||
|
|
#if defined(CONFIG_DEBUG_FS)
|
||
|
|
mqd->debugfs_show_mqd = debugfs_show_mqd;
|
||
|
|
#endif
|
||
|
|
break;
|
||
|
|
case KFD_MQD_TYPE_SDMA:
|
||
|
|
mqd->allocate_mqd = allocate_sdma_mqd;
|
||
|
|
mqd->init_mqd = init_mqd_sdma;
|
||
|
|
mqd->free_mqd = free_mqd_hiq_sdma;
|
||
|
|
mqd->load_mqd = kfd_load_mqd_sdma;
|
||
|
|
mqd->update_mqd = update_mqd_sdma;
|
||
|
|
mqd->destroy_mqd = kfd_destroy_mqd_sdma;
|
||
|
|
mqd->is_occupied = kfd_is_occupied_sdma;
|
||
|
|
mqd->checkpoint_mqd = checkpoint_mqd_sdma;
|
||
|
|
mqd->restore_mqd = restore_mqd_sdma;
|
||
|
|
mqd->mqd_size = sizeof(struct cik_sdma_rlc_registers);
|
||
|
|
#if defined(CONFIG_DEBUG_FS)
|
||
|
|
mqd->debugfs_show_mqd = debugfs_show_mqd_sdma;
|
||
|
|
#endif
|
||
|
|
break;
|
||
|
|
default:
|
||
|
|
kfree(mqd);
|
||
|
|
return NULL;
|
||
|
|
}
|
||
|
|
|
||
|
|
return mqd;
|
||
|
|
}
|
||
|
|
|
||
|
|
struct mqd_manager *mqd_manager_init_cik_hawaii(enum KFD_MQD_TYPE type,
|
||
|
|
struct kfd_dev *dev)
|
||
|
|
{
|
||
|
|
struct mqd_manager *mqd;
|
||
|
|
|
||
|
|
mqd = mqd_manager_init_cik(type, dev);
|
||
|
|
if (!mqd)
|
||
|
|
return NULL;
|
||
|
|
if (type == KFD_MQD_TYPE_CP)
|
||
|
|
mqd->update_mqd = update_mqd_hawaii;
|
||
|
|
return mqd;
|
||
|
|
}
|