84 lines
3.3 KiB
C
84 lines
3.3 KiB
C
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/*
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* Copyright 2015 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef _SMU7_SMUMANAGER_H
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#define _SMU7_SMUMANAGER_H
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#include <pp_endian.h>
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#define SMC_RAM_END 0x40000
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struct smu7_buffer_entry {
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uint32_t data_size;
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uint64_t mc_addr;
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void *kaddr;
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struct amdgpu_bo *handle;
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};
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struct smu7_smumgr {
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struct smu7_buffer_entry smu_buffer;
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struct smu7_buffer_entry header_buffer;
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struct SMU_DRAMData_TOC *toc;
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uint32_t soft_regs_start;
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uint32_t dpm_table_start;
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uint32_t mc_reg_table_start;
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uint32_t fan_table_start;
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uint32_t arb_table_start;
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uint32_t ulv_setting_starts;
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uint8_t security_hard_key;
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uint32_t acpi_optimization;
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uint32_t avfs_btc_param;
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};
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int smu7_copy_bytes_from_smc(struct pp_hwmgr *hwmgr, uint32_t smc_start_address,
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uint32_t *dest, uint32_t byte_count, uint32_t limit);
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int smu7_copy_bytes_to_smc(struct pp_hwmgr *hwmgr, uint32_t smc_start_address,
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const uint8_t *src, uint32_t byte_count, uint32_t limit);
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int smu7_program_jump_on_start(struct pp_hwmgr *hwmgr);
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bool smu7_is_smc_ram_running(struct pp_hwmgr *hwmgr);
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int smu7_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg);
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int smu7_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr, uint16_t msg,
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uint32_t parameter);
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uint32_t smu7_get_argument(struct pp_hwmgr *hwmgr);
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int smu7_send_msg_to_smc_offset(struct pp_hwmgr *hwmgr);
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enum cgs_ucode_id smu7_convert_fw_type_to_cgs(uint32_t fw_type);
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int smu7_read_smc_sram_dword(struct pp_hwmgr *hwmgr, uint32_t smc_addr,
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uint32_t *value, uint32_t limit);
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int smu7_write_smc_sram_dword(struct pp_hwmgr *hwmgr, uint32_t smc_addr,
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uint32_t value, uint32_t limit);
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int smu7_request_smu_load_fw(struct pp_hwmgr *hwmgr);
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int smu7_check_fw_load_finish(struct pp_hwmgr *hwmgr, uint32_t fw_type);
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int smu7_reload_firmware(struct pp_hwmgr *hwmgr);
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int smu7_upload_smu_firmware_image(struct pp_hwmgr *hwmgr);
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int smu7_init(struct pp_hwmgr *hwmgr);
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int smu7_smu_fini(struct pp_hwmgr *hwmgr);
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int smu7_setup_pwr_virus(struct pp_hwmgr *hwmgr);
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#endif
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