244 lines
6.8 KiB
C
244 lines
6.8 KiB
C
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/*
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* Copyright 2013 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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#include "gf100.h"
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const struct nvkm_specsrc
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gf100_pbfb_sources[] = {
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{ 0x10f100, (const struct nvkm_specmux[]) {
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{ 0x1, 0, "unk0" },
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{ 0x3f, 4, "unk4" },
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{}
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}, "pbfb_broadcast_pm_unk100" },
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{}
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};
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const struct nvkm_specsrc
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gf100_pmfb_sources[] = {
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{ 0x140028, (const struct nvkm_specmux[]) {
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{ 0x3fff, 0, "unk0" },
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{ 0x7, 16, "unk16" },
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{ 0x3, 24, "unk24" },
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{ 0x2, 29, "unk29" },
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{}
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}, "pmfb0_pm_unk28" },
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{}
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};
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static const struct nvkm_specsrc
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gf100_l1_sources[] = {
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{ 0x5044a8, (const struct nvkm_specmux[]) {
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{ 0x3f, 0, "sel", true },
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{}
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}, "pgraph_gpc0_tpc0_l1_pm_mux" },
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{}
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};
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static const struct nvkm_specsrc
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gf100_tex_sources[] = {
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{ 0x5042c0, (const struct nvkm_specmux[]) {
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{ 0xf, 0, "sel0", true },
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{ 0x7, 8, "sel1", true },
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{}
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}, "pgraph_gpc0_tpc0_tex_pm_mux_c_d" },
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{}
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};
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static const struct nvkm_specsrc
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gf100_unk400_sources[] = {
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{ 0x50440c, (const struct nvkm_specmux[]) {
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{ 0x3f, 0, "sel", true },
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{}
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}, "pgraph_gpc0_tpc0_unk400_pm_mux" },
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{}
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};
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static const struct nvkm_specdom
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gf100_pm_hub[] = {
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{}
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};
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const struct nvkm_specdom
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gf100_pm_gpc[] = {
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{ 0xe0, (const struct nvkm_specsig[]) {
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{ 0x00, "gpc00_l1_00", gf100_l1_sources },
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{ 0x01, "gpc00_l1_01", gf100_l1_sources },
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{ 0x02, "gpc00_l1_02", gf100_l1_sources },
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{ 0x03, "gpc00_l1_03", gf100_l1_sources },
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{ 0x05, "gpc00_l1_04", gf100_l1_sources },
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{ 0x06, "gpc00_l1_05", gf100_l1_sources },
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{ 0x0a, "gpc00_tex_00", gf100_tex_sources },
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{ 0x0b, "gpc00_tex_01", gf100_tex_sources },
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{ 0x0c, "gpc00_tex_02", gf100_tex_sources },
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{ 0x0d, "gpc00_tex_03", gf100_tex_sources },
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{ 0x0e, "gpc00_tex_04", gf100_tex_sources },
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{ 0x0f, "gpc00_tex_05", gf100_tex_sources },
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{ 0x10, "gpc00_tex_06", gf100_tex_sources },
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{ 0x11, "gpc00_tex_07", gf100_tex_sources },
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{ 0x12, "gpc00_tex_08", gf100_tex_sources },
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{ 0x26, "gpc00_unk400_00", gf100_unk400_sources },
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{}
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}, &gf100_perfctr_func },
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{}
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};
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static const struct nvkm_specdom
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gf100_pm_part[] = {
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{ 0xe0, (const struct nvkm_specsig[]) {
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{ 0x0f, "part00_pbfb_00", gf100_pbfb_sources },
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{ 0x10, "part00_pbfb_01", gf100_pbfb_sources },
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{ 0x21, "part00_pmfb_00", gf100_pmfb_sources },
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{ 0x04, "part00_pmfb_01", gf100_pmfb_sources },
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{ 0x00, "part00_pmfb_02", gf100_pmfb_sources },
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{ 0x02, "part00_pmfb_03", gf100_pmfb_sources },
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{ 0x01, "part00_pmfb_04", gf100_pmfb_sources },
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{ 0x2e, "part00_pmfb_05", gf100_pmfb_sources },
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{ 0x2f, "part00_pmfb_06", gf100_pmfb_sources },
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{ 0x1b, "part00_pmfb_07", gf100_pmfb_sources },
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{ 0x1c, "part00_pmfb_08", gf100_pmfb_sources },
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{ 0x1d, "part00_pmfb_09", gf100_pmfb_sources },
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{ 0x1e, "part00_pmfb_0a", gf100_pmfb_sources },
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{ 0x1f, "part00_pmfb_0b", gf100_pmfb_sources },
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{}
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}, &gf100_perfctr_func },
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{}
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};
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static void
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gf100_perfctr_init(struct nvkm_pm *pm, struct nvkm_perfdom *dom,
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struct nvkm_perfctr *ctr)
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{
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struct nvkm_device *device = pm->engine.subdev.device;
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u32 log = ctr->logic_op;
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u32 src = 0x00000000;
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int i;
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for (i = 0; i < 4; i++)
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src |= ctr->signal[i] << (i * 8);
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nvkm_wr32(device, dom->addr + 0x09c, 0x00040002 | (dom->mode << 3));
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nvkm_wr32(device, dom->addr + 0x100, 0x00000000);
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nvkm_wr32(device, dom->addr + 0x040 + (ctr->slot * 0x08), src);
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nvkm_wr32(device, dom->addr + 0x044 + (ctr->slot * 0x08), log);
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}
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static void
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gf100_perfctr_read(struct nvkm_pm *pm, struct nvkm_perfdom *dom,
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struct nvkm_perfctr *ctr)
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{
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struct nvkm_device *device = pm->engine.subdev.device;
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switch (ctr->slot) {
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case 0: ctr->ctr = nvkm_rd32(device, dom->addr + 0x08c); break;
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case 1: ctr->ctr = nvkm_rd32(device, dom->addr + 0x088); break;
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case 2: ctr->ctr = nvkm_rd32(device, dom->addr + 0x080); break;
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case 3: ctr->ctr = nvkm_rd32(device, dom->addr + 0x090); break;
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}
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dom->clk = nvkm_rd32(device, dom->addr + 0x070);
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}
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static void
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gf100_perfctr_next(struct nvkm_pm *pm, struct nvkm_perfdom *dom)
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{
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struct nvkm_device *device = pm->engine.subdev.device;
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nvkm_wr32(device, dom->addr + 0x06c, dom->signal_nr - 0x40 + 0x27);
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nvkm_wr32(device, dom->addr + 0x0ec, 0x00000011);
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}
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const struct nvkm_funcdom
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gf100_perfctr_func = {
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.init = gf100_perfctr_init,
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.read = gf100_perfctr_read,
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.next = gf100_perfctr_next,
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};
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static void
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gf100_pm_fini(struct nvkm_pm *pm)
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{
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struct nvkm_device *device = pm->engine.subdev.device;
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nvkm_mask(device, 0x000200, 0x10000000, 0x00000000);
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nvkm_mask(device, 0x000200, 0x10000000, 0x10000000);
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}
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static const struct nvkm_pm_func
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gf100_pm_ = {
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.fini = gf100_pm_fini,
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};
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int
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gf100_pm_new_(const struct gf100_pm_func *func, struct nvkm_device *device,
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enum nvkm_subdev_type type, int inst, struct nvkm_pm **ppm)
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{
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struct nvkm_pm *pm;
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u32 mask;
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int ret;
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if (!(pm = *ppm = kzalloc(sizeof(*pm), GFP_KERNEL)))
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return -ENOMEM;
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ret = nvkm_pm_ctor(&gf100_pm_, device, type, inst, pm);
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if (ret)
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return ret;
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/* HUB */
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ret = nvkm_perfdom_new(pm, "hub", 0, 0x1b0000, 0, 0x200,
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func->doms_hub);
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if (ret)
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return ret;
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/* GPC */
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mask = (1 << nvkm_rd32(device, 0x022430)) - 1;
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mask &= ~nvkm_rd32(device, 0x022504);
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mask &= ~nvkm_rd32(device, 0x022584);
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ret = nvkm_perfdom_new(pm, "gpc", mask, 0x180000,
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0x1000, 0x200, func->doms_gpc);
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if (ret)
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return ret;
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/* PART */
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mask = (1 << nvkm_rd32(device, 0x022438)) - 1;
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mask &= ~nvkm_rd32(device, 0x022548);
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mask &= ~nvkm_rd32(device, 0x0225c8);
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ret = nvkm_perfdom_new(pm, "part", mask, 0x1a0000,
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0x1000, 0x200, func->doms_part);
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if (ret)
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return ret;
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return 0;
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}
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static const struct gf100_pm_func
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gf100_pm = {
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.doms_gpc = gf100_pm_gpc,
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.doms_hub = gf100_pm_hub,
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.doms_part = gf100_pm_part,
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};
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int
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gf100_pm_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_pm **ppm)
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{
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return gf100_pm_new_(&gf100_pm, device, type, inst, ppm);
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}
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