717 lines
18 KiB
C
717 lines
18 KiB
C
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/*
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* Copyright 2013 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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#include "priv.h"
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#include <subdev/bios.h>
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#include <subdev/bios/boost.h>
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#include <subdev/bios/cstep.h>
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#include <subdev/bios/perf.h>
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#include <subdev/bios/vpstate.h>
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#include <subdev/fb.h>
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#include <subdev/therm.h>
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#include <subdev/volt.h>
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#include <core/option.h>
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/******************************************************************************
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* misc
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*****************************************************************************/
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static u32
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nvkm_clk_adjust(struct nvkm_clk *clk, bool adjust,
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u8 pstate, u8 domain, u32 input)
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{
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struct nvkm_bios *bios = clk->subdev.device->bios;
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struct nvbios_boostE boostE;
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u8 ver, hdr, cnt, len;
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u32 data;
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data = nvbios_boostEm(bios, pstate, &ver, &hdr, &cnt, &len, &boostE);
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if (data) {
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struct nvbios_boostS boostS;
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u8 idx = 0, sver, shdr;
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u32 subd;
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input = max(boostE.min, input);
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input = min(boostE.max, input);
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do {
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sver = ver;
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shdr = hdr;
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subd = nvbios_boostSp(bios, idx++, data, &sver, &shdr,
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cnt, len, &boostS);
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if (subd && boostS.domain == domain) {
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if (adjust)
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input = input * boostS.percent / 100;
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input = max(boostS.min, input);
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input = min(boostS.max, input);
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break;
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}
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} while (subd);
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}
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return input;
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}
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/******************************************************************************
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* C-States
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*****************************************************************************/
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static bool
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nvkm_cstate_valid(struct nvkm_clk *clk, struct nvkm_cstate *cstate,
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u32 max_volt, int temp)
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{
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const struct nvkm_domain *domain = clk->domains;
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struct nvkm_volt *volt = clk->subdev.device->volt;
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int voltage;
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while (domain && domain->name != nv_clk_src_max) {
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if (domain->flags & NVKM_CLK_DOM_FLAG_VPSTATE) {
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u32 freq = cstate->domain[domain->name];
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switch (clk->boost_mode) {
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case NVKM_CLK_BOOST_NONE:
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if (clk->base_khz && freq > clk->base_khz)
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return false;
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fallthrough;
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case NVKM_CLK_BOOST_BIOS:
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if (clk->boost_khz && freq > clk->boost_khz)
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return false;
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}
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}
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domain++;
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}
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if (!volt)
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return true;
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voltage = nvkm_volt_map(volt, cstate->voltage, temp);
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if (voltage < 0)
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return false;
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return voltage <= min(max_volt, volt->max_uv);
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}
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static struct nvkm_cstate *
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nvkm_cstate_find_best(struct nvkm_clk *clk, struct nvkm_pstate *pstate,
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struct nvkm_cstate *cstate)
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{
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struct nvkm_device *device = clk->subdev.device;
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struct nvkm_volt *volt = device->volt;
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int max_volt;
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if (!pstate || !cstate)
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return NULL;
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if (!volt)
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return cstate;
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max_volt = volt->max_uv;
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if (volt->max0_id != 0xff)
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max_volt = min(max_volt,
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nvkm_volt_map(volt, volt->max0_id, clk->temp));
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if (volt->max1_id != 0xff)
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max_volt = min(max_volt,
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nvkm_volt_map(volt, volt->max1_id, clk->temp));
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if (volt->max2_id != 0xff)
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max_volt = min(max_volt,
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nvkm_volt_map(volt, volt->max2_id, clk->temp));
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list_for_each_entry_from_reverse(cstate, &pstate->list, head) {
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if (nvkm_cstate_valid(clk, cstate, max_volt, clk->temp))
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return cstate;
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}
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return NULL;
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}
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static struct nvkm_cstate *
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nvkm_cstate_get(struct nvkm_clk *clk, struct nvkm_pstate *pstate, int cstatei)
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{
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struct nvkm_cstate *cstate;
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if (cstatei == NVKM_CLK_CSTATE_HIGHEST)
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return list_last_entry(&pstate->list, typeof(*cstate), head);
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else {
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list_for_each_entry(cstate, &pstate->list, head) {
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if (cstate->id == cstatei)
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return cstate;
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}
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}
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return NULL;
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}
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static int
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nvkm_cstate_prog(struct nvkm_clk *clk, struct nvkm_pstate *pstate, int cstatei)
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{
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struct nvkm_subdev *subdev = &clk->subdev;
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struct nvkm_device *device = subdev->device;
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struct nvkm_therm *therm = device->therm;
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struct nvkm_volt *volt = device->volt;
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struct nvkm_cstate *cstate;
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int ret;
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if (!list_empty(&pstate->list)) {
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cstate = nvkm_cstate_get(clk, pstate, cstatei);
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cstate = nvkm_cstate_find_best(clk, pstate, cstate);
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if (!cstate)
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return -EINVAL;
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} else {
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cstate = &pstate->base;
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}
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if (therm) {
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ret = nvkm_therm_cstate(therm, pstate->fanspeed, +1);
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if (ret && ret != -ENODEV) {
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nvkm_error(subdev, "failed to raise fan speed: %d\n", ret);
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return ret;
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}
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}
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if (volt) {
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ret = nvkm_volt_set_id(volt, cstate->voltage,
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pstate->base.voltage, clk->temp, +1);
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if (ret && ret != -ENODEV) {
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nvkm_error(subdev, "failed to raise voltage: %d\n", ret);
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return ret;
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}
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}
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ret = clk->func->calc(clk, cstate);
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if (ret == 0) {
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ret = clk->func->prog(clk);
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clk->func->tidy(clk);
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}
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if (volt) {
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ret = nvkm_volt_set_id(volt, cstate->voltage,
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pstate->base.voltage, clk->temp, -1);
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if (ret && ret != -ENODEV)
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nvkm_error(subdev, "failed to lower voltage: %d\n", ret);
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}
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if (therm) {
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ret = nvkm_therm_cstate(therm, pstate->fanspeed, -1);
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if (ret && ret != -ENODEV)
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nvkm_error(subdev, "failed to lower fan speed: %d\n", ret);
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}
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return ret;
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}
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static void
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nvkm_cstate_del(struct nvkm_cstate *cstate)
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{
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list_del(&cstate->head);
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kfree(cstate);
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}
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static int
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nvkm_cstate_new(struct nvkm_clk *clk, int idx, struct nvkm_pstate *pstate)
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{
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struct nvkm_bios *bios = clk->subdev.device->bios;
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struct nvkm_volt *volt = clk->subdev.device->volt;
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const struct nvkm_domain *domain = clk->domains;
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struct nvkm_cstate *cstate = NULL;
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struct nvbios_cstepX cstepX;
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u8 ver, hdr;
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u32 data;
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data = nvbios_cstepXp(bios, idx, &ver, &hdr, &cstepX);
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if (!data)
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return -ENOENT;
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if (volt && nvkm_volt_map_min(volt, cstepX.voltage) > volt->max_uv)
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return -EINVAL;
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cstate = kzalloc(sizeof(*cstate), GFP_KERNEL);
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if (!cstate)
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return -ENOMEM;
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*cstate = pstate->base;
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cstate->voltage = cstepX.voltage;
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cstate->id = idx;
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while (domain && domain->name != nv_clk_src_max) {
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if (domain->flags & NVKM_CLK_DOM_FLAG_CORE) {
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u32 freq = nvkm_clk_adjust(clk, true, pstate->pstate,
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domain->bios, cstepX.freq);
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cstate->domain[domain->name] = freq;
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}
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domain++;
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}
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list_add(&cstate->head, &pstate->list);
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return 0;
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}
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/******************************************************************************
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* P-States
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*****************************************************************************/
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static int
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nvkm_pstate_prog(struct nvkm_clk *clk, int pstatei)
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{
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struct nvkm_subdev *subdev = &clk->subdev;
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struct nvkm_fb *fb = subdev->device->fb;
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struct nvkm_pci *pci = subdev->device->pci;
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struct nvkm_pstate *pstate;
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int ret, idx = 0;
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list_for_each_entry(pstate, &clk->states, head) {
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if (idx++ == pstatei)
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break;
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}
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nvkm_debug(subdev, "setting performance state %d\n", pstatei);
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clk->pstate = pstatei;
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nvkm_pcie_set_link(pci, pstate->pcie_speed, pstate->pcie_width);
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if (fb && fb->ram && fb->ram->func->calc) {
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struct nvkm_ram *ram = fb->ram;
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int khz = pstate->base.domain[nv_clk_src_mem];
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do {
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ret = ram->func->calc(ram, khz);
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if (ret == 0)
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ret = ram->func->prog(ram);
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} while (ret > 0);
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ram->func->tidy(ram);
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}
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return nvkm_cstate_prog(clk, pstate, NVKM_CLK_CSTATE_HIGHEST);
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}
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static void
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nvkm_pstate_work(struct work_struct *work)
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{
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struct nvkm_clk *clk = container_of(work, typeof(*clk), work);
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struct nvkm_subdev *subdev = &clk->subdev;
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int pstate;
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if (!atomic_xchg(&clk->waiting, 0))
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return;
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clk->pwrsrc = power_supply_is_system_supplied();
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nvkm_trace(subdev, "P %d PWR %d U(AC) %d U(DC) %d A %d T %d°C D %d\n",
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clk->pstate, clk->pwrsrc, clk->ustate_ac, clk->ustate_dc,
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clk->astate, clk->temp, clk->dstate);
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pstate = clk->pwrsrc ? clk->ustate_ac : clk->ustate_dc;
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if (clk->state_nr && pstate != -1) {
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pstate = (pstate < 0) ? clk->astate : pstate;
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pstate = min(pstate, clk->state_nr - 1);
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pstate = max(pstate, clk->dstate);
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} else {
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pstate = clk->pstate = -1;
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}
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nvkm_trace(subdev, "-> %d\n", pstate);
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if (pstate != clk->pstate) {
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int ret = nvkm_pstate_prog(clk, pstate);
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if (ret) {
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nvkm_error(subdev, "error setting pstate %d: %d\n",
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pstate, ret);
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}
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}
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wake_up_all(&clk->wait);
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}
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static int
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nvkm_pstate_calc(struct nvkm_clk *clk, bool wait)
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{
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atomic_set(&clk->waiting, 1);
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schedule_work(&clk->work);
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if (wait)
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wait_event(clk->wait, !atomic_read(&clk->waiting));
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return 0;
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}
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static void
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nvkm_pstate_info(struct nvkm_clk *clk, struct nvkm_pstate *pstate)
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{
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const struct nvkm_domain *clock = clk->domains - 1;
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struct nvkm_cstate *cstate;
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struct nvkm_subdev *subdev = &clk->subdev;
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char info[3][32] = { "", "", "" };
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char name[4] = "--";
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int i = -1;
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if (pstate->pstate != 0xff)
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snprintf(name, sizeof(name), "%02x", pstate->pstate);
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while ((++clock)->name != nv_clk_src_max) {
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u32 lo = pstate->base.domain[clock->name];
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u32 hi = lo;
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if (hi == 0)
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continue;
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nvkm_debug(subdev, "%02x: %10d KHz\n", clock->name, lo);
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list_for_each_entry(cstate, &pstate->list, head) {
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||
|
|
u32 freq = cstate->domain[clock->name];
|
||
|
|
lo = min(lo, freq);
|
||
|
|
hi = max(hi, freq);
|
||
|
|
nvkm_debug(subdev, "%10d KHz\n", freq);
|
||
|
|
}
|
||
|
|
|
||
|
|
if (clock->mname && ++i < ARRAY_SIZE(info)) {
|
||
|
|
lo /= clock->mdiv;
|
||
|
|
hi /= clock->mdiv;
|
||
|
|
if (lo == hi) {
|
||
|
|
snprintf(info[i], sizeof(info[i]), "%s %d MHz",
|
||
|
|
clock->mname, lo);
|
||
|
|
} else {
|
||
|
|
snprintf(info[i], sizeof(info[i]),
|
||
|
|
"%s %d-%d MHz", clock->mname, lo, hi);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
nvkm_debug(subdev, "%s: %s %s %s\n", name, info[0], info[1], info[2]);
|
||
|
|
}
|
||
|
|
|
||
|
|
static void
|
||
|
|
nvkm_pstate_del(struct nvkm_pstate *pstate)
|
||
|
|
{
|
||
|
|
struct nvkm_cstate *cstate, *temp;
|
||
|
|
|
||
|
|
list_for_each_entry_safe(cstate, temp, &pstate->list, head) {
|
||
|
|
nvkm_cstate_del(cstate);
|
||
|
|
}
|
||
|
|
|
||
|
|
list_del(&pstate->head);
|
||
|
|
kfree(pstate);
|
||
|
|
}
|
||
|
|
|
||
|
|
static int
|
||
|
|
nvkm_pstate_new(struct nvkm_clk *clk, int idx)
|
||
|
|
{
|
||
|
|
struct nvkm_bios *bios = clk->subdev.device->bios;
|
||
|
|
const struct nvkm_domain *domain = clk->domains - 1;
|
||
|
|
struct nvkm_pstate *pstate;
|
||
|
|
struct nvkm_cstate *cstate;
|
||
|
|
struct nvbios_cstepE cstepE;
|
||
|
|
struct nvbios_perfE perfE;
|
||
|
|
u8 ver, hdr, cnt, len;
|
||
|
|
u32 data;
|
||
|
|
|
||
|
|
data = nvbios_perfEp(bios, idx, &ver, &hdr, &cnt, &len, &perfE);
|
||
|
|
if (!data)
|
||
|
|
return -EINVAL;
|
||
|
|
if (perfE.pstate == 0xff)
|
||
|
|
return 0;
|
||
|
|
|
||
|
|
pstate = kzalloc(sizeof(*pstate), GFP_KERNEL);
|
||
|
|
cstate = &pstate->base;
|
||
|
|
if (!pstate)
|
||
|
|
return -ENOMEM;
|
||
|
|
|
||
|
|
INIT_LIST_HEAD(&pstate->list);
|
||
|
|
|
||
|
|
pstate->pstate = perfE.pstate;
|
||
|
|
pstate->fanspeed = perfE.fanspeed;
|
||
|
|
pstate->pcie_speed = perfE.pcie_speed;
|
||
|
|
pstate->pcie_width = perfE.pcie_width;
|
||
|
|
cstate->voltage = perfE.voltage;
|
||
|
|
cstate->domain[nv_clk_src_core] = perfE.core;
|
||
|
|
cstate->domain[nv_clk_src_shader] = perfE.shader;
|
||
|
|
cstate->domain[nv_clk_src_mem] = perfE.memory;
|
||
|
|
cstate->domain[nv_clk_src_vdec] = perfE.vdec;
|
||
|
|
cstate->domain[nv_clk_src_dom6] = perfE.disp;
|
||
|
|
|
||
|
|
while (ver >= 0x40 && (++domain)->name != nv_clk_src_max) {
|
||
|
|
struct nvbios_perfS perfS;
|
||
|
|
u8 sver = ver, shdr = hdr;
|
||
|
|
u32 perfSe = nvbios_perfSp(bios, data, domain->bios,
|
||
|
|
&sver, &shdr, cnt, len, &perfS);
|
||
|
|
if (perfSe == 0 || sver != 0x40)
|
||
|
|
continue;
|
||
|
|
|
||
|
|
if (domain->flags & NVKM_CLK_DOM_FLAG_CORE) {
|
||
|
|
perfS.v40.freq = nvkm_clk_adjust(clk, false,
|
||
|
|
pstate->pstate,
|
||
|
|
domain->bios,
|
||
|
|
perfS.v40.freq);
|
||
|
|
}
|
||
|
|
|
||
|
|
cstate->domain[domain->name] = perfS.v40.freq;
|
||
|
|
}
|
||
|
|
|
||
|
|
data = nvbios_cstepEm(bios, pstate->pstate, &ver, &hdr, &cstepE);
|
||
|
|
if (data) {
|
||
|
|
int idx = cstepE.index;
|
||
|
|
do {
|
||
|
|
nvkm_cstate_new(clk, idx, pstate);
|
||
|
|
} while(idx--);
|
||
|
|
}
|
||
|
|
|
||
|
|
nvkm_pstate_info(clk, pstate);
|
||
|
|
list_add_tail(&pstate->head, &clk->states);
|
||
|
|
clk->state_nr++;
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
/******************************************************************************
|
||
|
|
* Adjustment triggers
|
||
|
|
*****************************************************************************/
|
||
|
|
static int
|
||
|
|
nvkm_clk_ustate_update(struct nvkm_clk *clk, int req)
|
||
|
|
{
|
||
|
|
struct nvkm_pstate *pstate;
|
||
|
|
int i = 0;
|
||
|
|
|
||
|
|
if (!clk->allow_reclock)
|
||
|
|
return -ENOSYS;
|
||
|
|
|
||
|
|
if (req != -1 && req != -2) {
|
||
|
|
list_for_each_entry(pstate, &clk->states, head) {
|
||
|
|
if (pstate->pstate == req)
|
||
|
|
break;
|
||
|
|
i++;
|
||
|
|
}
|
||
|
|
|
||
|
|
if (pstate->pstate != req)
|
||
|
|
return -EINVAL;
|
||
|
|
req = i;
|
||
|
|
}
|
||
|
|
|
||
|
|
return req + 2;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int
|
||
|
|
nvkm_clk_nstate(struct nvkm_clk *clk, const char *mode, int arglen)
|
||
|
|
{
|
||
|
|
int ret = 1;
|
||
|
|
|
||
|
|
if (clk->allow_reclock && !strncasecmpz(mode, "auto", arglen))
|
||
|
|
return -2;
|
||
|
|
|
||
|
|
if (strncasecmpz(mode, "disabled", arglen)) {
|
||
|
|
char save = mode[arglen];
|
||
|
|
long v;
|
||
|
|
|
||
|
|
((char *)mode)[arglen] = '\0';
|
||
|
|
if (!kstrtol(mode, 0, &v)) {
|
||
|
|
ret = nvkm_clk_ustate_update(clk, v);
|
||
|
|
if (ret < 0)
|
||
|
|
ret = 1;
|
||
|
|
}
|
||
|
|
((char *)mode)[arglen] = save;
|
||
|
|
}
|
||
|
|
|
||
|
|
return ret - 2;
|
||
|
|
}
|
||
|
|
|
||
|
|
int
|
||
|
|
nvkm_clk_ustate(struct nvkm_clk *clk, int req, int pwr)
|
||
|
|
{
|
||
|
|
int ret = nvkm_clk_ustate_update(clk, req);
|
||
|
|
if (ret >= 0) {
|
||
|
|
if (ret -= 2, pwr) clk->ustate_ac = ret;
|
||
|
|
else clk->ustate_dc = ret;
|
||
|
|
return nvkm_pstate_calc(clk, true);
|
||
|
|
}
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
int
|
||
|
|
nvkm_clk_astate(struct nvkm_clk *clk, int req, int rel, bool wait)
|
||
|
|
{
|
||
|
|
if (!rel) clk->astate = req;
|
||
|
|
if ( rel) clk->astate += rel;
|
||
|
|
clk->astate = min(clk->astate, clk->state_nr - 1);
|
||
|
|
clk->astate = max(clk->astate, 0);
|
||
|
|
return nvkm_pstate_calc(clk, wait);
|
||
|
|
}
|
||
|
|
|
||
|
|
int
|
||
|
|
nvkm_clk_tstate(struct nvkm_clk *clk, u8 temp)
|
||
|
|
{
|
||
|
|
if (clk->temp == temp)
|
||
|
|
return 0;
|
||
|
|
clk->temp = temp;
|
||
|
|
return nvkm_pstate_calc(clk, false);
|
||
|
|
}
|
||
|
|
|
||
|
|
int
|
||
|
|
nvkm_clk_dstate(struct nvkm_clk *clk, int req, int rel)
|
||
|
|
{
|
||
|
|
if (!rel) clk->dstate = req;
|
||
|
|
if ( rel) clk->dstate += rel;
|
||
|
|
clk->dstate = min(clk->dstate, clk->state_nr - 1);
|
||
|
|
clk->dstate = max(clk->dstate, 0);
|
||
|
|
return nvkm_pstate_calc(clk, true);
|
||
|
|
}
|
||
|
|
|
||
|
|
int
|
||
|
|
nvkm_clk_pwrsrc(struct nvkm_device *device)
|
||
|
|
{
|
||
|
|
if (device->clk)
|
||
|
|
return nvkm_pstate_calc(device->clk, false);
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
/******************************************************************************
|
||
|
|
* subdev base class implementation
|
||
|
|
*****************************************************************************/
|
||
|
|
|
||
|
|
int
|
||
|
|
nvkm_clk_read(struct nvkm_clk *clk, enum nv_clk_src src)
|
||
|
|
{
|
||
|
|
return clk->func->read(clk, src);
|
||
|
|
}
|
||
|
|
|
||
|
|
static int
|
||
|
|
nvkm_clk_fini(struct nvkm_subdev *subdev, bool suspend)
|
||
|
|
{
|
||
|
|
struct nvkm_clk *clk = nvkm_clk(subdev);
|
||
|
|
flush_work(&clk->work);
|
||
|
|
if (clk->func->fini)
|
||
|
|
clk->func->fini(clk);
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int
|
||
|
|
nvkm_clk_init(struct nvkm_subdev *subdev)
|
||
|
|
{
|
||
|
|
struct nvkm_clk *clk = nvkm_clk(subdev);
|
||
|
|
const struct nvkm_domain *clock = clk->domains;
|
||
|
|
int ret;
|
||
|
|
|
||
|
|
memset(&clk->bstate, 0x00, sizeof(clk->bstate));
|
||
|
|
INIT_LIST_HEAD(&clk->bstate.list);
|
||
|
|
clk->bstate.pstate = 0xff;
|
||
|
|
|
||
|
|
while (clock->name != nv_clk_src_max) {
|
||
|
|
ret = nvkm_clk_read(clk, clock->name);
|
||
|
|
if (ret < 0) {
|
||
|
|
nvkm_error(subdev, "%02x freq unknown\n", clock->name);
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
clk->bstate.base.domain[clock->name] = ret;
|
||
|
|
clock++;
|
||
|
|
}
|
||
|
|
|
||
|
|
nvkm_pstate_info(clk, &clk->bstate);
|
||
|
|
|
||
|
|
if (clk->func->init)
|
||
|
|
return clk->func->init(clk);
|
||
|
|
|
||
|
|
clk->astate = clk->state_nr - 1;
|
||
|
|
clk->dstate = 0;
|
||
|
|
clk->pstate = -1;
|
||
|
|
clk->temp = 90; /* reasonable default value */
|
||
|
|
nvkm_pstate_calc(clk, true);
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static void *
|
||
|
|
nvkm_clk_dtor(struct nvkm_subdev *subdev)
|
||
|
|
{
|
||
|
|
struct nvkm_clk *clk = nvkm_clk(subdev);
|
||
|
|
struct nvkm_pstate *pstate, *temp;
|
||
|
|
|
||
|
|
/* Early return if the pstates have been provided statically */
|
||
|
|
if (clk->func->pstates)
|
||
|
|
return clk;
|
||
|
|
|
||
|
|
list_for_each_entry_safe(pstate, temp, &clk->states, head) {
|
||
|
|
nvkm_pstate_del(pstate);
|
||
|
|
}
|
||
|
|
|
||
|
|
return clk;
|
||
|
|
}
|
||
|
|
|
||
|
|
static const struct nvkm_subdev_func
|
||
|
|
nvkm_clk = {
|
||
|
|
.dtor = nvkm_clk_dtor,
|
||
|
|
.init = nvkm_clk_init,
|
||
|
|
.fini = nvkm_clk_fini,
|
||
|
|
};
|
||
|
|
|
||
|
|
int
|
||
|
|
nvkm_clk_ctor(const struct nvkm_clk_func *func, struct nvkm_device *device,
|
||
|
|
enum nvkm_subdev_type type, int inst, bool allow_reclock, struct nvkm_clk *clk)
|
||
|
|
{
|
||
|
|
struct nvkm_subdev *subdev = &clk->subdev;
|
||
|
|
struct nvkm_bios *bios = device->bios;
|
||
|
|
int ret, idx, arglen;
|
||
|
|
const char *mode;
|
||
|
|
struct nvbios_vpstate_header h;
|
||
|
|
|
||
|
|
nvkm_subdev_ctor(&nvkm_clk, device, type, inst, subdev);
|
||
|
|
|
||
|
|
if (bios && !nvbios_vpstate_parse(bios, &h)) {
|
||
|
|
struct nvbios_vpstate_entry base, boost;
|
||
|
|
if (!nvbios_vpstate_entry(bios, &h, h.boost_id, &boost))
|
||
|
|
clk->boost_khz = boost.clock_mhz * 1000;
|
||
|
|
if (!nvbios_vpstate_entry(bios, &h, h.base_id, &base))
|
||
|
|
clk->base_khz = base.clock_mhz * 1000;
|
||
|
|
}
|
||
|
|
|
||
|
|
clk->func = func;
|
||
|
|
INIT_LIST_HEAD(&clk->states);
|
||
|
|
clk->domains = func->domains;
|
||
|
|
clk->ustate_ac = -1;
|
||
|
|
clk->ustate_dc = -1;
|
||
|
|
clk->allow_reclock = allow_reclock;
|
||
|
|
|
||
|
|
INIT_WORK(&clk->work, nvkm_pstate_work);
|
||
|
|
init_waitqueue_head(&clk->wait);
|
||
|
|
atomic_set(&clk->waiting, 0);
|
||
|
|
|
||
|
|
/* If no pstates are provided, try and fetch them from the BIOS */
|
||
|
|
if (!func->pstates) {
|
||
|
|
idx = 0;
|
||
|
|
do {
|
||
|
|
ret = nvkm_pstate_new(clk, idx++);
|
||
|
|
} while (ret == 0);
|
||
|
|
} else {
|
||
|
|
for (idx = 0; idx < func->nr_pstates; idx++)
|
||
|
|
list_add_tail(&func->pstates[idx].head, &clk->states);
|
||
|
|
clk->state_nr = func->nr_pstates;
|
||
|
|
}
|
||
|
|
|
||
|
|
mode = nvkm_stropt(device->cfgopt, "NvClkMode", &arglen);
|
||
|
|
if (mode) {
|
||
|
|
clk->ustate_ac = nvkm_clk_nstate(clk, mode, arglen);
|
||
|
|
clk->ustate_dc = nvkm_clk_nstate(clk, mode, arglen);
|
||
|
|
}
|
||
|
|
|
||
|
|
mode = nvkm_stropt(device->cfgopt, "NvClkModeAC", &arglen);
|
||
|
|
if (mode)
|
||
|
|
clk->ustate_ac = nvkm_clk_nstate(clk, mode, arglen);
|
||
|
|
|
||
|
|
mode = nvkm_stropt(device->cfgopt, "NvClkModeDC", &arglen);
|
||
|
|
if (mode)
|
||
|
|
clk->ustate_dc = nvkm_clk_nstate(clk, mode, arglen);
|
||
|
|
|
||
|
|
clk->boost_mode = nvkm_longopt(device->cfgopt, "NvBoost",
|
||
|
|
NVKM_CLK_BOOST_NONE);
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
int
|
||
|
|
nvkm_clk_new_(const struct nvkm_clk_func *func, struct nvkm_device *device,
|
||
|
|
enum nvkm_subdev_type type, int inst, bool allow_reclock, struct nvkm_clk **pclk)
|
||
|
|
{
|
||
|
|
if (!(*pclk = kzalloc(sizeof(**pclk), GFP_KERNEL)))
|
||
|
|
return -ENOMEM;
|
||
|
|
return nvkm_clk_ctor(func, device, type, inst, allow_reclock, *pclk);
|
||
|
|
}
|