429 lines
11 KiB
C
429 lines
11 KiB
C
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// SPDX-License-Identifier: GPL-2.0
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/* Copyright 2018 Marty E. Plummer <hanetzer@startmail.com> */
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/* Copyright 2019 Linaro, Ltd, Rob Herring <robh@kernel.org> */
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#include <linux/clk.h>
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#include <linux/reset.h>
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#include <linux/platform_device.h>
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#include <linux/pm_domain.h>
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#include <linux/pm_runtime.h>
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#include <linux/regulator/consumer.h>
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#include "panfrost_device.h"
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#include "panfrost_devfreq.h"
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#include "panfrost_features.h"
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#include "panfrost_issues.h"
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#include "panfrost_gpu.h"
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#include "panfrost_job.h"
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#include "panfrost_mmu.h"
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#include "panfrost_perfcnt.h"
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static int panfrost_reset_init(struct panfrost_device *pfdev)
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{
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pfdev->rstc = devm_reset_control_array_get_optional_exclusive(pfdev->dev);
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if (IS_ERR(pfdev->rstc)) {
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dev_err(pfdev->dev, "get reset failed %ld\n", PTR_ERR(pfdev->rstc));
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return PTR_ERR(pfdev->rstc);
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}
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return reset_control_deassert(pfdev->rstc);
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}
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static void panfrost_reset_fini(struct panfrost_device *pfdev)
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{
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reset_control_assert(pfdev->rstc);
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}
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static int panfrost_clk_init(struct panfrost_device *pfdev)
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{
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int err;
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unsigned long rate;
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pfdev->clock = devm_clk_get(pfdev->dev, NULL);
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if (IS_ERR(pfdev->clock)) {
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dev_err(pfdev->dev, "get clock failed %ld\n", PTR_ERR(pfdev->clock));
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return PTR_ERR(pfdev->clock);
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}
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rate = clk_get_rate(pfdev->clock);
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dev_info(pfdev->dev, "clock rate = %lu\n", rate);
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err = clk_prepare_enable(pfdev->clock);
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if (err)
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return err;
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pfdev->bus_clock = devm_clk_get_optional(pfdev->dev, "bus");
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if (IS_ERR(pfdev->bus_clock)) {
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dev_err(pfdev->dev, "get bus_clock failed %ld\n",
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PTR_ERR(pfdev->bus_clock));
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err = PTR_ERR(pfdev->bus_clock);
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goto disable_clock;
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}
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if (pfdev->bus_clock) {
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rate = clk_get_rate(pfdev->bus_clock);
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dev_info(pfdev->dev, "bus_clock rate = %lu\n", rate);
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err = clk_prepare_enable(pfdev->bus_clock);
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if (err)
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goto disable_clock;
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}
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return 0;
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disable_clock:
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clk_disable_unprepare(pfdev->clock);
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return err;
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}
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static void panfrost_clk_fini(struct panfrost_device *pfdev)
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{
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clk_disable_unprepare(pfdev->bus_clock);
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clk_disable_unprepare(pfdev->clock);
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}
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static int panfrost_regulator_init(struct panfrost_device *pfdev)
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{
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int ret, i;
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pfdev->regulators = devm_kcalloc(pfdev->dev, pfdev->comp->num_supplies,
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sizeof(*pfdev->regulators),
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GFP_KERNEL);
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if (!pfdev->regulators)
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return -ENOMEM;
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for (i = 0; i < pfdev->comp->num_supplies; i++)
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pfdev->regulators[i].supply = pfdev->comp->supply_names[i];
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ret = devm_regulator_bulk_get(pfdev->dev,
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pfdev->comp->num_supplies,
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pfdev->regulators);
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if (ret < 0) {
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if (ret != -EPROBE_DEFER)
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dev_err(pfdev->dev, "failed to get regulators: %d\n",
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ret);
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return ret;
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}
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ret = regulator_bulk_enable(pfdev->comp->num_supplies,
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pfdev->regulators);
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if (ret < 0) {
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dev_err(pfdev->dev, "failed to enable regulators: %d\n", ret);
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return ret;
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}
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return 0;
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}
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static void panfrost_regulator_fini(struct panfrost_device *pfdev)
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{
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if (!pfdev->regulators)
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return;
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regulator_bulk_disable(pfdev->comp->num_supplies, pfdev->regulators);
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}
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static void panfrost_pm_domain_fini(struct panfrost_device *pfdev)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(pfdev->pm_domain_devs); i++) {
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if (!pfdev->pm_domain_devs[i])
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break;
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if (pfdev->pm_domain_links[i])
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device_link_del(pfdev->pm_domain_links[i]);
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dev_pm_domain_detach(pfdev->pm_domain_devs[i], true);
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}
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}
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static int panfrost_pm_domain_init(struct panfrost_device *pfdev)
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{
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int err;
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int i, num_domains;
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num_domains = of_count_phandle_with_args(pfdev->dev->of_node,
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"power-domains",
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"#power-domain-cells");
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/*
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* Single domain is handled by the core, and, if only a single power
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* the power domain is requested, the property is optional.
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*/
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if (num_domains < 2 && pfdev->comp->num_pm_domains < 2)
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return 0;
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if (num_domains != pfdev->comp->num_pm_domains) {
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dev_err(pfdev->dev,
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"Incorrect number of power domains: %d provided, %d needed\n",
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num_domains, pfdev->comp->num_pm_domains);
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return -EINVAL;
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}
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if (WARN(num_domains > ARRAY_SIZE(pfdev->pm_domain_devs),
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"Too many supplies in compatible structure.\n"))
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return -EINVAL;
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for (i = 0; i < num_domains; i++) {
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pfdev->pm_domain_devs[i] =
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dev_pm_domain_attach_by_name(pfdev->dev,
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pfdev->comp->pm_domain_names[i]);
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if (IS_ERR_OR_NULL(pfdev->pm_domain_devs[i])) {
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err = PTR_ERR(pfdev->pm_domain_devs[i]) ? : -ENODATA;
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pfdev->pm_domain_devs[i] = NULL;
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dev_err(pfdev->dev,
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"failed to get pm-domain %s(%d): %d\n",
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pfdev->comp->pm_domain_names[i], i, err);
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goto err;
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}
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pfdev->pm_domain_links[i] = device_link_add(pfdev->dev,
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pfdev->pm_domain_devs[i], DL_FLAG_PM_RUNTIME |
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DL_FLAG_STATELESS | DL_FLAG_RPM_ACTIVE);
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if (!pfdev->pm_domain_links[i]) {
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dev_err(pfdev->pm_domain_devs[i],
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"adding device link failed!\n");
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err = -ENODEV;
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goto err;
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}
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}
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return 0;
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err:
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panfrost_pm_domain_fini(pfdev);
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return err;
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}
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int panfrost_device_init(struct panfrost_device *pfdev)
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{
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int err;
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mutex_init(&pfdev->sched_lock);
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INIT_LIST_HEAD(&pfdev->scheduled_jobs);
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INIT_LIST_HEAD(&pfdev->as_lru_list);
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spin_lock_init(&pfdev->as_lock);
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err = panfrost_clk_init(pfdev);
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if (err) {
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dev_err(pfdev->dev, "clk init failed %d\n", err);
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return err;
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}
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err = panfrost_devfreq_init(pfdev);
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if (err) {
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if (err != -EPROBE_DEFER)
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dev_err(pfdev->dev, "devfreq init failed %d\n", err);
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goto out_clk;
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}
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/* OPP will handle regulators */
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if (!pfdev->pfdevfreq.opp_of_table_added) {
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err = panfrost_regulator_init(pfdev);
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if (err)
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goto out_devfreq;
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}
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err = panfrost_reset_init(pfdev);
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if (err) {
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dev_err(pfdev->dev, "reset init failed %d\n", err);
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goto out_regulator;
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}
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err = panfrost_pm_domain_init(pfdev);
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if (err)
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goto out_reset;
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pfdev->iomem = devm_platform_ioremap_resource(pfdev->pdev, 0);
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if (IS_ERR(pfdev->iomem)) {
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err = PTR_ERR(pfdev->iomem);
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goto out_pm_domain;
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}
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err = panfrost_gpu_init(pfdev);
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if (err)
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goto out_pm_domain;
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err = panfrost_mmu_init(pfdev);
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if (err)
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goto out_gpu;
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err = panfrost_job_init(pfdev);
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if (err)
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goto out_mmu;
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err = panfrost_perfcnt_init(pfdev);
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if (err)
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goto out_job;
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return 0;
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out_job:
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panfrost_job_fini(pfdev);
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out_mmu:
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panfrost_mmu_fini(pfdev);
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out_gpu:
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panfrost_gpu_fini(pfdev);
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out_pm_domain:
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panfrost_pm_domain_fini(pfdev);
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out_reset:
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panfrost_reset_fini(pfdev);
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out_regulator:
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panfrost_regulator_fini(pfdev);
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out_devfreq:
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panfrost_devfreq_fini(pfdev);
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out_clk:
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panfrost_clk_fini(pfdev);
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return err;
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}
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void panfrost_device_fini(struct panfrost_device *pfdev)
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{
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panfrost_perfcnt_fini(pfdev);
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panfrost_job_fini(pfdev);
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panfrost_mmu_fini(pfdev);
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panfrost_gpu_fini(pfdev);
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panfrost_pm_domain_fini(pfdev);
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panfrost_reset_fini(pfdev);
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panfrost_devfreq_fini(pfdev);
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panfrost_regulator_fini(pfdev);
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panfrost_clk_fini(pfdev);
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}
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#define PANFROST_EXCEPTION(id) \
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[DRM_PANFROST_EXCEPTION_ ## id] = { \
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.name = #id, \
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}
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struct panfrost_exception_info {
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const char *name;
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};
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static const struct panfrost_exception_info panfrost_exception_infos[] = {
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PANFROST_EXCEPTION(OK),
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PANFROST_EXCEPTION(DONE),
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PANFROST_EXCEPTION(INTERRUPTED),
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PANFROST_EXCEPTION(STOPPED),
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PANFROST_EXCEPTION(TERMINATED),
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PANFROST_EXCEPTION(KABOOM),
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PANFROST_EXCEPTION(EUREKA),
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PANFROST_EXCEPTION(ACTIVE),
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PANFROST_EXCEPTION(JOB_CONFIG_FAULT),
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PANFROST_EXCEPTION(JOB_POWER_FAULT),
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PANFROST_EXCEPTION(JOB_READ_FAULT),
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PANFROST_EXCEPTION(JOB_WRITE_FAULT),
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PANFROST_EXCEPTION(JOB_AFFINITY_FAULT),
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PANFROST_EXCEPTION(JOB_BUS_FAULT),
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PANFROST_EXCEPTION(INSTR_INVALID_PC),
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PANFROST_EXCEPTION(INSTR_INVALID_ENC),
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PANFROST_EXCEPTION(INSTR_TYPE_MISMATCH),
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PANFROST_EXCEPTION(INSTR_OPERAND_FAULT),
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PANFROST_EXCEPTION(INSTR_TLS_FAULT),
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PANFROST_EXCEPTION(INSTR_BARRIER_FAULT),
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PANFROST_EXCEPTION(INSTR_ALIGN_FAULT),
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PANFROST_EXCEPTION(DATA_INVALID_FAULT),
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PANFROST_EXCEPTION(TILE_RANGE_FAULT),
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PANFROST_EXCEPTION(ADDR_RANGE_FAULT),
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PANFROST_EXCEPTION(IMPRECISE_FAULT),
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PANFROST_EXCEPTION(OOM),
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PANFROST_EXCEPTION(OOM_AFBC),
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PANFROST_EXCEPTION(UNKNOWN),
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PANFROST_EXCEPTION(DELAYED_BUS_FAULT),
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PANFROST_EXCEPTION(GPU_SHAREABILITY_FAULT),
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PANFROST_EXCEPTION(SYS_SHAREABILITY_FAULT),
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PANFROST_EXCEPTION(GPU_CACHEABILITY_FAULT),
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PANFROST_EXCEPTION(TRANSLATION_FAULT_0),
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PANFROST_EXCEPTION(TRANSLATION_FAULT_1),
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PANFROST_EXCEPTION(TRANSLATION_FAULT_2),
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PANFROST_EXCEPTION(TRANSLATION_FAULT_3),
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PANFROST_EXCEPTION(TRANSLATION_FAULT_4),
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PANFROST_EXCEPTION(TRANSLATION_FAULT_IDENTITY),
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PANFROST_EXCEPTION(PERM_FAULT_0),
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PANFROST_EXCEPTION(PERM_FAULT_1),
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PANFROST_EXCEPTION(PERM_FAULT_2),
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PANFROST_EXCEPTION(PERM_FAULT_3),
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PANFROST_EXCEPTION(TRANSTAB_BUS_FAULT_0),
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PANFROST_EXCEPTION(TRANSTAB_BUS_FAULT_1),
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PANFROST_EXCEPTION(TRANSTAB_BUS_FAULT_2),
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PANFROST_EXCEPTION(TRANSTAB_BUS_FAULT_3),
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PANFROST_EXCEPTION(ACCESS_FLAG_0),
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PANFROST_EXCEPTION(ACCESS_FLAG_1),
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PANFROST_EXCEPTION(ACCESS_FLAG_2),
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PANFROST_EXCEPTION(ACCESS_FLAG_3),
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PANFROST_EXCEPTION(ADDR_SIZE_FAULT_IN0),
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PANFROST_EXCEPTION(ADDR_SIZE_FAULT_IN1),
|
||
|
|
PANFROST_EXCEPTION(ADDR_SIZE_FAULT_IN2),
|
||
|
|
PANFROST_EXCEPTION(ADDR_SIZE_FAULT_IN3),
|
||
|
|
PANFROST_EXCEPTION(ADDR_SIZE_FAULT_OUT0),
|
||
|
|
PANFROST_EXCEPTION(ADDR_SIZE_FAULT_OUT1),
|
||
|
|
PANFROST_EXCEPTION(ADDR_SIZE_FAULT_OUT2),
|
||
|
|
PANFROST_EXCEPTION(ADDR_SIZE_FAULT_OUT3),
|
||
|
|
PANFROST_EXCEPTION(MEM_ATTR_FAULT_0),
|
||
|
|
PANFROST_EXCEPTION(MEM_ATTR_FAULT_1),
|
||
|
|
PANFROST_EXCEPTION(MEM_ATTR_FAULT_2),
|
||
|
|
PANFROST_EXCEPTION(MEM_ATTR_FAULT_3),
|
||
|
|
PANFROST_EXCEPTION(MEM_ATTR_NONCACHE_0),
|
||
|
|
PANFROST_EXCEPTION(MEM_ATTR_NONCACHE_1),
|
||
|
|
PANFROST_EXCEPTION(MEM_ATTR_NONCACHE_2),
|
||
|
|
PANFROST_EXCEPTION(MEM_ATTR_NONCACHE_3),
|
||
|
|
};
|
||
|
|
|
||
|
|
const char *panfrost_exception_name(u32 exception_code)
|
||
|
|
{
|
||
|
|
if (WARN_ON(exception_code >= ARRAY_SIZE(panfrost_exception_infos) ||
|
||
|
|
!panfrost_exception_infos[exception_code].name))
|
||
|
|
return "Unknown exception type";
|
||
|
|
|
||
|
|
return panfrost_exception_infos[exception_code].name;
|
||
|
|
}
|
||
|
|
|
||
|
|
bool panfrost_exception_needs_reset(const struct panfrost_device *pfdev,
|
||
|
|
u32 exception_code)
|
||
|
|
{
|
||
|
|
/* If an occlusion query write causes a bus fault on affected GPUs,
|
||
|
|
* future fragment jobs may hang. Reset to workaround.
|
||
|
|
*/
|
||
|
|
if (exception_code == DRM_PANFROST_EXCEPTION_JOB_BUS_FAULT)
|
||
|
|
return panfrost_has_hw_issue(pfdev, HW_ISSUE_TTRX_3076);
|
||
|
|
|
||
|
|
/* No other GPUs we support need a reset */
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
|
||
|
|
void panfrost_device_reset(struct panfrost_device *pfdev)
|
||
|
|
{
|
||
|
|
panfrost_gpu_soft_reset(pfdev);
|
||
|
|
|
||
|
|
panfrost_gpu_power_on(pfdev);
|
||
|
|
panfrost_mmu_reset(pfdev);
|
||
|
|
panfrost_job_enable_interrupts(pfdev);
|
||
|
|
}
|
||
|
|
|
||
|
|
static int panfrost_device_resume(struct device *dev)
|
||
|
|
{
|
||
|
|
struct panfrost_device *pfdev = dev_get_drvdata(dev);
|
||
|
|
|
||
|
|
panfrost_device_reset(pfdev);
|
||
|
|
panfrost_devfreq_resume(pfdev);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int panfrost_device_suspend(struct device *dev)
|
||
|
|
{
|
||
|
|
struct panfrost_device *pfdev = dev_get_drvdata(dev);
|
||
|
|
|
||
|
|
if (!panfrost_job_is_idle(pfdev))
|
||
|
|
return -EBUSY;
|
||
|
|
|
||
|
|
panfrost_devfreq_suspend(pfdev);
|
||
|
|
panfrost_gpu_power_off(pfdev);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
EXPORT_GPL_RUNTIME_DEV_PM_OPS(panfrost_pm_ops, panfrost_device_suspend,
|
||
|
|
panfrost_device_resume, NULL);
|