129 lines
3.8 KiB
C
129 lines
3.8 KiB
C
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/*
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* Copyright 2014 Advanced Micro Devices, Inc.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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*/
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/*
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* Authors:
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* Christian König <christian.koenig@amd.com>
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*/
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#include <linux/firmware.h>
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#include <linux/module.h>
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#include <linux/mmu_notifier.h>
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#include <drm/drm.h>
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#include "radeon.h"
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/**
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* radeon_mn_invalidate - callback to notify about mm change
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*
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* @mn: our notifier
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* @range: the VMA under invalidation
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* @cur_seq: Value to pass to mmu_interval_set_seq()
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*
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* We block for all BOs between start and end to be idle and
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* unmap them by move them into system domain again.
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*/
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static bool radeon_mn_invalidate(struct mmu_interval_notifier *mn,
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const struct mmu_notifier_range *range,
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unsigned long cur_seq)
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{
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struct radeon_bo *bo = container_of(mn, struct radeon_bo, notifier);
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struct ttm_operation_ctx ctx = { false, false };
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long r;
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if (!bo->tbo.ttm || !radeon_ttm_tt_is_bound(bo->tbo.bdev, bo->tbo.ttm))
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return true;
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if (!mmu_notifier_range_blockable(range))
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return false;
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r = radeon_bo_reserve(bo, true);
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if (r) {
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DRM_ERROR("(%ld) failed to reserve user bo\n", r);
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return true;
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}
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r = dma_resv_wait_timeout(bo->tbo.base.resv, DMA_RESV_USAGE_BOOKKEEP,
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false, MAX_SCHEDULE_TIMEOUT);
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if (r <= 0)
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DRM_ERROR("(%ld) failed to wait for user bo\n", r);
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radeon_ttm_placement_from_domain(bo, RADEON_GEM_DOMAIN_CPU);
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r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
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if (r)
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DRM_ERROR("(%ld) failed to validate user bo\n", r);
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radeon_bo_unreserve(bo);
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return true;
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}
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static const struct mmu_interval_notifier_ops radeon_mn_ops = {
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.invalidate = radeon_mn_invalidate,
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};
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/**
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* radeon_mn_register - register a BO for notifier updates
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*
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* @bo: radeon buffer object
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* @addr: userptr addr we should monitor
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*
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* Registers an MMU notifier for the given BO at the specified address.
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* Returns 0 on success, -ERRNO if anything goes wrong.
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*/
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int radeon_mn_register(struct radeon_bo *bo, unsigned long addr)
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{
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int ret;
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ret = mmu_interval_notifier_insert(&bo->notifier, current->mm, addr,
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radeon_bo_size(bo), &radeon_mn_ops);
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if (ret)
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return ret;
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/*
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* FIXME: radeon appears to allow get_user_pages to run during
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* invalidate_range_start/end, which is not a safe way to read the
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* PTEs. It should use the mmu_interval_read_begin() scheme around the
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* get_user_pages to ensure that the PTEs are read properly
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*/
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mmu_interval_read_begin(&bo->notifier);
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return 0;
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}
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/**
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* radeon_mn_unregister - unregister a BO for notifier updates
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*
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* @bo: radeon buffer object
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*
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* Remove any registration of MMU notifier updates from the buffer object.
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*/
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void radeon_mn_unregister(struct radeon_bo *bo)
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{
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if (!bo->notifier.mm)
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return;
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mmu_interval_notifier_remove(&bo->notifier);
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bo->notifier.mm = NULL;
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}
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