241 lines
7.5 KiB
C
241 lines
7.5 KiB
C
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/*
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* Copyright (c) 2006, 2007, 2008, 2009, 2010 QLogic Corporation.
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* All rights reserved.
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* Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include <linux/pci.h>
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#include <linux/delay.h>
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#include "qib.h"
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#include "qib_common.h"
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/**
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* qib_format_hwmsg - format a single hwerror message
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* @msg: message buffer
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* @msgl: length of message buffer
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* @hwmsg: message to add to message buffer
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*/
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static void qib_format_hwmsg(char *msg, size_t msgl, const char *hwmsg)
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{
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strlcat(msg, "[", msgl);
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strlcat(msg, hwmsg, msgl);
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strlcat(msg, "]", msgl);
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}
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/**
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* qib_format_hwerrors - format hardware error messages for display
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* @hwerrs: hardware errors bit vector
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* @hwerrmsgs: hardware error descriptions
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* @nhwerrmsgs: number of hwerrmsgs
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* @msg: message buffer
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* @msgl: message buffer length
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*/
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void qib_format_hwerrors(u64 hwerrs, const struct qib_hwerror_msgs *hwerrmsgs,
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size_t nhwerrmsgs, char *msg, size_t msgl)
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{
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int i;
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for (i = 0; i < nhwerrmsgs; i++)
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if (hwerrs & hwerrmsgs[i].mask)
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qib_format_hwmsg(msg, msgl, hwerrmsgs[i].msg);
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}
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static void signal_ib_event(struct qib_pportdata *ppd, enum ib_event_type ev)
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{
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struct ib_event event;
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struct qib_devdata *dd = ppd->dd;
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event.device = &dd->verbs_dev.rdi.ibdev;
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event.element.port_num = ppd->port;
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event.event = ev;
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ib_dispatch_event(&event);
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}
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void qib_handle_e_ibstatuschanged(struct qib_pportdata *ppd, u64 ibcs)
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{
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struct qib_devdata *dd = ppd->dd;
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unsigned long flags;
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u32 lstate;
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u8 ltstate;
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enum ib_event_type ev = 0;
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lstate = dd->f_iblink_state(ibcs); /* linkstate */
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ltstate = dd->f_ibphys_portstate(ibcs);
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/*
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* If linkstate transitions into INIT from any of the various down
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* states, or if it transitions from any of the up (INIT or better)
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* states into any of the down states (except link recovery), then
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* call the chip-specific code to take appropriate actions.
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*
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* ppd->lflags could be 0 if this is the first time the interrupt
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* handlers has been called but the link is already up.
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*/
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if (lstate >= IB_PORT_INIT &&
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(!ppd->lflags || (ppd->lflags & QIBL_LINKDOWN)) &&
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ltstate == IB_PHYSPORTSTATE_LINKUP) {
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/* transitioned to UP */
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if (dd->f_ib_updown(ppd, 1, ibcs))
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goto skip_ibchange; /* chip-code handled */
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} else if (ppd->lflags & (QIBL_LINKINIT | QIBL_LINKARMED |
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QIBL_LINKACTIVE | QIBL_IB_FORCE_NOTIFY)) {
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if (ltstate != IB_PHYSPORTSTATE_LINKUP &&
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ltstate <= IB_PHYSPORTSTATE_CFG_TRAIN &&
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dd->f_ib_updown(ppd, 0, ibcs))
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goto skip_ibchange; /* chip-code handled */
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qib_set_uevent_bits(ppd, _QIB_EVENT_LINKDOWN_BIT);
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}
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if (lstate != IB_PORT_DOWN) {
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/* lstate is INIT, ARMED, or ACTIVE */
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if (lstate != IB_PORT_ACTIVE) {
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*ppd->statusp &= ~QIB_STATUS_IB_READY;
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if (ppd->lflags & QIBL_LINKACTIVE)
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ev = IB_EVENT_PORT_ERR;
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spin_lock_irqsave(&ppd->lflags_lock, flags);
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if (lstate == IB_PORT_ARMED) {
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ppd->lflags |= QIBL_LINKARMED | QIBL_LINKV;
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ppd->lflags &= ~(QIBL_LINKINIT |
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QIBL_LINKDOWN | QIBL_LINKACTIVE);
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} else {
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ppd->lflags |= QIBL_LINKINIT | QIBL_LINKV;
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ppd->lflags &= ~(QIBL_LINKARMED |
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QIBL_LINKDOWN | QIBL_LINKACTIVE);
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}
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spin_unlock_irqrestore(&ppd->lflags_lock, flags);
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/* start a 75msec timer to clear symbol errors */
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mod_timer(&ppd->symerr_clear_timer,
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msecs_to_jiffies(75));
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} else if (ltstate == IB_PHYSPORTSTATE_LINKUP &&
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!(ppd->lflags & QIBL_LINKACTIVE)) {
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/* active, but not active defered */
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qib_hol_up(ppd); /* useful only for 6120 now */
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*ppd->statusp |=
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QIB_STATUS_IB_READY | QIB_STATUS_IB_CONF;
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qib_clear_symerror_on_linkup(&ppd->symerr_clear_timer);
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spin_lock_irqsave(&ppd->lflags_lock, flags);
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ppd->lflags |= QIBL_LINKACTIVE | QIBL_LINKV;
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ppd->lflags &= ~(QIBL_LINKINIT |
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QIBL_LINKDOWN | QIBL_LINKARMED);
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spin_unlock_irqrestore(&ppd->lflags_lock, flags);
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if (dd->flags & QIB_HAS_SEND_DMA)
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qib_sdma_process_event(ppd,
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qib_sdma_event_e30_go_running);
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ev = IB_EVENT_PORT_ACTIVE;
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dd->f_setextled(ppd, 1);
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}
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} else { /* down */
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if (ppd->lflags & QIBL_LINKACTIVE)
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ev = IB_EVENT_PORT_ERR;
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spin_lock_irqsave(&ppd->lflags_lock, flags);
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ppd->lflags |= QIBL_LINKDOWN | QIBL_LINKV;
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ppd->lflags &= ~(QIBL_LINKINIT |
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QIBL_LINKACTIVE | QIBL_LINKARMED);
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spin_unlock_irqrestore(&ppd->lflags_lock, flags);
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*ppd->statusp &= ~QIB_STATUS_IB_READY;
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}
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skip_ibchange:
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ppd->lastibcstat = ibcs;
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if (ev)
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signal_ib_event(ppd, ev);
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}
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void qib_clear_symerror_on_linkup(struct timer_list *t)
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{
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struct qib_pportdata *ppd = from_timer(ppd, t, symerr_clear_timer);
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if (ppd->lflags & QIBL_LINKACTIVE)
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return;
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ppd->ibport_data.z_symbol_error_counter =
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ppd->dd->f_portcntr(ppd, QIBPORTCNTR_IBSYMBOLERR);
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}
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/*
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* Handle receive interrupts for user ctxts; this means a user
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* process was waiting for a packet to arrive, and didn't want
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* to poll.
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*/
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void qib_handle_urcv(struct qib_devdata *dd, u64 ctxtr)
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{
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struct qib_ctxtdata *rcd;
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unsigned long flags;
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int i;
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spin_lock_irqsave(&dd->uctxt_lock, flags);
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for (i = dd->first_user_ctxt; dd->rcd && i < dd->cfgctxts; i++) {
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if (!(ctxtr & (1ULL << i)))
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continue;
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rcd = dd->rcd[i];
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if (!rcd || !rcd->cnt)
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continue;
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if (test_and_clear_bit(QIB_CTXT_WAITING_RCV, &rcd->flag)) {
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wake_up_interruptible(&rcd->wait);
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dd->f_rcvctrl(rcd->ppd, QIB_RCVCTRL_INTRAVAIL_DIS,
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rcd->ctxt);
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} else if (test_and_clear_bit(QIB_CTXT_WAITING_URG,
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&rcd->flag)) {
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rcd->urgent++;
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wake_up_interruptible(&rcd->wait);
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}
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}
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spin_unlock_irqrestore(&dd->uctxt_lock, flags);
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}
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void qib_bad_intrstatus(struct qib_devdata *dd)
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{
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static int allbits;
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/* separate routine, for better optimization of qib_intr() */
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/*
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* We print the message and disable interrupts, in hope of
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* having a better chance of debugging the problem.
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*/
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qib_dev_err(dd,
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"Read of chip interrupt status failed disabling interrupts\n");
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if (allbits++) {
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/* disable interrupt delivery, something is very wrong */
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if (allbits == 2)
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dd->f_set_intr_state(dd, 0);
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if (allbits == 3) {
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qib_dev_err(dd,
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"2nd bad interrupt status, unregistering interrupts\n");
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dd->flags |= QIB_BADINTR;
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dd->flags &= ~QIB_INITTED;
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dd->f_free_irq(dd);
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}
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}
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}
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