150 lines
5.4 KiB
C
150 lines
5.4 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Qualcomm #define SC7180 interconnect IDs
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*
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* Copyright (c) 2020, The Linux Foundation. All rights reserved.
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*/
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#ifndef __DRIVERS_INTERCONNECT_QCOM_SC7180_H
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#define __DRIVERS_INTERCONNECT_QCOM_SC7180_H
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#define SC7180_MASTER_APPSS_PROC 0
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#define SC7180_MASTER_SYS_TCU 1
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#define SC7180_MASTER_NPU_SYS 2
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/* 3 was used by MASTER_IPA_CORE, now represented as RPMh clock */
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#define SC7180_MASTER_LLCC 4
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#define SC7180_MASTER_A1NOC_CFG 5
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#define SC7180_MASTER_A2NOC_CFG 6
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#define SC7180_MASTER_CNOC_DC_NOC 7
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#define SC7180_MASTER_GEM_NOC_CFG 8
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#define SC7180_MASTER_CNOC_MNOC_CFG 9
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#define SC7180_MASTER_NPU_NOC_CFG 10
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#define SC7180_MASTER_QDSS_BAM 11
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#define SC7180_MASTER_QSPI 12
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#define SC7180_MASTER_QUP_0 13
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#define SC7180_MASTER_QUP_1 14
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#define SC7180_MASTER_SNOC_CFG 15
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#define SC7180_MASTER_A1NOC_SNOC 16
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#define SC7180_MASTER_A2NOC_SNOC 17
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#define SC7180_MASTER_COMPUTE_NOC 18
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#define SC7180_MASTER_GEM_NOC_SNOC 19
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#define SC7180_MASTER_MNOC_HF_MEM_NOC 20
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#define SC7180_MASTER_MNOC_SF_MEM_NOC 21
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#define SC7180_MASTER_NPU 22
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#define SC7180_MASTER_SNOC_CNOC 23
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#define SC7180_MASTER_SNOC_GC_MEM_NOC 24
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#define SC7180_MASTER_SNOC_SF_MEM_NOC 25
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#define SC7180_MASTER_QUP_CORE_0 26
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#define SC7180_MASTER_QUP_CORE_1 27
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#define SC7180_MASTER_CAMNOC_HF0 28
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#define SC7180_MASTER_CAMNOC_HF1 29
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#define SC7180_MASTER_CAMNOC_HF0_UNCOMP 30
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#define SC7180_MASTER_CAMNOC_HF1_UNCOMP 31
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#define SC7180_MASTER_CAMNOC_SF 32
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#define SC7180_MASTER_CAMNOC_SF_UNCOMP 33
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#define SC7180_MASTER_CRYPTO 34
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#define SC7180_MASTER_GFX3D 35
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#define SC7180_MASTER_IPA 36
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#define SC7180_MASTER_MDP0 37
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#define SC7180_MASTER_NPU_PROC 38
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#define SC7180_MASTER_PIMEM 39
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#define SC7180_MASTER_ROTATOR 40
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#define SC7180_MASTER_VIDEO_P0 41
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#define SC7180_MASTER_VIDEO_PROC 42
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#define SC7180_MASTER_QDSS_DAP 43
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#define SC7180_MASTER_QDSS_ETR 44
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#define SC7180_MASTER_SDCC_2 45
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#define SC7180_MASTER_UFS_MEM 46
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#define SC7180_MASTER_USB3 47
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#define SC7180_MASTER_EMMC 48
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#define SC7180_SLAVE_EBI1 49
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/* 50 was used by SLAVE_IPA_CORE, now represented as RPMh clock */
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#define SC7180_SLAVE_A1NOC_CFG 51
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#define SC7180_SLAVE_A2NOC_CFG 52
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#define SC7180_SLAVE_AHB2PHY_SOUTH 53
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#define SC7180_SLAVE_AHB2PHY_CENTER 54
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#define SC7180_SLAVE_AOP 55
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#define SC7180_SLAVE_AOSS 56
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#define SC7180_SLAVE_APPSS 57
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#define SC7180_SLAVE_BOOT_ROM 58
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#define SC7180_SLAVE_NPU_CAL_DP0 59
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#define SC7180_SLAVE_CAMERA_CFG 60
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#define SC7180_SLAVE_CAMERA_NRT_THROTTLE_CFG 61
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#define SC7180_SLAVE_CAMERA_RT_THROTTLE_CFG 62
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#define SC7180_SLAVE_CLK_CTL 63
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#define SC7180_SLAVE_NPU_CP 64
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#define SC7180_SLAVE_RBCPR_CX_CFG 65
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#define SC7180_SLAVE_RBCPR_MX_CFG 66
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#define SC7180_SLAVE_CRYPTO_0_CFG 67
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#define SC7180_SLAVE_DCC_CFG 68
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#define SC7180_SLAVE_CNOC_DDRSS 69
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#define SC7180_SLAVE_DISPLAY_CFG 70
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#define SC7180_SLAVE_DISPLAY_RT_THROTTLE_CFG 71
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#define SC7180_SLAVE_DISPLAY_THROTTLE_CFG 72
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#define SC7180_SLAVE_NPU_INT_DMA_BWMON_CFG 73
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#define SC7180_SLAVE_NPU_DPM 74
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#define SC7180_SLAVE_EMMC_CFG 75
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#define SC7180_SLAVE_GEM_NOC_CFG 76
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#define SC7180_SLAVE_GLM 77
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#define SC7180_SLAVE_GFX3D_CFG 78
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#define SC7180_SLAVE_IMEM_CFG 79
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#define SC7180_SLAVE_IPA_CFG 80
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#define SC7180_SLAVE_ISENSE_CFG 81
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#define SC7180_SLAVE_LLCC_CFG 82
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#define SC7180_SLAVE_NPU_LLM_CFG 83
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#define SC7180_SLAVE_MSS_PROC_MS_MPU_CFG 84
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#define SC7180_SLAVE_CNOC_MNOC_CFG 85
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#define SC7180_SLAVE_CNOC_MSS 86
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#define SC7180_SLAVE_NPU_CFG 87
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#define SC7180_SLAVE_NPU_DMA_BWMON_CFG 88
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#define SC7180_SLAVE_NPU_PROC_BWMON_CFG 89
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#define SC7180_SLAVE_PDM 90
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#define SC7180_SLAVE_PIMEM_CFG 91
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#define SC7180_SLAVE_PRNG 92
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#define SC7180_SLAVE_QDSS_CFG 93
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#define SC7180_SLAVE_QM_CFG 94
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#define SC7180_SLAVE_QM_MPU_CFG 95
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#define SC7180_SLAVE_QSPI_0 96
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#define SC7180_SLAVE_QUP_0 97
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#define SC7180_SLAVE_QUP_1 98
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#define SC7180_SLAVE_SDCC_2 99
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#define SC7180_SLAVE_SECURITY 100
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#define SC7180_SLAVE_SNOC_CFG 101
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#define SC7180_SLAVE_NPU_TCM 102
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#define SC7180_SLAVE_TCSR 103
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#define SC7180_SLAVE_TLMM_WEST 104
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#define SC7180_SLAVE_TLMM_NORTH 105
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#define SC7180_SLAVE_TLMM_SOUTH 106
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#define SC7180_SLAVE_UFS_MEM_CFG 107
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#define SC7180_SLAVE_USB3 108
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#define SC7180_SLAVE_VENUS_CFG 109
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#define SC7180_SLAVE_VENUS_THROTTLE_CFG 110
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#define SC7180_SLAVE_VSENSE_CTRL_CFG 111
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#define SC7180_SLAVE_A1NOC_SNOC 112
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#define SC7180_SLAVE_A2NOC_SNOC 113
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#define SC7180_SLAVE_CAMNOC_UNCOMP 114
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#define SC7180_SLAVE_CDSP_GEM_NOC 115
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#define SC7180_SLAVE_SNOC_CNOC 116
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#define SC7180_SLAVE_GEM_NOC_SNOC 117
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#define SC7180_SLAVE_SNOC_GEM_NOC_GC 118
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#define SC7180_SLAVE_SNOC_GEM_NOC_SF 119
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#define SC7180_SLAVE_LLCC 120
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#define SC7180_SLAVE_MNOC_HF_MEM_NOC 121
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#define SC7180_SLAVE_MNOC_SF_MEM_NOC 122
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#define SC7180_SLAVE_NPU_COMPUTE_NOC 123
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#define SC7180_SLAVE_QUP_CORE_0 124
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#define SC7180_SLAVE_QUP_CORE_1 125
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#define SC7180_SLAVE_IMEM 126
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#define SC7180_SLAVE_PIMEM 127
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#define SC7180_SLAVE_SERVICE_A1NOC 128
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#define SC7180_SLAVE_SERVICE_A2NOC 129
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#define SC7180_SLAVE_SERVICE_CNOC 130
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#define SC7180_SLAVE_SERVICE_GEM_NOC 131
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#define SC7180_SLAVE_SERVICE_MNOC 132
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#define SC7180_SLAVE_SERVICE_NPU_NOC 133
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#define SC7180_SLAVE_SERVICE_SNOC 134
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#define SC7180_SLAVE_QDSS_STM 135
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#define SC7180_SLAVE_TCU 136
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#endif
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